📄 disasm.c
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{ disasm_cop1_c_seq_s, 6, 0x1 }, /* 48 */ { disasm_cop1_c_ngl_s, 6, 0x1 }, /* 49 */ { disasm_cop1_c_lt_s , 6, 0x1 }, /* 50 */ { disasm_cop1_c_nge_s, 6, 0x1 }, /* 51 */ { disasm_cop1_c_le_s , 6, 0x1 }, /* 52 */ { disasm_cop1_c_ngt_s, 6, 0x1 }, /* 53 */ { disasm_cop1_c_f_d , 6, 0x1 }, /* 54 */ { disasm_cop1_c_un_d , 6, 0x1 }, /* 55 */ { disasm_cop1_c_eq_d , 6, 0x1 }, /* 56 */ { disasm_cop1_c_ueq_d, 6, 0x1 }, /* 57 */ { disasm_cop1_c_olt_d, 6, 0x1 }, /* 58 */ { disasm_cop1_c_ult_d, 6, 0x1 }, /* 59 */ { disasm_cop1_c_ole_d, 6, 0x1 }, /* 60 */ { disasm_cop1_c_ule_d, 6, 0x1 }, /* 61 */ { disasm_cop1_c_sf_d , 6, 0x1 }, /* 62 */ { disasm_cop1_c_ngle_d, 6, 0x1 }, /* 63 */ { disasm_cop1_c_seq_d, 6, 0x1 }, /* 64 */ { disasm_cop1_c_ngl_d, 6, 0x1 }, /* 65 */ { disasm_cop1_c_lt_d , 6, 0x1 }, /* 66 */ { disasm_cop1_c_nge_d, 6, 0x1 }, /* 67 */ { disasm_cop1_c_le_d , 6, 0x1 }, /* 68 */ { disasm_cop1_c_ngt_d, 6, 0x1 }, /* 69 */ { disasm_cop1_c_f_ps , 6, 0x1 }, /* 70 */ { disasm_cop1_c_un_ps, 6, 0x1 }, /* 71 */ { disasm_cop1_c_eq_ps, 6, 0x1 }, /* 72 */ { disasm_cop1_c_ueq_ps, 6, 0x1 }, /* 73 */ { disasm_cop1_c_olt_ps, 6, 0x1 }, /* 74 */ { disasm_cop1_c_ult_ps, 6, 0x1 }, /* 75 */ { disasm_cop1_c_ole_ps, 6, 0x1 }, /* 76 */ { disasm_cop1_c_ule_ps, 6, 0x1 }, /* 77 */ { disasm_cop1_c_sf_ps, 6, 0x1 }, /* 78 */ { disasm_cop1_c_ngle_ps, 6, 0x1 }, /* 79 */ { disasm_cop1_c_seq_ps, 6, 0x1 }, /* 80 */ { disasm_cop1_c_ngl_ps, 6, 0x1 }, /* 81 */ { disasm_cop1_c_lt_ps, 6, 0x1 }, /* 82 */ { disasm_cop1_c_nge_ps, 6, 0x1 }, /* 83 */ { disasm_cop1_c_le_ps, 6, 0x1 }, /* 84 */ { disasm_cop1_c_ngt_ps, 6, 0x1 }, /* 85 */};#define PREFHINT(x) (&pref_hints[(x)*9])static char *pref_hints = "load \0" "store \0" "reserved\0" "reserved\0" "ld_strm \0" "st_strm \0" "ld_retn \0" "st_retn \0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "wb_inval\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0" "reserved\0";static int snprintf(char *buf,int len,const char *templat,...){ va_list marker; int count; va_start(marker,templat); count = xvsprintf(buf,templat,marker); va_end(marker); return count;}static const disasm_t *get_disasm_field(uint32_t inst){ const disasm_deref_t *tmp = &disasm_deref[0]; const disasm_t *rec; do { rec = &(tmp->ptr[(inst>>tmp->shift) & tmp->mask]); tmp = &disasm_deref[atoi(&(rec->name[1]))]; } while (rec->type == DC_DEREF); return rec;}char *disasm_inst_name(uint32_t inst){ return (char *)(get_disasm_field(inst)->name);}void disasm_inst(char *buf, int buf_size, uint32_t inst, uint64_t pc){ const disasm_t *tmp; char instname[32]; int commentmode = 0; char *x; tmp = get_disasm_field(inst); strcpy(instname,(char *) tmp->name); if ((x = strchr(instname,'@'))) { *x++ = 0; commentmode = atoi(x); } switch (tmp->type) { case DC_RD_RS_RT: snprintf(buf, buf_size, "%-8s %s,%s,%s", instname, REGNAME((inst>>11) & 0x1f), REGNAME((inst>>21) & 0x1f), REGNAME((inst>>16) & 0x1f)); break; case DC_RD_RT_RS: snprintf(buf, buf_size, "%-8s %s,%s,%s", instname, REGNAME((inst>>11) & 0x1f), REGNAME((inst>>16) & 0x1f), REGNAME((inst>>21) & 0x1f)); break; case DC_RT_RS_SIMM: snprintf(buf, buf_size, "%-8s %s,%s,#%" PF_32 "d", instname, REGNAME((inst>>16) & 0x1f), REGNAME((inst>>21) & 0x1f), SEXT_32(15, inst & 0xffff)); break; case DC_RT_RS_XIMM: snprintf(buf, buf_size, "%-8s %s,%s,#0x%" PF_32 "x", instname, REGNAME((inst>>16) & 0x1f), REGNAME((inst>>21) & 0x1f), inst & 0xffff); break; case DC_RS_RT_OFS: snprintf(buf, buf_size, "%-8s %s,%s,0x%" PF_64 "x", instname, REGNAME((inst>>21) & 0x1f), REGNAME((inst>>16) & 0x1f), pc + 4 + (SEXT_64(15, inst & 0xffff)<<2)); break; case DC_RS_OFS: snprintf(buf, buf_size, "%-8s %s,0x%" PF_64 "x", instname, REGNAME((inst>>21) & 0x1f), pc + 4 + (SEXT_64(16, inst & 0xffff)<<2)); break; case DC_RD_RT_SA: snprintf(buf, buf_size, "%-8s %s,%s,#%d", instname, REGNAME((inst>>11) & 0x1f), REGNAME((inst>>16) & 0x1f), (inst>>6) & 0x1f); break; case DC_RT_UIMM: snprintf(buf, buf_size, "%-8s %s,#%d", instname, REGNAME((inst>>16) & 0x1f), inst & 0xffff); break; case DC_RD: snprintf(buf, buf_size, "%-8s %s", instname, REGNAME((inst>>11) & 0x1f)); break; case DC_J: snprintf(buf, buf_size, "%-8s 0x%" PF_64 "x", instname, (pc & UINT64_T(0xfffffffff0000000LL)) | ((inst & 0x3ffffff)<<2)); break; case DC_RD_RS: snprintf(buf, buf_size, "%-8s %s,%s", instname, REGNAME((inst>>11) & 0x1f), REGNAME((inst>>21) & 0x1f)); break; case DC_RS_RT: snprintf(buf, buf_size, "%-8s %s,%s", instname, REGNAME((inst>>21) & 0x1f), REGNAME((inst>>16) & 0x1f)); break; case DC_RT_RS: snprintf(buf, buf_size, "%-8s %s,%s", instname, REGNAME((inst>>16) & 0x1f), REGNAME((inst>>21) & 0x1f)); break; case DC_RT_RD_SEL: snprintf(buf, buf_size, "%-8s %s,%s,#%d", instname, REGNAME((inst>>16) & 0x1f), REGNAME((inst>>11) & 0x1f), inst & 0x3); break; case DC_RT_CR_SEL: snprintf(buf, buf_size, "%-8s %s,%d,#%d", instname, REGNAME((inst>>16) & 0x1f), (inst>>11) & 0x1f, inst & 0x3); break; case DC_RS: snprintf(buf, buf_size, "%-8s %s", instname, REGNAME((inst>>21) & 0x1f)); break; case DC_RS_SIMM: snprintf(buf, buf_size, "%-8s %s,#%" PF_32 "d", instname, REGNAME((inst>>21) & 0x1f), SEXT_32(15, inst & 0xffff)); break; case DC_RT_OFS_BASE: snprintf(buf, buf_size, "%-8s %s,#%" PF_32 "d(%s)", instname, REGNAME((inst>>16) & 0x1f), SEXT_32(15, inst), REGNAME((inst>>21) & 0x1f)); break; case DC_FT_OFS_BASE: snprintf(buf, buf_size, "%-8s f%d,#%" PF_32 "d(%s)", instname, (inst>>16) & 0x1f, SEXT_32(15, inst), REGNAME((inst>>21) & 0x1f)); break; case DC_FD_IDX_BASE: snprintf(buf, buf_size, "%-8s f%d,%s(%s)", instname, (inst>>6) & 0x1f, REGNAME((inst>>16) & 0x1f), REGNAME((inst>>21) & 0x1f)); break; case DC_FS_IDX_BASE: snprintf(buf, buf_size, "%-8s f%d,%s(%s)", instname, (inst>>11) & 0x1f, REGNAME((inst>>16) & 0x1f), REGNAME((inst>>21) & 0x1f)); break; case DC_FD_FS_FT: snprintf(buf, buf_size, "%-8s f%d,f%d,f%d", instname, (inst>>6) & 0x1f, (inst>>11) & 0x1f, (inst>>16) & 0x1f); break; case DC_FD_FS_RT: snprintf(buf, buf_size, "%-8s f%d,f%d,%s", instname, (inst>>6) & 0x1f, (inst>>11) & 0x1f, REGNAME((inst>>16) & 0x1f)); break; case DC_FD_FS: snprintf(buf, buf_size, "%-8s f%d,f%d", instname, (inst>>6)&0x1f, (inst>>11)&0x1f); break; case DC_PREF_OFS: snprintf(buf, buf_size, "%-8s #%" PF_32 "d(%s) /* %s */", instname, SEXT_32(15, inst & 0xffff), REGNAME((inst>>21) & 0x1f), PREFHINT((inst>>16) & 0x1f)); break; case DC_PREF_IDX: snprintf(buf, buf_size, "%-8s %s(%s) /* %s */", instname, REGNAME((inst>>16) & 0x1f), REGNAME((inst>>21) & 0x1f), PREFHINT((inst>>16) & 0x1f)); break; case DC_CC_OFS: snprintf(buf, buf_size, "%-8s %d,0x%" PF_64 "x", instname, (inst>>18) & 0x7, pc + 4 + (SEXT_64(15, inst & 0xffff)<<2)); break; case DC_RD_RS_CC: snprintf(buf, buf_size, "%-8s %s,%s,%d", instname, REGNAME((inst>>11) & 0x1f), REGNAME((inst>>21) & 0x1f), (inst>>18) & 0x7); break; case DC_FD_FS_CC: snprintf(buf, buf_size, "%-8s f%d,f%d,%d", instname, (inst>>6) & 0x1f, (inst>>11) & 0x1f, (inst>>18) & 0x7); break; case DC_FD_FR_FS_FT: snprintf(buf, buf_size, "%-8s f%d,f%d,f%d,f%d", instname, (inst>>6) & 0x1f, (inst>>21) & 0x1f, (inst>>11) & 0x1f, (inst>>16) & 0x1f); break; case DC_FD_FS_FT_RS: snprintf(buf, buf_size, "%-8s f%d,f%d,f%d,%s", instname, (inst>>6) & 0x1f, (inst>>11) & 0x1f, (inst>>16) & 0x1f, REGNAME((inst>>21) & 0x1f)); break; case DC_CC_FS_FT: snprintf(buf, buf_size, "%-8s %d,f%d,f%d", instname, (inst>>8) & 0x7, (inst>>11) & 0x1f, (inst>>16) & 0x1f); break; case DC_BARE: snprintf(buf, buf_size, "%-8s", instname); break; case DC_RT_FS: snprintf(buf, buf_size, "%-8s %s,f%d", instname, REGNAME((inst>>16) & 0x1f), (inst>>11) & 0x1f); break; case DC_VS: snprintf(buf, buf_size, "%-8s $v%d", instname, (inst>>11) & 0x1f); break; case DC_VD: snprintf(buf, buf_size, "%-8s $v%d", instname, (inst>>6) & 0x1f); break; case DC_VD_VT: snprintf(buf, buf_size, "%-8s $v%d,$v%d", instname, (inst>>6) & 0x1f, (inst>>16) & 0x1f); break; case DC_VD_VS_VT_IMM: snprintf(buf, buf_size, "%-8s $v%d,$v%d,$v%d,#%d", instname, (inst>>6) & 0x1f, (inst>>11) & 0x1f, (inst>>16) & 0x1f, (inst>>21) & 0x7); break; case DC_VD_VS_VT_RS: snprintf(buf, buf_size, "%-8s $v%d,$v%d,$v%d,%s", instname, (inst>>6) & 0x1f, (inst>>11) & 0x1f, (inst>>16) & 0x1f, REGNAME((inst>>21) & 0x1f)); break; case DC_VD_VS_VT: snprintf(buf, buf_size, "%-8s $v%d,$v%d,$v%d", instname, (inst>>6) & 0x1f, (inst>>11) & 0x1f, (inst>>16) & 0x1f); break; case DC_VS_VT: snprintf(buf, buf_size, "%-8s $v%d,$v%d", instname, (inst>>11) & 0x1f, (inst>>16) & 0x1f); break; case DC_VS_VT_VEC: switch((inst>>24) & 0x3) {
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