dev_flashop_engine.s

一个很好的嵌入式linux平台下的bootloader

1:		lbu	t2,0(reg_dest)	# t2 = byte from flash

		and	t1,t2,0x80	# done if bit7 of flash
		and	t0,t0,0x80	# is same as bit7 of data
		beq	t1,t0,2f

		and	t1,t2,0x20	# not done if bit5
		bne	t1,0x20,1b	# is still set
2:

	/* next byte...	 */

		add	reg_src,1	# next source byte
		ADDPTR	reg_dest,1	# next dest byte
		sub	reg_cnt,1	# one less count
		bgt	reg_cnt,0,11b


		b	nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:		bne	reg_op,FEOP_AMD_PGM16,99f	/* AMD 16-bit program */

		ADDPTR	reg_dest,reg_dest,reg_base

	/* Do an "unlock write" sequence  (cycles 1-2) */
11:
		FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
		FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)

	/* Send a program command (cycle 3) */

	 	FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_PROGRAM)

	/* Write a byte (cycle 4) */

		lh	t0,0(reg_src)
		sh	t0,0(reg_dest)	# t0 = byte written to flash
		
	/* Wait for write to complete */

1:		lh	t2,0(reg_dest)	# t2 = byte from flash

		and	t1,t2,0x80	# done if bit7 of flash
		and	t0,t0,0x80	# is same as bit7 of data
		beq	t1,t0,2f

		and	t1,t2,0x20	# not done if bit5
		bne	t1,0x20,1b	# is still set
2:

	/* next byte...	 */

		add	reg_src,2	# next source word
		ADDPTR	reg_dest,2	# next dest word
		sub	reg_cnt,2	# one less count
		bgt	reg_cnt,0,11b

		b	nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:		bne	reg_op,FEOP_AMD_PGM16B,99f	/* AMD 16-bit pgm in 8-bit mode */

		ADDPTR	reg_dest,reg_dest,reg_base

	/* Do an "unlock write" sequence  (cycles 1-2) */
11:
		FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
		FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)

	/* Send a program command (cycle 3) */

	 	FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_PROGRAM)

	/* Write a byte (cycle 4) */

		lb	t0,0(reg_src)
		sb	t0,0(reg_dest)	# t0 = byte written to flash
		
	/* Wait for write to complete */

1:		lb	t2,0(reg_dest)	# t2 = byte from flash

		and	t1,t2,0x80	# done if bit7 of flash
		and	t0,t0,0x80	# is same as bit7 of data
		beq	t1,t0,2f

		and	t1,t2,0x20	# not done if bit5
		bne	t1,0x20,1b	# is still set
2:

	/* next byte...	 */

		add	reg_src,1	# next source word
		ADDPTR	reg_dest,1	# next dest word
		sub	reg_cnt,1	# one less count
		bgt	reg_cnt,0,11b

		b	nextinst

/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:           bne     reg_op,FEOP_AMD_DEVCODE8,99f   /* AMD 8-bit - Boot Block Location */

              ADDPTR     reg_src,reg_src,reg_base

              FLASHCMD_8(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
              FLASHCMD_8(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
              FLASHCMD_8(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_AUTOSEL)
      
              lbu     t0,AMD_FLASH_DEVCODE8(reg_src)
              sb      t0,0(reg_dest)
              li      t0,AMD_FLASH_RESET
              sb      t0,0(reg_src)


              b       nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:           bne     reg_op,FEOP_AMD_DEVCODE16,99f   /* AMD 8-bit - Boot Block Location */

              ADDPTR     reg_src,reg_src,reg_base

              FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
              FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
              FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_AUTOSEL)
      
              lw      t0,0(reg_src)
#ifdef __MIPSEB
	      srl     t0,t0,8	/* ((3-AMD_FLASH_DEVCODE16)*8) */
#else
	      srl     t0,t0,16	/* (AMD_FLASH_DEVCODE16*8) */
#endif
              sb      t0,0(reg_dest)
              li      t0,AMD_FLASH_RESET
              sb      t0,0(reg_src)
              
              b       nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:           bne     reg_op,FEOP_AMD_DEVCODE16B,99f   /* AMD 8-bit - Boot Block Location */
      
              ADDPTR     reg_src,reg_src,reg_base
      
              FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
              FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
              FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_AUTOSEL)
      
              lw      t0,0(reg_src)
#ifdef __MIPSEB
#else
	      srl     t0,t0,16			/* (AMD_FLASH_DEVCODE16B*8)*/
#endif

              sb      t0,0(reg_dest)
              li      t0,AMD_FLASH_RESET
              sb      t0,0(reg_src)
      
              b       nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:           bne     reg_op,FEOP_AMD_MANID8,99f   /* AMD 8-bit - Boot Block Location */

              ADDPTR     reg_src,reg_src,reg_base

              FLASHCMD_8(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
              FLASHCMD_8(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
              FLASHCMD_8(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_AUTOSEL)
      
              lbu     t0,AMD_FLASH_MANID(reg_src)
              sb      t0,0(reg_dest)
              li      t0,AMD_FLASH_RESET
              sb      t0,0(reg_src)


              b       nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:           bne     reg_op,FEOP_AMD_MANID16,99f   /* AMD 8-bit - Boot Block Location */

              ADDPTR     reg_src,reg_src,reg_base

              FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
              FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
              FLASHCMD_16(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_AUTOSEL)
      
              lw      t0,0(reg_src)
#ifdef __MIPSEB
	      srl     t0,t0,((3-AMD_FLASH_MANID)*8)
#else
	      srl     t0,t0,(AMD_FLASH_MANID*8)
#endif
              sb      t0,0(reg_dest)
              li      t0,AMD_FLASH_RESET
              sb      t0,0(reg_src)
              
              b       nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:           bne     reg_op,FEOP_AMD_MANID16B,99f   /* AMD 8-bit - Boot Block Location */
      
              ADDPTR     reg_src,reg_src,reg_base
      
              FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
              FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
              FLASHCMD_16B(reg_base,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_AUTOSEL)
      
              lbu     t0,AMD_FLASH_MANID(reg_src)

              sb      t0,0(reg_dest)
              li      t0,AMD_FLASH_RESET
              sb      t0,0(reg_src)
      
              b       nextinst        

#endif

/* INTEL  - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
#if (FLASH_DRIVERS & FLASH_DRIVER_INTEL)
99:		bne	reg_op,FEOP_INTEL_ERASE8,99f	/* Intel erase 8-bit */

		ADDPTR	reg_dest,reg_dest,reg_base

		FLASHCMD_8(reg_dest,0,INTEL_FLASH_ERASE_BLOCK)
		FLASHCMD_8(reg_dest,0,INTEL_FLASH_ERASE_CONFIRM)

1:		lbu	t0,0(reg_dest)	/* loop till bit 7 is set */
		andi	t0,0x80
		beq	t0,zero,1b

		FLASHCMD_8(reg_dest,0,INTEL_FLASH_READ_MODE)

		b	nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:		bne	reg_op,FEOP_INTEL_ERASE16,99f	/* Intel erase 16-bit */

		ADDPTR	reg_dest,reg_dest,reg_base

/* XXX copy of 8-bit erase, is this right? */

		FLASHCMD_8(reg_dest,0,INTEL_FLASH_ERASE_BLOCK)
		FLASHCMD_8(reg_dest,0,INTEL_FLASH_ERASE_CONFIRM)

1:		lbu	t0,0(reg_dest)	/* loop till bit 7 is set */
		andi	t0,0x80
		beq	t0,zero,1b

		FLASHCMD_8(reg_dest,0,INTEL_FLASH_READ_MODE)

		b	nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:		bne	reg_op,FEOP_INTEL_PGM8,99f     /* Intel 8-bit program */

		ADDPTR	reg_dest,reg_dest,reg_base

11:		FLASHCMD_8(reg_dest,0,INTEL_FLASH_PROGRAM)

		lbu	t0,0(reg_src)
		sb	t0,0(reg_dest)

1:		lbu	t0,0(reg_dest)	/* loop till bit 7 is set */
		andi	t0,0x80
		beq	t0,zero,1b

		lbu	t0,0(reg_dest)	/* contains final result */
		/* If good, bits 1, 3, 4 will not be set */

		add     reg_src,1
		ADDPTR  reg_dest,1
		sub     reg_cnt,1
		bgt	reg_cnt,zero,11b

		FLASHCMD_8(reg_dest,0,INTEL_FLASH_READ_MODE)

		b	nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:		bne	reg_op,FEOP_INTEL_PGM16,99f    /* Intel 16-bit prog */

		ADDPTR	reg_dest,reg_dest,reg_base

11:		FLASHCMD_16(reg_dest,0,INTEL_FLASH_PROGRAM)

		lh	t0,0(reg_src)
		sh	t0,0(reg_dest)

1:		lh	t0,0(reg_dest)	/* loop till bit 7 is set */
		andi	t0,0x80
		beq	t0,zero,1b

		lh	t0,0(reg_dest)	/* contains final result */
		/* If good, bits 1, 3, 4 will not be set */

		add     reg_src,2
		ADDPTR  reg_dest,2
		sub     reg_cnt,2
		bgt	reg_cnt,zero,11b

		FLASHCMD_16(reg_dest,0,INTEL_FLASH_READ_MODE)

		b	nextinst
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:		bne	reg_op,FEOP_INTEL_PGM32B,99f     /* Intel 8bit pgm with 32 byte buffer wrt*/

		ADDPTR	reg_dest,reg_dest,reg_base
		or	reg_dsave,reg_dest,zero		/* Save original dest pointer */

11:		FLASHCMD_8(reg_dest,0,INTEL_FLASH_WRITE_BUFFER)

		lbu	t0,0(reg_dest)	/* loop till bit 7 is set in ext-status reg */
		andi	t0,0x80
		beq	t0,zero,11b

		li	reg_cnt2,31	/* device wants n-1 value */
		sb	reg_cnt2,0(reg_dest)	/* write the count to the device */
		li	reg_cnt2,32	/* actually writing 32 bytes (loop value) */

#if defined(BCM47XX) && ENDIAN_BIG
22:		xori	reg_src,reg_src,0x3
		lbu	t0,0(reg_src)
		xori	reg_src,reg_src,0x3
		xori	reg_dest,reg_dest,0x3
		sb	t0,0(reg_dest)
		xori	reg_dest,reg_dest,0x3
#else
22:		lbu	t0,0(reg_src)
		sb	t0,0(reg_dest)
#endif

		add     reg_src,1
		add     reg_dest,1
		sub     reg_cnt,1
		sub     reg_cnt2,1
		bgt	reg_cnt2,zero,22b

		FLASHCMD_8(reg_dsave,0,INTEL_FLASH_ERASE_CONFIRM)

 		bgt	reg_cnt,zero,11b

		FLASHCMD_8(reg_dsave,0,INTEL_FLASH_READ_STATUS)

2:		lbu	t0,0(reg_dsave)	/* loop till bit 7 is set */
		andi	t0,0x80
		beq	t0,zero,2b

		lbu	t0,0(reg_dsave)	/* contains final result */
		/* If good, bits 1, 3, 4 will not be set */

		FLASHCMD_8(reg_dsave,0,INTEL_FLASH_READ_MODE)

		b	nextinst
#endif
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:		li      v1,-1			  /* invalid command */

nextinst:	SR	v1,FEINST_RESULT(a0)	  /* store result of instruction */
		ADD	v0,v0,v1		  /* add to total */
		ADD	a0,FEINST_SIZE		  /* advance to next instr. */
		b	instloop

flashop_engine_end:
		nop

END(flashop_engine)

		.sdata

		.globl	flashop_engine_ptr
		.globl	flashop_engine_len

flashop_engine_ptr:
		_VECT_	flashop_engine
flashop_engine_len:
		.word	flashop_engine_end-flashop_engine



/*  *********************************************************************
    *  end
    ********************************************************************* */