📄 bcm1480_pm.h
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#define G_BCM1480_PM_MAP_DEST_ID8(x) _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID8,M_BCM1480_PM_MAP_DEST_ID8)#define S_BCM1480_PM_MAP_DEST_ID16 8#define M_BCM1480_PM_MAP_DEST_ID16 _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID16)#define V_BCM1480_PM_MAP_DEST_ID16(x) _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID16)#define G_BCM1480_PM_MAP_DEST_ID16(x) _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID16,M_BCM1480_PM_MAP_DEST_ID16)#define S_BCM1480_PM_MAP_DEST_ID24 12#define M_BCM1480_PM_MAP_DEST_ID24 _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID24)#define V_BCM1480_PM_MAP_DEST_ID24(x) _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID24)#define G_BCM1480_PM_MAP_DEST_ID24(x) _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID24,M_BCM1480_PM_MAP_DEST_ID24)#define M_BCM1480_PM_MAP_DEST_HALF0 _SB_MAKEMASK1(2)#define M_BCM1480_PM_MAP_DEST_HALF8 _SB_MAKEMASK1(6)#define M_BCM1480_PM_MAP_DEST_HALF16 _SB_MAKEMASK1(10)#define M_BCM1480_PM_MAP_DEST_HALF24 _SB_MAKEMASK1(14)#define K_BCM1480_PM_MAP_DEST_ID_TX0 0#define K_BCM1480_PM_MAP_DEST_ID_TX1 1#define K_BCM1480_PM_MAP_DEST_ID_TX2 2 /* * Global Debug Mode Register (Table 307) */#define M_BCM1480_PM_DEBUG_MODE _SB_MAKEMASK1(0)#define M_BCM1480_PM_READ_PRIORITY _SB_MAKEMASK1(1)#define M_BCM1480_PM_WRITE_PRIORITY _SB_MAKEMASK1(2)/* * PxD Global Debug Register (Table 308) *//* * PIB Global Debug Register (Table 310) *//* * PxD Local Debug Register (Table 311) *//* * PIB Local Debug Register (Table 312) *//* * POB Local Debug Register (Table 313) *//* * Prefetch Count Register (Table 314) */#define S_BCM1480_PM_PREF_COUNT 0#define M_BCM1480_PM_PREF_COUNT _SB_MAKEMASK(20,S_BCM1480_PM_PREF_COUNT)#define V_BCM1480_PM_PREF_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_PM_PREF_COUNT)#define G_BCM1480_PM_PREF_COUNT(x) _SB_GETVALUE(x,S_BCM1480_PM_PREF_COUNT,M_BCM1480_PM_PREF_COUNT)/* * Descriptor Prefetch Index Register (Table 315) */#define S_BCM1480_PM_PREFETCH 0#define M_BCM1480_PM_PREFETCH _SB_MAKEMASK(20,S_BCM1480_PM_PREFETCH)#define V_BCM1480_PM_PREFETCH(x) _SB_MAKEVALUE(x,S_BCM1480_PM_PREFETCH)#define G_BCM1480_PM_PREFETCH(x) _SB_GETVALUE(x,S_BCM1480_PM_PREFETCH,M_BCM1480_PM_PREFETCH)/* ********************************************************************* * DMA Descriptors ********************************************************************* *//* * Packet Manager descriptor, doubleword 0 (Figure 74) */#define S_BCM1480_PM_DSCR0_RSVD _SB_MAKE64(0)#define M_BCM1480_PM_DSCR0_RSVD _SB_MAKEMASK(32,S_BCM1480_PM_DSCR0_RSVD)#define S_BCM1480_PM_DSCR0_BUFFER_LENGTH _SB_MAKE64(32)#define M_BCM1480_PM_DSCR0_BUFFER_LENGTH _SB_MAKEMASK(16,S_BCM1480_PM_DSCR0_BUFFER_LENGTH)#define V_BCM1480_PM_DSCR0_BUFFER_LENGTH(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR0_BUFFER_LENGTH)#define G_BCM1480_PM_DSCR0_BUFFER_LENGTH(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR0_BUFFER_LENGTH,M_BCM1480_PM_DSCR0_BUFFER_LENGTH)/* status/control (Table 292) */#define M_BCM1480_PM_DSCR0_PE _SB_MAKEMASK1(55)#define M_BCM1480_PM_DSCR0_SE _SB_MAKEMASK1(56)#define M_BCM1480_PM_DSCR0_LE _SB_MAKEMASK1(57)#define M_BCM1480_PM_DSCR0_INT _SB_MAKEMASK1(60)#define M_BCM1480_PM_DSCR0_EOP _SB_MAKEMASK1(61)#define M_BCM1480_PM_DSCR0_SOP _SB_MAKEMASK1(62)#define M_BCM1480_PM_DSCR0_HW _SB_MAKEMASK1(63)/* source port (rx only) */#define S_BCM1480_PM_DSCR0_SWID _SB_MAKE64(58)#define M_BCM1480_PM_DSCR0_SWID _SB_MAKEMASK(2,S_BCM1480_PM_DSCR0_SWID)#define V_BCM1480_PM_DSCR0_SWID(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSRC0_SWID)#define G_BCM1480_PM_DSCR0_SWID(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR0_SWID,M_BCM1480_PM_DSCR0_SWID)#define K_BCM1480_PM_DSCR0_SWID_RX0 0#define K_BCM1480_PM_DSCR0_SWID_RX1 1#define K_BCM1480_PM_DSCR0_SWID_RX2 2 /* * Packet Manager descriptor, doubleword 1 (Figure 74) */#define S_BCM1480_PM_DSCR1_BUFFER_ADDR _SB_MAKE64(0)#define M_BCM1480_PM_DSCR1_BUFFER_ADDR _SB_MAKEMASK(40,S_BCM1480_PM_DSCR1_BUFFER_ADDR)#define V_BCM1480_PM_DSCR1_BUFFER_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR1_BUFFER_ADDR)#define G_BCM1480_PM_DSCR1_BUFFER_ADDR(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR1_BUFFER_ADDR,M_BCM1480_PM_DSCR1_BUFFER_ADDR)#define S_BCM1480_PM_DSCR1_IVC _SB_MAKE64(40)#define M_BCM1480_PM_DSCR1_IVC _SB_MAKEMASK(8,S_BCM1480_PM_DSCR1_IVC)#define V_BCM1480_PM_DSCR1_IVC(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR1_IVC)#define G_BCM1480_PM_DSCR1_IVC(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR1_IVC,M_BCM1480_PM_DSCR1_IVC)#define S_BCM1480_PM_DSCR1_NEXT_DEST _SB_MAKE64(48)#define M_BCM1480_PM_DSCR1_NEXT_DEST _SB_MAKEMASK(4,S_BCM1480_PM_DSCR1_NEXT_DEST)#define V_BCM1480_PM_DSCR1_NEXT_DEST(x) _SB_MAKEVALUE(x,S_BCM1480_PM_DSCR1_NEXT_DEST)#define G_BCM1480_PM_DSCR1_NEXT_DEST(x) _SB_GETVALUE(x,S_BCM1480_PM_DSCR1_NEXT_DEST,M_BCM1480_PM_DSCR1_NEXT_DEST)#define S_BCM1480_PM_DSCR1_RSVD _SB_MAKE64(52)#define M_BCM1480_PM_DSCR1_RSVD _SB_MAKEMASK(12,S_BCM1480_PM_DSCR1_RSVD)/* ********************************************************************* * Switch performance counters ********************************************************************* */#define M_BCM1480_SWPERF_CFG_CLEAR _SB_MAKEMASK1(62)#define M_BCM1480_SWPERF_CFG_ENABLE _SB_MAKEMASK1(63)#define S_BCM1480_SWPERF_CFG_C0SRC 0#define M_BCM1480_SWPERF_CFG_C0SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C0SRC)#define V_BCM1480_SWPERF_CFG_C0SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C0SRC)#define G_BCM1480_SWPERF_CFG_C0SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C0SRC,M_BCM1480_SWPERF_CFG_C0SRC)#define S_BCM1480_SWPERF_CFG_C0FILT 8#define M_BCM1480_SWPERF_CFG_C0FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C0FILT)#define V_BCM1480_SWPERF_CFG_C0FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C0FILT)#define G_BCM1480_SWPERF_CFG_C0FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C0FILT,M_BCM1480_SWPERF_CFG_C0FILT)#define M_BCM1480_SWPERF_CFG_C0FENA _SB_MAKEMASK1(11)#define S_BCM1480_SWPERF_CFG_C1SRC 16#define M_BCM1480_SWPERF_CFG_C1SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C1SRC)#define V_BCM1480_SWPERF_CFG_C1SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C1SRC)#define G_BCM1480_SWPERF_CFG_C1SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C1SRC,M_BCM1480_SWPERF_CFG_C1SRC)#define S_BCM1480_SWPERF_CFG_C1FILT 24#define M_BCM1480_SWPERF_CFG_C1FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C1FILT)#define V_BCM1480_SWPERF_CFG_C1FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C1FILT)#define G_BCM1480_SWPERF_CFG_C1FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C1FILT,M_BCM1480_SWPERF_CFG_C1FILT)#define M_BCM1480_SWPERF_CFG_C1FENA _SB_MAKEMASK1(27)#define S_BCM1480_SWPERF_CFG_C2SRC 32#define M_BCM1480_SWPERF_CFG_C2SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C2SRC)#define V_BCM1480_SWPERF_CFG_C2SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C2SRC)#define G_BCM1480_SWPERF_CFG_C2SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C2SRC,M_BCM1480_SWPERF_CFG_C2SRC)#define S_BCM1480_SWPERF_CFG_C2FILT 40#define M_BCM1480_SWPERF_CFG_C2FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C2FILT)#define V_BCM1480_SWPERF_CFG_C2FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C2FILT)#define G_BCM1480_SWPERF_CFG_C2FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C2FILT,M_BCM1480_SWPERF_CFG_C2FILT)#define M_BCM1480_SWPERF_CFG_C2FENA _SB_MAKEMASK1(43)#define S_BCM1480_SWPERF_CFG_C3SRC 48#define M_BCM1480_SWPERF_CFG_C3SRC _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_C3SRC)#define V_BCM1480_SWPERF_CFG_C3SRC(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C3SRC)#define G_BCM1480_SWPERF_CFG_C3SRC(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C3SRC,M_BCM1480_SWPERF_CFG_C3SRC)#define S_BCM1480_SWPERF_CFG_C3FILT 56#define M_BCM1480_SWPERF_CFG_C3FILT _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_C3FILT)#define V_BCM1480_SWPERF_CFG_C3FILT(x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_C3FILT)#define G_BCM1480_SWPERF_CFG_C3FILT(x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_C3FILT,M_BCM1480_SWPERF_CFG_C3FILT)#define M_BCM1480_SWPERF_CFG_C3FENA _SB_MAKEMASK1(59)/* This macro lets you specify counters by index */#define S_BCM1480_SWPERF_CFG_CXSRC(c) (0+(c)*16)#define M_BCM1480_SWPERF_CFG_CXSRC(c) _SB_MAKEMASK(8,S_BCM1480_SWPERF_CFG_CXSRC(c))#define V_BCM1480_SWPERF_CFG_CXSRC(c,x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_CXSRC(c))#define G_BCM1480_SWPERF_CFG_CXSRC(c,x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_CXSRC(c),M_BCM1480_SWPERF_CFG_CXSRC(c))#define S_BCM1480_SWPERF_CFG_CXFILT(c) (8+(c)*16)#define M_BCM1480_SWPERF_CFG_CXFILT(c) _SB_MAKEMASK(3,S_BCM1480_SWPERF_CFG_CXFILT(c))#define V_BCM1480_SWPERF_CFG_CXFILT(c,x) _SB_MAKEVALUE(x,S_BCM1480_SWPERF_CFG_CXFILT(c))#define G_BCM1480_SWPERF_CFG_CXFILT(c,x) _SB_GETVALUE(x,S_BCM1480_SWPERF_CFG_CXFILT(c),M_BCM1480_SWPERF_CFG_CXFILT(c))#define M_BCM1480_SWPERF_CFG_CXFENA(c) _SB_MAKEMASK1(11+(c)*16)/* * List of available counters */#define K_BCM1480_SWPERF_CFG_CXSRC_NONE 0#define K_BCM1480_SWPERF_CFG_CXSRC_SWCYCLES 1#define K_BCM1480_SWPERF_CFG_CXSRC_FILTPORTS 2#define K_BCM1480_SWPERF_CFG_CXSRC_SGNT 3#define K_BCM1480_SWPERF_CFG_CXSRC_SREQ 4#define K_BCM1480_SWPERF_CFG_CXSRC_SRELOA 5#define K_BCM1480_SWPERF_CFG_CXSRC_DGNT 6#define K_BCM1480_SWPERF_CFG_CXSRC_DREQ 7#define K_BCM1480_SWPERF_CFG_CXSRC_DRELOAD 8/* * Switch agents */#define K_BCM1480_SWAGENT_HSP0 0#define K_BCM1480_SWAGENT_HSP1 1#define K_BCM1480_SWAGENT_HSP2 2#define K_BCM1480_SWAGENT_NC 4#define K_BCM1480_SWAGENT_HT 5#define K_BCM1480_SWAGENT_PM 6/* ********************************************************************* * Switch Trace Registers ********************************************************************* *//* * Switch trigger control match (Table 322) */
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