bcm1480_pm.h

一个很好的嵌入式linux平台下的bootloader

/*  *********************************************************************
    *  BCM1280/BCM1480 Board Support Package
    *  
    *  Packet manager constants and macros	File: bcm1480_pm.h
    *  
    *  This module contains constants useful for manipulating the
    *  BCM1280/BCM1480 packet manager.
    *  
    *  BCM1400 specification level:  1X55_1X80-UM100-D4 (11/24/03)
    *  
    *********************************************************************  
    *
    *  Copyright 2000,2001,2002,2003
    *  Broadcom Corporation. All rights reserved.
    *  
    *  This software is furnished under license and may be used and 
    *  copied only in accordance with the following terms and 
    *  conditions.  Subject to these conditions, you may download, 
    *  copy, install, use, modify and distribute modified or unmodified 
    *  copies of this software in source and/or binary form.  No title 
    *  or ownership is transferred hereby.
    *  
    *  1) Any source code used, modified or distributed must reproduce 
    *     and retain this copyright notice and list of conditions 
    *     as they appear in the source file.
    *  
    *  2) No right is granted to use any trade name, trademark, or 
    *     logo of Broadcom Corporation.  The "Broadcom Corporation" 
    *     name may not be used to endorse or promote products derived 
    *     from this software without the prior written permission of 
    *     Broadcom Corporation.
    *  
    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 
    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 
    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 
    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 
    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 
    *     THE POSSIBILITY OF SUCH DAMAGE.
    ********************************************************************* */

#ifndef _BCM1480_PM_H
#define _BCM1480_PM_H

#include "sb1250_defs.h"

/*  *********************************************************************
    *  DMA Registers
    ********************************************************************* */

/*
 * Base and Size Register (Table 294)
 */

#define S_BCM1480_PM_BASE                    0
#define M_BCM1480_PM_BASE                    _SB_MAKEMASK(40,S_BCM1480_PM_BASE)
#define V_BCM1480_PM_BASE(x)                 _SB_MAKEVALUE(x,S_BCM1480_PM_BASE)
#define G_BCM1480_PM_BASE(x)                 _SB_GETVALUE(x,S_BCM1480_PM_BASE,M_BCM1480_PM_BASE)

#define S_BCM1480_PM_SIZE                    40
#define M_BCM1480_PM_SIZE                    _SB_MAKEMASK(20,S_BCM1480_PM_SIZE)
#define V_BCM1480_PM_SIZE(x)                 _SB_MAKEVALUE(x,S_BCM1480_PM_SIZE)
#define G_BCM1480_PM_SIZE(x)                 _SB_GETVALUE(x,S_BCM1480_PM_SIZE,M_BCM1480_PM_SIZE)

/*
 * Descriptor Merge Timer (Table 295)
 */

#define S_BCM1480_PM_DS_MT_CNT              0
#define M_BCM1480_PM_DS_MT_CNT              _SB_MAKEMASK(6,S_BCM1480_PM_DS_MT_CNT)
#define V_BCM1480_PM_DS_MT_CNT(x)           _SB_MAKEVALUE(x,S_BCM1480_PM_DS_MT_CNT)
#define G_BCM1480_PM_DS_MT_CNT(x)           _SB_GETVALUE(x,S_BCM1480_PM_DS_MT_CNT,M_BCM1480_PM_DS_MT_CNT)

/*
 * L2 Cache Attribute (Table 296)
 */

#define S_BCM1480_PM_HDR_SIZE                0
#define M_BCM1480_PM_HDR_SIZE                _SB_MAKEMASK(9,S_BCM1480_PM_HDR_SIZE)
#define V_BCM1480_PM_HDR_SIZE(x)             _SB_MAKEVALUE(x,S_BCM1480_PM_HDR_SIZE)
#define G_BCM1480_PM_HDR_SIZE(x)             _SB_GETVALUE(x,S_BCM1480_PM_HDR_SIZE,M_BCM1480_PM_HDR_SIZE)

/*
 * Descriptor Count Register (Table 297)
 */

#define S_BCM1480_PM_COUNT                 0
#define M_BCM1480_PM_COUNT                 _SB_MAKEMASK(20,S_BCM1480_PM_COUNT)
#define V_BCM1480_PM_COUNT(x)              _SB_MAKEVALUE(x,S_BCM1480_PM_COUNT)
#define G_BCM1480_PM_COUNT(x)              _SB_GETVALUE(x,S_BCM1480_PM_COUNT,M_BCM1480_PM_COUNT)

/*
 * Current Descriptor Index Register (Table 298)
 */

#define S_BCM1480_PM_LAST                    0
#define M_BCM1480_PM_LAST                    _SB_MAKEMASK(20,S_BCM1480_PM_LAST)
#define V_BCM1480_PM_LAST(x)                 _SB_MAKEVALUE(x,S_BCM1480_PM_LAST)
#define G_BCM1480_PM_LAST(x)                 _SB_GETVALUE(x,S_BCM1480_PM_LAST,M_BCM1480_PM_LAST)

/*
 * Packet Manager Queue Configuration (Table 299)
 */

#define M_BCM1480_PM_QUEUE_ENABLE           _SB_MAKEMASK1(0)
#define M_BCM1480_PM_DS_CACHE_EN            _SB_MAKEMASK1(1)
#define M_BCM1480_PM_HW_ASSERT              _SB_MAKEMASK1(2)
#define M_BCM1480_PM_HW_ERROR               _SB_MAKEMASK1(3)

#define S_BCM1480_PM_SW_ERROR               4
#define M_BCM1480_PM_SW_ERROR               _SB_MAKEMASK(3,S_BCM1480_PM_SW_ERROR)
#define V_BCM1480_PM_SW_ERROR(x)            _SB_MAKEVALUE(x,S_BCM1480_PM_SW_ERROR)
#define G_BCM1480_PM_SW_ERROR(x)            _SB_GETVALUE(x,S_BCM1480_PM_SW_ERROR,M_BCM1480_PM_SW_ERROR)
#define K_BCM1480_PM_SW_ERROR_NONE          0x0
#define K_BCM1480_PM_SW_ERROR_HWBIT         0x1

#define M_BCM1480_PM_FLUSH                  _SB_MAKEMASK1(7)

/*
 * Interrupt Configuration (Table 300)
 */

#define S_BCM1480_PM_INT_CORE_ID            0
#define M_BCM1480_PM_INT_CORE_ID            _SB_MAKEMASK(2,S_BCM1480_PM_INT_CORE_ID)
#define V_BCM1480_PM_INT_CORE_ID(x)         _SB_MAKEVALUE(x,S_BCM1480_PM_INT_CORE_ID)
#define G_BCM1480_PM_INT_CORE_ID(x)         _SB_GETVALUE(x,S_BCM1480_PM_INT_CORE_ID,M_BCM1480_PM_INT_CORE_ID)

#define M_BCM1480_PM_INT_PRIORITY           _SB_MAKEMASK1(4)

#define S_BCM1480_PM_INT_TIMEOUT            5
#define M_BCM1480_PM_INT_TIMEOUT            _SB_MAKEMASK(5,S_BCM1480_PM_INT_TIMEOUT)
#define V_BCM1480_PM_INT_TIMEOUT(x)         _SB_MAKEVALUE(x,S_BCM1480_PM_INT_TIMEOUT)
#define G_BCM1480_PM_INT_TIMEOUT(x)         _SB_GETVALUE(x,S_BCM1480_PM_INT_TIMEOUT,M_BCM1480_PM_INT_TIMEOUT)

#define S_BCM1480_PM_INT_PKT_CNT            11
#define M_BCM1480_PM_INT_PKT_CNT            _SB_MAKEMASK(12,S_BCM1480_PM_INT_PKT_CNT)
#define V_BCM1480_PM_INT_PKT_CNT(x)         _SB_MAKEVALUE(x,S_BCM1480_PM_INT_PKT_CNT)
#define G_BCM1480_PM_INT_PKT_CNT(x)         _SB_GETVALUE(x,S_BCM1480_PM_INT_PKT_CNT,M_BCM1480_PM_INT_PKT_CNT)

/*
 * Interrupt Watermark (Table 301)
 */

#define S_BCM1480_PM_LOW_WATERMARK          0
#define M_BCM1480_PM_LOW_WATERMARK          _SB_MAKEMASK(20,S_BCM1480_PM_LOW_WATERMARK)
#define V_BCM1480_PM_LOW_WATERMARK(x)       _SB_MAKEVALUE(x,S_BCM1480_PM_LOW_WATERMARK)
#define G_BCM1480_PM_LOW_WATERMARK(x)       _SB_GETVALUE(x,S_BCM1480_PM_LOW_WATERMARK,M_BCM1480_PM_LOW_WATERMARK)

#define S_BCM1480_PM_HIGH_WATERMARK         20
#define M_BCM1480_PM_HIGH_WATERMARK         _SB_MAKEMASK(20,S_BCM1480_PM_HIGH_WATERMARK)
#define V_BCM1480_PM_HIGH_WATERMARK(x)      _SB_MAKEVALUE(x,S_BCM1480_PM_HIGH_WATERMARK)
#define G_BCM1480_PM_HIGH_WATERMARK(x)      _SB_GETVALUE(x,S_BCM1480_PM_HIGH_WATERMARK,M_BCM1480_PM_HIGH_WATERMARK)


/*
 * NOTE: Interrupt Bits (Tables 9-36 to 9-38) are packed 8 per word
 *       per Table 9-39.
 */


#define S_BCM1480_PM_INT(q)                 ((q%8)<<8)
#define M_BCM1480_PM_INT(q)                 _SB_MAKEMASK(8,S_BCM1480_PM_INT(q))
#define V_BCM1480_PM_INT(x,q)               _SB_MAKEVALUE((x&((1<<8)-1)),S_BCM1480_PM_INT(q))
#define G_BCM1480_PM_INT(x,q)               _SB_GETVALUE(x,S_BCM1480_PM_INT(q),M_BCM1480_PM_INT(q))


/*
 * Input/Output Queue Interrupt Status Register (Table 302)
 */

#define M_BCM1480_PM_EOP_COUNT              _SB_MAKEMASK1(0)
#define M_BCM1480_PM_EOP_SEEN               _SB_MAKEMASK1(1)
#define M_BCM1480_PM_RCV_TIMER              _SB_MAKEMASK1(2)
#define M_BCM1480_PM_DE                     _SB_MAKEMASK1(3)
#define M_BCM1480_PM_HWM                    _SB_MAKEMASK1(4)
#define M_BCM1480_PM_LWM                    _SB_MAKEMASK1(5)
#define M_BCM1480_PM_RX_ERR                 _SB_MAKEMASK1(6)
#define M_BCM1480_PM_PE_ERR                 _SB_MAKEMASK1(7)

/*
 * Input/Output Queue Interrupt Mask Register (Table 303)
 */

#define M_BCM1480_PM_EOP_COUNT_MSK          _SB_MAKEMASK1(0)
#define M_BCM1480_PM_EOP_SEEN_MSK           _SB_MAKEMASK1(1)
#define M_BCM1480_PM_RCV_TIMER_MSK          _SB_MAKEMASK1(2)
#define M_BCM1480_PM_DE_MSK                 _SB_MAKEMASK1(3)
#define M_BCM1480_PM_HWM_MSK                _SB_MAKEMASK1(4)
#define M_BCM1480_PM_LWM_MSK                _SB_MAKEMASK1(5)
#define M_BCM1480_PM_RX_ERR_MSK             _SB_MAKEMASK1(6)
#define M_BCM1480_PM_PE_ERR_MSK             _SB_MAKEMASK1(7)

/*
 * Input/Output Queue Interrupt Clear Register (Table 304)
 */

#define M_BCM1480_PM_EOP_COUNT_CLR          _SB_MAKEMASK1(0)
#define M_BCM1480_PM_EOP_SEEN_CLR           _SB_MAKEMASK1(1)
#define M_BCM1480_PM_RCV_TIMER_CLR          _SB_MAKEMASK1(2)
#define M_BCM1480_PM_DE_CLR                 _SB_MAKEMASK1(3)
#define M_BCM1480_PM_RX_ERR_CLR             _SB_MAKEMASK1(6)
#define M_BCM1480_PM_PE_ERR_CLR             _SB_MAKEMASK1(7)

/*
 * Merged Interrupt Status Register (Table 306)
 */

#define M_INT_N(n)                   _SB_MAKEMASK1(n)


/*
 * PMO Mapping Register (Table 279)
 */

#define S_BCM1480_PM_MAP_DEST_ID0          0
#define M_BCM1480_PM_MAP_DEST_ID0          _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID0)
#define V_BCM1480_PM_MAP_DEST_ID0(x)       _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID0)
#define G_BCM1480_PM_MAP_DEST_ID0(x)       _SB_GETVALUE(x,S_BCM1480_PM_MAP_DEST_ID0,M_BCM1480_PM_MAP_DEST_ID0)

#define S_BCM1480_PM_MAP_DEST_ID8          4
#define M_BCM1480_PM_MAP_DEST_ID8          _SB_MAKEMASK(2,S_BCM1480_PM_MAP_DEST_ID8)
#define V_BCM1480_PM_MAP_DEST_ID8(x)       _SB_MAKEVALUE(x,S_BCM1480_PM_MAP_DEST_ID8)