📄 bcm1480_hsp.h
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#define V_BCM1480_HSP_TXPLL_FREQF_SEL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXPLL_FREQF_SEL)#define G_BCM1480_HSP_TXPLL_FREQF_SEL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXPLL_FREQF_SEL,M_BCM1480_HSP_TXPLL_FREQF_SEL)#define S_BCM1480_HSP_TXPLL_FDBK_SEL 4#define M_BCM1480_HSP_TXPLL_FDBK_SEL _SB_MAKEMASK(4,S_BCM1480_HSP_TXPLL_FDBK_SEL)#define V_BCM1480_HSP_TXPLL_FDBK_SEL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXPLL_FDBK_SEL)#define G_BCM1480_HSP_TXPLL_FDBK_SEL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXPLL_FDBK_SEL,M_BCM1480_HSP_TXPLL_FDBK_SEL)#define S_BCM1480_HSP_TXPLL_VCO_RANGE 8#define M_BCM1480_HSP_TXPLL_VCO_RANGE _SB_MAKEMASK(2,S_BCM1480_HSP_TXPLL_VCO_RANGE)#define V_BCM1480_HSP_TXPLL_VCO_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXPLL_VCO_RANGE)#define G_BCM1480_HSP_TXPLL_VCO_RANGE(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXPLL_VCO_RANGE,M_BCM1480_HSP_TXPLL_VCO_RANGE)#define M_BCM1480_HSP_TXPLL_DIV4 _SB_MAKEMASK1(10)#define M_BCM1480_HSP_TXPLL_ESTOREDEPTH8 _SB_MAKEMASK1(11)#define M_BCM1480_HSP_TXPLL_PLLOVERRIDE _SB_MAKEMASK1(12)#define M_BCM1480_HSP_TXPLL_VCOOVERRIDE _SB_MAKEMASK1(13)#define S_BCM1480_HSP_TXPLL_TX_PLLTEST 14#define M_BCM1480_HSP_TXPLL_TX_PLLTEST _SB_MAKEMASK(2,S_BCM1480_HSP_TXPLL_TX_PLLTEST)#define V_BCM1480_HSP_TXPLL_TX_PLLTEST(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXPLL_TX_PLLTEST)#define G_BCM1480_HSP_TXPLL_TX_PLLTEST(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXPLL_TX_PLLTEST,M_BCM1480_HSP_TXPLL_TX_PLLTEST)#define S_BCM1480_HSP_TXPLL_TX_PLLCTRL 16#define M_BCM1480_HSP_TXPLL_TX_PLLCTRL _SB_MAKEMASK(6,S_BCM1480_HSP_TXPLL_TX_PLLCTRL)#define V_BCM1480_HSP_TXPLL_TX_PLLCTRL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXPLL_TX_PLLCTRL)#define G_BCM1480_HSP_TXPLL_TX_PLLCTRL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXPLL_TX_PLLCTRL,M_BCM1480_HSP_TXPLL_TX_PLLCTRL)/* * RX and TX calibration registers (Table 376) * BROADCOM USE ONLY */#define M_BCM1480_HSP_CAL_STARTCAL2 _SB_MAKEMASK1(0)#define M_BCM1480_HSP_CAL_PDTEST _SB_MAKEMASK1(1)#define M_BCM1480_HSP_CAL_CALFIN _SB_MAKEMASK1(2)#define M_BCM1480_HSP_CAL_S100M66M _SB_MAKEMASK1(3)#define M_BCM1480_HSP_CAL_NO_CALIB _SB_MAKEMASK1(4)#define S_BCM1480_HSP_CAL_BMODE 5#define M_BCM1480_HSP_CAL_BMODE _SB_MAKEMASK(2,S_BCM1480_HSP_CAL_BMODE)#define V_BCM1480_HSP_CAL_BMODE(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_CAL_BMODE)#define G_BCM1480_HSP_CAL_BMODE(x) _SB_GETVALUE(x,S_BCM1480_HSP_CAL_BMODE,M_BCM1480_HSP_CAL_BMODE)#define S_BCM1480_HSP_CAL_CALSETP 8#define M_BCM1480_HSP_CAL_CALSETP _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALSETP)#define V_BCM1480_HSP_CAL_CALSETP(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_CAL_CALSETP)#define G_BCM1480_HSP_CAL_CALSETP(x) _SB_GETVALUE(x,S_BCM1480_HSP_CAL_CALSETP,M_BCM1480_HSP_CAL_CALSETP)#define S_BCM1480_HSP_CAL_CALSETN 12#define M_BCM1480_HSP_CAL_CALSETN _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALSETN)#define V_BCM1480_HSP_CAL_CALSETN(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_CAL_CALSETN)#define G_BCM1480_HSP_CAL_CALSETN(x) _SB_GETVALUE(x,S_BCM1480_HSP_CAL_CALSETN,M_BCM1480_HSP_CAL_CALSETN)#define S_BCM1480_HSP_CAL_CALPSTAT 16#define M_BCM1480_HSP_CAL_CALPSTAT _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALPSTAT)#define V_BCM1480_HSP_CAL_CALPSTAT(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_CAL_CALPSTAT)#define G_BCM1480_HSP_CAL_CALPSTAT(x) _SB_GETVALUE(x,S_BCM1480_HSP_CAL_CALPSTAT,M_BCM1480_HSP_CAL_CALPSTAT)#define S_BCM1480_HSP_CAL_CALNSTAT 20#define M_BCM1480_HSP_CAL_CALNSTAT _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALNSTAT)#define V_BCM1480_HSP_CAL_CALNSTAT(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_CAL_CALNSTAT)#define G_BCM1480_HSP_CAL_CALNSTAT(x) _SB_GETVALUE(x,S_BCM1480_HSP_CAL_CALNSTAT,M_BCM1480_HSP_CAL_CALNSTAT)/* * RX Testability (Table 377) * BROADCOM USE ONLY */#define S_BCM1480_HSP_RXTST_EWRAP 1#define M_BCM1480_HSP_RXTST_EWRAP _SB_MAKEMASK(2,S_BCM1480_HSP_RXTST_EWRAP)#define V_BCM1480_HSP_RXTST_EWRAP(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_EWRAP)#define G_BCM1480_HSP_RXTST_EWRAP(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_EWRAP,M_BCM1480_HSP_RXTST_EWRAP)#define M_BCM1480_HSP_RXTST_RXDLL_FREEZE _SB_MAKEMASK1(4)#define M_BCM1480_HSP_RXTST_TX_PLL_BYPASS _SB_MAKEMASK1(5)#define M_BCM1480_HSP_RXTST_RX_PLL_BYPASS _SB_MAKEMASK1(6)#define M_BCM1480_HSP_RXTST_DLL_CHRESET_ENABLE _SB_MAKEMASK1(7)#define S_BCM1480_HSP_RXTST_RX_ICNTRL 8#define M_BCM1480_HSP_RXTST_RX_ICNTRL _SB_MAKEMASK(12,S_BCM1480_HSP_RXTST_RX_ICNTRL)#define V_BCM1480_HSP_RXTST_RX_ICNTRL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_RX_ICNTRL)#define G_BCM1480_HSP_RXTST_RX_ICNTRL(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_RX_ICNTRL,M_BCM1480_HSP_RXTST_RX_ICNTRL)#define S_BCM1480_HSP_RXTST_RX_RCNTRL 20#define M_BCM1480_HSP_RXTST_RX_RCNTRL _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_RCNTRL)#define V_BCM1480_HSP_RXTST_RX_RCNTRL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_RX_RCNTRL)#define G_BCM1480_HSP_RXTST_RX_RCNTRL(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_RX_RCNTRL,M_BCM1480_HSP_RXTST_RX_RCNTRL)#define S_BCM1480_HSP_RXTST_RX_GCNTRL 24#define M_BCM1480_HSP_RXTST_RX_GCNTRL _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_GCNTRL)#define V_BCM1480_HSP_RXTST_RX_GCNTRL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_RX_GCNTRL)#define G_BCM1480_HSP_RXTST_RX_GCNTRL(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_RX_GCNTRL,M_BCM1480_HSP_RXTST_RX_GCNTRL)#define S_BCM1480_HSP_RXTST_RX_OORCNTRL 28#define M_BCM1480_HSP_RXTST_RX_OORCNTRL _SB_MAKEMASK(2,S_BCM1480_HSP_RXTST_RX_OORCNTRL)#define V_BCM1480_HSP_RXTST_RX_OORCNTRL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_RX_OORCNTRL)#define G_BCM1480_HSP_RXTST_RX_OORCNTRL(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_RX_OORCNTRL,M_BCM1480_HSP_RXTST_RX_OORCNTRL)#define S_BCM1480_HSP_RXTST_RX_CNTRL 32#define M_BCM1480_HSP_RXTST_RX_CNTRL _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_CNTRL)#define V_BCM1480_HSP_RXTST_RX_CNTRL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_RX_CNTRL)#define G_BCM1480_HSP_RXTST_RX_CNTRL(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_RX_CNTRL,M_BCM1480_HSP_RXTST_RX_CNTRL)#define S_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA 35#define M_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA)#define V_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA)#define G_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA,M_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA)#define M_BCM1480_HSP_RXTST_DIP4_CHECK_DISABLE _SB_MAKEMASK1(38)#define M_BCM1480_HSP_RXTST_EBUF_WREN _SB_MAKEMASK1(40)#define M_BCM1480_HSP_RXTST_DIGITAL_LOOPBACK _SB_MAKEMASK1(41)#define M_BCM1480_HSP_RXTST_EBUF_BURST_MODE _SB_MAKEMASK1(42)#define M_BCM1480_HSP_RXTST_RESET_STOP_STREAM _SB_MAKEMASK1(43)#define S_BCM1480_HSP_RXTST_RX_BIAS 44#define M_BCM1480_HSP_RXTST_RX_BIAS _SB_MAKEMASK(2,S_BCM1480_HSP_RXTST_RX_BIAS)#define V_BCM1480_HSP_RXTST_RX_BIAS(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXTST_RX_BIAS)#define G_BCM1480_HSP_RXTST_RX_BIAS(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXTST_RX_BIAS,M_BCM1480_HSP_RXTST_RX_BIAS)/* * TX Testability (Table 378) * BROADCOM USE ONLY */#define S_BCM1480_HSP_TXTST_CTL 0#define M_BCM1480_HSP_TXTST_CTL _SB_MAKEMASK(3,S_BCM1480_HSP_TXTST_CTL)#define V_BCM1480_HSP_TXTST_CTL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXTST_CTL)#define G_BCM1480_HSP_TXTST_CTL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXTST_CTL,M_BCM1480_HSP_TXTST_CTL)#define S_BCM1480_HSP_TXTST_BIAS 4#define M_BCM1480_HSP_TXTST_BIAS _SB_MAKEMASK(4,S_BCM1480_HSP_TXTST_BIAS)#define V_BCM1480_HSP_TXTST_BIAS(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXTST_BIAS)#define G_BCM1480_HSP_TXTST_BIAS(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXTST_BIAS,M_BCM1480_HSP_TXTST_BIAS)#define S_BCM1480_HSP_TXTST_VCOM_CTL 8#define M_BCM1480_HSP_TXTST_VCOM_CTL _SB_MAKEMASK(4,S_BCM1480_HSP_TXTST_VCOM_CTL)#define V_BCM1480_HSP_TXTST_VCOM_CTL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXTST_VCOM_CTL)#define G_BCM1480_HSP_TXTST_VCOM_CTL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXTST_VCOM_CTL,M_BCM1480_HSP_TXTST_VCOM_CTL)#define S_BCM1480_HSP_TXTST_MUX_CTL 12#define M_BCM1480_HSP_TXTST_MUX_CTL _SB_MAKEMASK(4,S_BCM1480_HSP_TXTST_MUX_CTL)#define V_BCM1480_HSP_TXTST_MUX_CTL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXTST_MUX_CTL)#define G_BCM1480_HSP_TXTST_MUX_CTL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXTST_MUX_CTL,M_BCM1480_HSP_TXTST_MUX_CTL)#define S_BCM1480_HSP_TXTST_SLEWP_CTL 16#define M_BCM1480_HSP_TXTST_SLEWP_CTL _SB_MAKEMASK(2,S_BCM1480_HSP_TXTST_SLEWP_CTL)#define V_BCM1480_HSP_TXTST_SLEWP_CTL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXTST_SLEWP_CTL)#define G_BCM1480_HSP_TXTST_SLEWP_CTL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXTST_SLEWP_CTL,M_BCM1480_HSP_TXTST_SLEWP_CTL)#define S_BCM1480_HSP_TXTST_SLEWN_CTL 18#define M_BCM1480_HSP_TXTST_SLEWN_CTL _SB_MAKEMASK(2,S_BCM1480_HSP_TXTST_SLEWN_CTL)#define V_BCM1480_HSP_TXTST_SLEWN_CTL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXTST_SLEWN_CTL)#define G_BCM1480_HSP_TXTST_SLEWN_CTL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXTST_SLEWN_CTL,M_BCM1480_HSP_TXTST_SLEWN_CTL)#define S_BCM1480_HSP_TXTST_CURR_CTL 20#define M_BCM1480_HSP_TXTST_CURR_CTL _SB_MAKEMASK(2,S_BCM1480_HSP_TXTST_CURR_CTL)#define V_BCM1480_HSP_TXTST_CURR_CTL(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXTST_CURR_CTL)#define G_BCM1480_HSP_TXTST_CURR_CTL(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXTST_CURR_CTL,M_BCM1480_HSP_TXTST_CURR_CTL)/* * XXX TBD: TABLES 379, 380, 381 * BROADCOM USE ONLY *//* * RX RAM Visibility (Table 382, 383) * BROADCOM USE ONLY */#define S_BCM1480_HSP_RXVIS_RAM 0#define M_BCM1480_HSP_RXVIS_RAM _SB_MAKEMASK(3,S_BCM1480_HSP_RXVIS_RAM)#define V_BCM1480_HSP_RXVIS_RAM(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXVIS_RAM)#define G_BCM1480_HSP_RXVIS_RAM(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXVIS_RAM,M_BCM1480_HSP_RXVIS_RAM)#define K_BCM1480_HSP_RXVIS_RAM_ERAM 0#define K_BCM1480_HSP_RXVIS_RAM_HRAM 1#define K_BCM1480_HSP_RXVIS_RAM_DRAM_0_63 3#define K_BCM1480_HSP_RXVIS_RAM_DRAM_64_127 4#define K_BCM1480_HSP_RXVIS_RAM_DRAM_128_151 5#define S_BCM1480_HSP_RXVIS_RAM_ADDR 16#define M_BCM1480_HSP_RXVIS_RAM_ADDR _SB_MAKEMASK(16,S_BCM1480_HSP_RXVIS_RAM_ADDR)#define V_BCM1480_HSP_RXVIS_RAM_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXVIS_RAM_ADDR)#define G_BCM1480_HSP_RXVIS_RAM_ADDR(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXVIS_RAM_ADDR,M_BCM1480_HSP_RXVIS_RAM_ADDR)/* * RX RF RAM Visibility (Table 384, 385) * BROADCOM USE ONLY */#define S_BCM1480_HSP_RXRFVIS_RAM 0#define M_BCM1480_HSP_RXRFVIS_RAM _SB_MAKEMASK(4,S_BCM1480_HSP_RXRFVIS_RAM)#define V_BCM1480_HSP_RXRFVIS_RAM(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXRFVIS_RAM)#define G_BCM1480_HSP_RXRFVIS_RAM(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXRFVIS_RAM,M_BCM1480_HSP_RXRFVIS_RAM)#define K_BCM1480_HSP_RXRFVIS_RAM_REASS_0_63 0#define K_BCM1480_HSP_RXRFVIS_RAM_REASS_64_127 1#define K_BCM1480_HSP_RXRFVIS_RAM_REASS_META 2#define K_BCM1480_HSP_RXRFVIS_RAM_PL12_RF 3#define K_BCM1480_HSP_RXRFVIS_RAM_PL12_FLOPS 4#define K_BCM1480_HSP_RXRFVIS_RAM_HEADPTRARRAY 5#define K_BCM1480_HSP_RXRFVIS_RAM_TAILPTRARRAY 6#define K_BCM1480_HSP_RXRFVIS_RAM_PRECABVAL 7#define K_BCM1480_HSP_RXRFVIS_RAM_PHITCNTARRAY 8#define S_BCM1480_HSP_RXRFVIS_RAM_ADDR 8#define M_BCM1480_HSP_RXRFVIS_RAM_ADDR _SB_MAKEMASK(8,S_BCM1480_HSP_RXRFVIS_RAM_ADDR)#define V_BCM1480_HSP_RXRFVIS_RAM_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_RXRFVIS_RAM_ADDR)#define G_BCM1480_HSP_RXRFVIS_RAM_ADDR(x) _SB_GETVALUE(x,S_BCM1480_HSP_RXRFVIS_RAM_ADDR,M_BCM1480_HSP_RXRFVIS_RAM_ADDR)/* * XXX TBD: Tables 386, 387, 388, 389 * BROADCOM USE ONLY *//* * TX RAM Visibility (Table 390, 391) * BROADCOM USE ONLY */#define S_BCM1480_HSP_TXVIS_RAM 0#define M_BCM1480_HSP_TXVIS_RAM _SB_MAKEMASK(3,S_BCM1480_HSP_TXVIS_RAM)#define V_BCM1480_HSP_TXVIS_RAM(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXVIS_RAM)#define G_BCM1480_HSP_TXVIS_RAM(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXVIS_RAM,M_BCM1480_HSP_TXVIS_RAM)#define K_BCM1480_HSP_TXVIS_RAM_DRAM_0_63 0#define K_BCM1480_HSP_TXVIS_RAM_DRAM_64_127 1#define K_BCM1480_HSP_TXVIS_RAM_DRAM_128_151 2#define S_BCM1480_HSP_TXVIS_RAM_ADDR 16#define M_BCM1480_HSP_TXVIS_RAM_ADDR _SB_MAKEMASK(16,S_BCM1480_HSP_TXVIS_RAM_ADDR)#define V_BCM1480_HSP_TXVIS_RAM_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXVIS_RAM_ADDR)#define G_BCM1480_HSP_TXVIS_RAM_ADDR(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXVIS_RAM_ADDR,M_BCM1480_HSP_TXVIS_RAM_ADDR)/* * TX RF RAM Visibility (Table 392,393) * BROADCOM USE ONLY */#define S_BCM1480_HSP_TXRFVIS_RAM 0#define M_BCM1480_HSP_TXRFVIS_RAM _SB_MAKEMASK(4,S_BCM1480_HSP_TXRFVIS_RAM)#define V_BCM1480_HSP_TXRFVIS_RAM(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXRFVIS_RAM)#define G_BCM1480_HSP_TXRFVIS_RAM(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXRFVIS_RAM,M_BCM1480_HSP_TXRFVIS_RAM)#define K_BCM1480_HSP_TXRFVIS_RAM_HEADPTRARRAY 0#define K_BCM1480_HSP_TXRFVIS_RAM_TAILPTRARRAY 1#define K_BCM1480_HSP_TXRFVIS_RAM_RFEVENDATA_0_63 2#define K_BCM1480_HSP_TXRFVIS_RAM_RFEVENDATA_64_71 3#define K_BCM1480_HSP_TXRFVIS_RAM_RFEVENMETADATA 4#define K_BCM1480_HSP_TXRFVIS_RAM_RFODDDATA_0_63 5#define K_BCM1480_HSP_TXRFVIS_RAM_RFODDDATA_64_71 6#define K_BCM1480_HSP_TXRFVIS_RAM_RFODDMETADATA 7#define K_BCM1480_HSP_TXRFVIS_RAM_PHITCNTARRAY 8#define K_BCM1480_HSP_TXRFVIS_RAM_PUSHPOP 9#define K_BCM1480_HSP_TXRFVIS_RAM_IVCOK 10#define S_BCM1480_HSP_TXRFVIS_RAM_ADDR 8#define M_BCM1480_HSP_TXRFVIS_RAM_ADDR _SB_MAKEMASK(8,S_BCM1480_HSP_TXRFVIS_RAM_ADDR)#define V_BCM1480_HSP_TXRFVIS_RAM_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_HSP_TXRFVIS_RAM_ADDR)#define G_BCM1480_HSP_TXRFVIS_RAM_ADDR(x) _SB_GETVALUE(x,S_BCM1480_HSP_TXRFVIS_RAM_ADDR,M_BCM1480_HSP_TXRFVIS_RAM_ADDR)#endif /* _BCM1480_HSP_H */⌨️ 快捷键说明
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