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📄 bcm1480_mc.h

📁 一个很好的嵌入式linux平台下的bootloader
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#define M_BCM1480_MC_PVT_BYP_C1_PULLUP      _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C1_PULLUP)#define V_BCM1480_MC_PVT_BYP_C1_PULLUP(x)   _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP)#define G_BCM1480_MC_PVT_BYP_C1_PULLUP(x)   _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP,M_BCM1480_MC_PVT_BYP_C1_PULLUP)#define S_BCM1480_MC_PVT_BYP_C2_PULLDOWN    20#define M_BCM1480_MC_PVT_BYP_C2_PULLDOWN    _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN)#define V_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN)#define G_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN,M_BCM1480_MC_PVT_BYP_C2_PULLDOWN)#define S_BCM1480_MC_PVT_BYP_C2_PULLUP      25#define M_BCM1480_MC_PVT_BYP_C2_PULLUP      _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLUP)#define V_BCM1480_MC_PVT_BYP_C2_PULLUP(x)   _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP)#define G_BCM1480_MC_PVT_BYP_C2_PULLUP(x)   _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP,M_BCM1480_MC_PVT_BYP_C2_PULLUP)#define M_BCM1480_MC_PVT_BYPASS             _SB_MAKEMASK1(30)#define M_BCM1480_MC_PVT_COMP_MOV_AVG       _SB_MAKEMASK1(31)#define M_BCM1480_MC_CLK_CLASS              _SB_MAKEMASK1(34)#define M_BCM1480_MC_DATA_CLASS             _SB_MAKEMASK1(35)#define M_BCM1480_MC_ADDR_CLASS             _SB_MAKEMASK1(36)#define M_BCM1480_MC_DQ_ODT_75              _SB_MAKEMASK1(37)#define M_BCM1480_MC_DQ_ODT_150             _SB_MAKEMASK1(38)#define M_BCM1480_MC_DQS_ODT_75             _SB_MAKEMASK1(39)#define M_BCM1480_MC_DQS_ODT_150            _SB_MAKEMASK1(40)#define M_BCM1480_MC_DQS_DIFF               _SB_MAKEMASK1(41)/* * ECC Test Data Register (Table 95) */#define S_BCM1480_MC_DATA_INVERT            0#define M_DATA_ECC_INVERT           _SB_MAKEMASK(64,S_BCM1480_MC_ECC_INVERT)/* * ECC Test ECC Register (Table 96) */#define S_BCM1480_MC_ECC_INVERT             0#define M_BCM1480_MC_ECC_INVERT             _SB_MAKEMASK(8,S_BCM1480_MC_ECC_INVERT)/* * SDRAM Timing Register  (Table 97) */#define S_BCM1480_MC_tRCD                   0#define M_BCM1480_MC_tRCD                   _SB_MAKEMASK(4,S_BCM1480_MC_tRCD)#define V_BCM1480_MC_tRCD(x)                _SB_MAKEVALUE(x,S_BCM1480_MC_tRCD)#define G_BCM1480_MC_tRCD(x)                _SB_GETVALUE(x,S_BCM1480_MC_tRCD,M_BCM1480_MC_tRCD)#define K_BCM1480_MC_tRCD_DEFAULT           3#define V_BCM1480_MC_tRCD_DEFAULT           V_BCM1480_MC_tRCD(K_BCM1480_MC_tRCD_DEFAULT)#define S_BCM1480_MC_tCL                    4#define M_BCM1480_MC_tCL                    _SB_MAKEMASK(4,S_BCM1480_MC_tCL)#define V_BCM1480_MC_tCL(x)                 _SB_MAKEVALUE(x,S_BCM1480_MC_tCL)#define G_BCM1480_MC_tCL(x)                 _SB_GETVALUE(x,S_BCM1480_MC_tCL,M_BCM1480_MC_tCL)#define K_BCM1480_MC_tCL_DEFAULT            2#define V_BCM1480_MC_tCL_DEFAULT            V_BCM1480_MC_tCL(K_BCM1480_MC_tCL_DEFAULT)#define M_BCM1480_MC_tCrDh                  _SB_MAKEMASK1(8)#define S_BCM1480_MC_tWR                    9#define M_BCM1480_MC_tWR                    _SB_MAKEMASK(3,S_BCM1480_MC_tWR)#define V_BCM1480_MC_tWR(x)                 _SB_MAKEVALUE(x,S_BCM1480_MC_tWR)#define G_BCM1480_MC_tWR(x)                 _SB_GETVALUE(x,S_BCM1480_MC_tWR,M_BCM1480_MC_tWR)#define K_BCM1480_MC_tWR_DEFAULT            2#define V_BCM1480_MC_tWR_DEFAULT            V_BCM1480_MC_tWR(K_BCM1480_MC_tWR_DEFAULT)#define S_BCM1480_MC_tCwD                   12#define M_BCM1480_MC_tCwD                   _SB_MAKEMASK(4,S_BCM1480_MC_tCwD)#define V_BCM1480_MC_tCwD(x)                _SB_MAKEVALUE(x,S_BCM1480_MC_tCwD)#define G_BCM1480_MC_tCwD(x)                _SB_GETVALUE(x,S_BCM1480_MC_tCwD,M_BCM1480_MC_tCwD)#define K_BCM1480_MC_tCwD_DEFAULT           1#define V_BCM1480_MC_tCwD_DEFAULT           V_BCM1480_MC_tCwD(K_BCM1480_MC_tCwD_DEFAULT)#define S_BCM1480_MC_tRP                    16#define M_BCM1480_MC_tRP                    _SB_MAKEMASK(4,S_BCM1480_MC_tRP)#define V_BCM1480_MC_tRP(x)                 _SB_MAKEVALUE(x,S_BCM1480_MC_tRP)#define G_BCM1480_MC_tRP(x)                 _SB_GETVALUE(x,S_BCM1480_MC_tRP,M_BCM1480_MC_tRP)#define K_BCM1480_MC_tRP_DEFAULT            4#define V_BCM1480_MC_tRP_DEFAULT            V_BCM1480_MC_tRP(K_BCM1480_MC_tRP_DEFAULT)#define S_BCM1480_MC_tRRD                   20#define M_BCM1480_MC_tRRD                   _SB_MAKEMASK(4,S_BCM1480_MC_tRRD)#define V_BCM1480_MC_tRRD(x)                _SB_MAKEVALUE(x,S_BCM1480_MC_tRRD)#define G_BCM1480_MC_tRRD(x)                _SB_GETVALUE(x,S_BCM1480_MC_tRRD,M_BCM1480_MC_tRRD)#define K_BCM1480_MC_tRRD_DEFAULT           2#define V_BCM1480_MC_tRRD_DEFAULT           V_BCM1480_MC_tRRD(K_BCM1480_MC_tRRD_DEFAULT)#define S_BCM1480_MC_tRCw                   24#define M_BCM1480_MC_tRCw                   _SB_MAKEMASK(5,S_BCM1480_MC_tRCw)#define V_BCM1480_MC_tRCw(x)                _SB_MAKEVALUE(x,S_BCM1480_MC_tRCw)#define G_BCM1480_MC_tRCw(x)                _SB_GETVALUE(x,S_BCM1480_MC_tRCw,M_BCM1480_MC_tRCw)#define K_BCM1480_MC_tRCw_DEFAULT           10#define V_BCM1480_MC_tRCw_DEFAULT           V_BCM1480_MC_tRCw(K_BCM1480_MC_tRCw_DEFAULT)#define S_BCM1480_MC_tRCr                   32#define M_BCM1480_MC_tRCr                   _SB_MAKEMASK(5,S_BCM1480_MC_tRCr)#define V_BCM1480_MC_tRCr(x)                _SB_MAKEVALUE(x,S_BCM1480_MC_tRCr)#define G_BCM1480_MC_tRCr(x)                _SB_GETVALUE(x,S_BCM1480_MC_tRCr,M_BCM1480_MC_tRCr)#define K_BCM1480_MC_tRCr_DEFAULT           9#define V_BCM1480_MC_tRCr_DEFAULT           V_BCM1480_MC_tRCr(K_BCM1480_MC_tRCr_DEFAULT)#define S_BCM1480_MC_tRFC                   48#define M_BCM1480_MC_tRFC                   _SB_MAKEMASK(6,S_BCM1480_MC_tRFC)#define V_BCM1480_MC_tRFC(x)                _SB_MAKEVALUE(x,S_BCM1480_MC_tRFC)#define G_BCM1480_MC_tRFC(x)                _SB_GETVALUE(x,S_BCM1480_MC_tRFC,M_BCM1480_MC_tRFC)#define K_BCM1480_MC_tRFC_DEFAULT           12#define V_BCM1480_MC_tRFC_DEFAULT           V_BCM1480_MC_tRFC(K_BCM1480_MC_tRFC_DEFAULT)#define S_BCM1480_MC_tFIFO                  56#define M_BCM1480_MC_tFIFO                  _SB_MAKEMASK(2,S_BCM1480_MC_tFIFO)#define V_BCM1480_MC_tFIFO(x)               _SB_MAKEVALUE(x,S_BCM1480_MC_tFIFO)#define G_BCM1480_MC_tFIFO(x)               _SB_GETVALUE(x,S_BCM1480_MC_tFIFO,M_BCM1480_MC_tFIFO)#define K_BCM1480_MC_tFIFO_DEFAULT          0#define V_BCM1480_MC_tFIFO_DEFAULT          V_BCM1480_MC_tFIFO(K_BCM1480_MC_tFIFO_DEFAULT)#define S_BCM1480_MC_tW2R                  58#define M_BCM1480_MC_tW2R                  _SB_MAKEMASK(2,S_BCM1480_MC_tW2R)#define V_BCM1480_MC_tW2R(x)               _SB_MAKEVALUE(x,S_BCM1480_MC_tW2R)#define G_BCM1480_MC_tW2R(x)               _SB_GETVALUE(x,S_BCM1480_MC_tW2R,M_BCM1480_MC_tW2R)#define K_BCM1480_MC_tW2R_DEFAULT          1#define V_BCM1480_MC_tW2R_DEFAULT          V_BCM1480_MC_tW2R(K_BCM1480_MC_tW2R_DEFAULT)#define S_BCM1480_MC_tR2W                  60#define M_BCM1480_MC_tR2W                  _SB_MAKEMASK(2,S_BCM1480_MC_tR2W)#define V_BCM1480_MC_tR2W(x)               _SB_MAKEVALUE(x,S_BCM1480_MC_tR2W)#define G_BCM1480_MC_tR2W(x)               _SB_GETVALUE(x,S_BCM1480_MC_tR2W,M_BCM1480_MC_tR2W)#define K_BCM1480_MC_tR2W_DEFAULT          0#define V_BCM1480_MC_tR2W_DEFAULT          V_BCM1480_MC_tR2W(K_BCM1480_MC_tR2W_DEFAULT)#define M_BCM1480_MC_tR2R		    _SB_MAKEMASK1(62)#define V_BCM1480_MC_TIMING_DEFAULT         (M_BCM1480_MC_tR2R | \                                     V_BCM1480_MC_tFIFO_DEFAULT | \                                     V_BCM1480_MC_tR2W_DEFAULT | \                                     V_BCM1480_MC_tW2R_DEFAULT | \                                     V_BCM1480_MC_tRFC_DEFAULT | \                                     V_BCM1480_MC_tRCr_DEFAULT | \                                     V_BCM1480_MC_tRCw_DEFAULT | \                                     V_BCM1480_MC_tRRD_DEFAULT | \                                     V_BCM1480_MC_tRP_DEFAULT | \                                     V_BCM1480_MC_tCwD_DEFAULT | \                                     V_BCM1480_MC_tWR_DEFAULT | \                                     M_BCM1480_MC_tCrDh | \                                     V_BCM1480_MC_tCL_DEFAULT | \                                     V_BCM1480_MC_tRCD_DEFAULT)/* * SDRAM Timing Register 2 (Table 98) (All bits reserved) *//* * Global Registers: single instances per BCM1480 *//* * Global Configuration Register (Table 99) */#define S_BCM1480_MC_BLK_SET_MARK           8#define M_BCM1480_MC_BLK_SET_MARK           _SB_MAKEMASK(4,S_BCM1480_MC_BLK_SET_MARK)#define V_BCM1480_MC_BLK_SET_MARK(x)        _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_SET_MARK)#define G_BCM1480_MC_BLK_SET_MARK(x)        _SB_GETVALUE(x,S_BCM1480_MC_BLK_SET_MARK,M_BCM1480_MC_BLK_SET_MARK)#define S_BCM1480_MC_BLK_CLR_MARK           12#define M_BCM1480_MC_BLK_CLR_MARK           _SB_MAKEMASK(4,S_BCM1480_MC_BLK_CLR_MARK)#define V_BCM1480_MC_BLK_CLR_MARK(x)        _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_CLR_MARK)#define G_BCM1480_MC_BLK_CLR_MARK(x)        _SB_GETVALUE(x,S_BCM1480_MC_BLK_CLR_MARK,M_BCM1480_MC_BLK_CLR_MARK)#define M_BCM1480_MC_PKT_PRIORITY           _SB_MAKEMASK1(16)#define S_BCM1480_MC_MAX_AGE                20#define M_BCM1480_MC_MAX_AGE                _SB_MAKEMASK(4,S_BCM1480_MC_MAX_AGE)#define V_BCM1480_MC_MAX_AGE(x)             _SB_MAKEVALUE(x,S_BCM1480_MC_MAX_AGE)#define G_BCM1480_MC_MAX_AGE(x)             _SB_GETVALUE(x,S_BCM1480_MC_MAX_AGE,M_BCM1480_MC_MAX_AGE)#define M_BCM1480_MC_BERR_DISABLE           _SB_MAKEMASK1(29)#define M_BCM1480_MC_FORCE_SEQ              _SB_MAKEMASK1(30)#define M_BCM1480_MC_VGEN                   _SB_MAKEMASK1(32)#define S_BCM1480_MC_SLEW                   33#define M_BCM1480_MC_SLEW                   _SB_MAKEMASK(2,S_BCM1480_MC_SLEW)#define V_BCM1480_MC_SLEW(x)                _SB_MAKEVALUE(x,S_BCM1480_MC_SLEW)#define G_BCM1480_MC_SLEW(x)                _SB_GETVALUE(x,S_BCM1480_MC_SLEW,M_BCM1480_MC_SLEW)#define M_BCM1480_MC_SSTL_VOLTAGE           _SB_MAKEMASK1(35)/* * Global Channel Interleave Register (Table 100) */#define S_BCM1480_MC_INTLV0                 0#define M_BCM1480_MC_INTLV0                 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0)#define V_BCM1480_MC_INTLV0(x)              _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV0)#define G_BCM1480_MC_INTLV0(x)              _SB_GETVALUE(x,S_BCM1480_MC_INTLV0,M_BCM1480_MC_INTLV0)#define S_BCM1480_MC_INTLV1                 8#define M_BCM1480_MC_INTLV1                 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1)#define V_BCM1480_MC_INTLV1(x)              _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV1)#define G_BCM1480_MC_INTLV1(x)              _SB_GETVALUE(x,S_BCM1480_MC_INTLV1,M_BCM1480_MC_INTLV1)#define S_BCM1480_MC_INTLV_MODE             16#define M_BCM1480_MC_INTLV_MODE             _SB_MAKEMASK(3,S_BCM1480_MC_INTLV_MODE)#define V_BCM1480_MC_INTLV_MODE(x)          _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV_MODE)#define G_BCM1480_MC_INTLV_MODE(x)          _SB_GETVALUE(x,S_BCM1480_MC_INTLV_MODE,M_BCM1480_MC_INTLV_MODE)#define K_BCM1480_MC_INTLV_MODE_NONE        0x0#define K_BCM1480_MC_INTLV_MODE_01          0x1#define K_BCM1480_MC_INTLV_MODE_23          0x2#define K_BCM1480_MC_INTLV_MODE_01_23       0x3#define K_BCM1480_MC_INTLV_MODE_0123        0x4#define V_BCM1480_MC_INTLV_MODE_NONE        V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_NONE)#define V_BCM1480_MC_INTLV_MODE_01          V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_01)#define V_BCM1480_MC_INTLV_MODE_23          V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_23)#define V_BCM1480_MC_INTLV_MODE_01_23       V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_01_23)#define V_BCM1480_MC_INTLV_MODE_0123        V_BCM1480_MC_INTLV_MODE(K_BCM1480_MC_INTLV_MODE_0123)/* * Global ECC Status Register (Table 101) */#define S_BCM1480_MC_ECC_ERR_ADDR           0#define M_BCM1480_MC_ECC_ERR_ADDR           _SB_MAKEMASK(37,S_BCM1480_MC_ECC_ERR_ADDR)#define V_BCM1480_MC_ECC_ERR_ADDR(x)        _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR)#define G_BCM1480_MC_ECC_ERR_ADDR(x)        _SB_GETVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR,M_BCM1480_MC_ECC_ERR_ADDR)#define M_BCM1480_MC_ECC_MULT_ERR_DET       _SB_MAKEMASK1(61)#define M_BCM1480_MC_ECC_UERR_DET           _SB_MAKEMASK1(62)#define M_BCM1480_MC_ECC_CERR_DET           _SB_MAKEMASK1(63)/* * Global ECC Address Register (Table 102) */#define S_BCM1480_MC_ECC_CORR_ADDR          0#define M_BCM1480_MC_ECC_CORR_ADDR          _SB_MAKEMASK(37,S_BCM1480_MC_ECC_CORR_ADDR)#define V_BCM1480_MC_ECC_CORR_ADDR(x)       _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR)#define G_BCM1480_MC_ECC_CORR_ADDR(x)       _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR,M_BCM1480_MC_ECC_CORR_ADDR)/* * Global ECC Correction Register (Table 103) */#define S_BCM1480_MC_ECC_CORRECT            0#define M_BCM1480_MC_ECC_CORRECT            _SB_MAKEMASK(64,S_BCM1480_MC_ECC_CORRECT)#define V_BCM1480_MC_ECC_CORRECT(x)         _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORRECT)#define G_BCM1480_MC_ECC_CORRECT(x)         _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORRECT,M_BCM1480_MC_ECC_CORRECT)/* * Global ECC Performance Counters Control Register (Table 104) */#define S_BCM1480_MC_CHANNEL_SELECT         0#define M_BCM1480_MC_CHANNEL_SELECT         _SB_MAKEMASK(4,S_BCM1480_MC_CHANNEL_SELECT)#define V_BCM1480_MC_CHANNEL_SELECT(x)      _SB_MAKEVALUE(x,S_BCM1480_MC_CHANNEL_SELECT)#define G_BCM1480_MC_CHANNEL_SELECT(x)      _SB_GETVALUE(x,S_BCM1480_MC_CHANNEL_SELECT,M_BCM1480_MC_CHANNEL_SELECT)#define K_BCM1480_MC_CHANNEL_SELECT_0       0x1#define K_BCM1480_MC_CHANNEL_SELECT_1       0x2#define K_BCM1480_MC_CHANNEL_SELECT_2       0x4#define K_BCM1480_MC_CHANNEL_SELECT_3       0x8#endif /* _BCM1480_MC_H */

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