diag_l2cache.s

一个很好的嵌入式linux平台下的bootloader

	nop
	move	s0, R_BG_BLOCK
	or	s0, s0, 2 << 8
	jr	ra
	nop
1:

	addi	R_ECC_BLOCK, R_ECC_BLOCK, 1
	/*slt	R_ECC_SCRATCH0, R_ECC_BLOCK, (L2_BLOCKS_PER_ROW * L2_BLOCK_ROWS)*/
	addi	R_ECC_SCRATCH1, k0, 1
	sll     R_ECC_SCRATCH1, R_ECC_SCRATCH1, 2
	slt	R_ECC_SCRATCH0, R_ECC_BLOCK, R_ECC_SCRATCH1
	/*slt	R_ECC_SCRATCH0, R_ECC_BLOCK, (START_BLK + TOTAL_BLKS)*/
	bne	R_ECC_SCRATCH0,$0, ecc_next_block
	nop

	.set	noreorder
	move	v0, v0 
	jr	ra
	nop

ecc_err:
	li	v0, 1
	jr	ra
	nop

#endif
#endif


#ifdef DATA_TEST

#define L2_TAG_LINES       256
#define	L2_TAG_BLOCKS	   8

#define R_PAT0_0       a0			
#define R_PAT0_1       a1			
#define R_PAT0_2       a2			
#define R_PAT0_3       a3			
 							
#define R_PAT1_0       t0			
#define R_PAT1_1       t1			
#define R_PAT1_2       t2			
#define R_PAT1_3       t3			

#define R_PATT_IND	 s0
#define R_LINE       s2			
#define R_NEXT_WAY   s3			
#define R_BLOCK      s1		
#define R_WADDR      t5			
#define R_RADDR      t5
			
#define R_SCRATCH0   t6			
#define R_SCRATCH1   t7			
#define R_SCRATCH2   t8			
#define R_SCRATCH3   t9			
#define R_SCRATCH4   s6			
#define R_SCRATCH5   s7			

#ifndef _SB1250_PASS2_
#define	L2_READ_TAG_MASK	0x300fffffe0000
#else
#define L2_READ_TAG_MASK        0x3007fffff8000
#endif

#ifndef _SB1250_PASS2_

#define	TAG_PATT0 0x0	
#define	TAG_PATT1 0x1555555	
#define	TAG_PATT2 0x1333333	
#define	TAG_PATT3 0x10f0f0f	
#define	TAG_PATT4 0x0ff00ff	
#define	TAG_PATT5 0x0ffff	

#define	TAG_INVPATT0 0x1ffffff	
#define	TAG_INVPATT1 0x0aaaaaa	
#define	TAG_INVPATT2 0x0cccccc	
#define	TAG_INVPATT3 0x0f0f0f0	
#define	TAG_INVPATT4 0x100ff00	
#define	TAG_INVPATT5 0x1ff0000	

#else

#define TAG_PATT0 0x0
#define TAG_PATT1 0x1555555
#define TAG_PATT2 0x3333333
#define TAG_PATT3 0x10f0f0f
#define TAG_PATT4 0x0ff00ff
#define TAG_PATT5 0x0ffff
 
#define TAG_INVPATT0 0x3ffffff
#define TAG_INVPATT1 0x2aaaaaa
#define TAG_INVPATT2 0x0cccccc
#define TAG_INVPATT3 0x0f0f0f0
#define TAG_INVPATT4 0x300ff00
#define TAG_INVPATT5 0x3ff0000

#endif


#define	TAG_WRITE_PAT(addr, pattern0, pattern1)\
	dli	R_SCRATCH0, L2M_WRITE_TAG; \
	or	R_SCRATCH0, addr, R_SCRATCH0; \
	sd	pattern0, 0x18(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0(R_SCRATCH0); \
	sd	pattern1, 0x2018(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0x2000(R_SCRATCH0); \
	daddu 	R_SCRATCH0, R_SCRATCH0, R_NEXT_WAY; \
	sd	pattern0, 0x18(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0(R_SCRATCH0); \
	sd	pattern1, 0x2018(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0x2000(R_SCRATCH0); \
	daddu 	R_SCRATCH0, R_SCRATCH0, R_NEXT_WAY; \
	sd	pattern0, 0x18(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0(R_SCRATCH0); \
	sd	pattern1, 0x2018(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0x2000(R_SCRATCH0); \
	daddu 	R_SCRATCH0, R_SCRATCH0, R_NEXT_WAY; \
	sd	pattern0, 0x18(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0(R_SCRATCH0); \
	sd	pattern1, 0x2018(R_SCRATCH0); \
	cache	L1CACHEOP(L1C_D,L1C_OP_HIT_WB_INVAL),0x2000(R_SCRATCH0)

#ifndef _SB1250_PASS2_
#define TAG_MAKE_PAT(pattern0, pattern1)\
	li	R_SCRATCH4, 0x800000;\
	and	R_SCRATCH2, R_SCRATCH4, pattern0;\
	dsll	R_SCRATCH2, R_SCRATCH2, 26;\
	li	R_SCRATCH4, 0x1000000;\
	and	R_SCRATCH4, R_SCRATCH4, pattern0;\
	dsll	R_SCRATCH4, R_SCRATCH4, 24;\
	or      R_SCRATCH2, R_SCRATCH2, R_SCRATCH4;\
	li	R_SCRATCH4, 0x7fffff;\
	and	R_SCRATCH4, R_SCRATCH4, pattern0;\
	dsll	R_SCRATCH4, R_SCRATCH4, 17;\
	or      R_SCRATCH2, R_SCRATCH2, R_SCRATCH4;\
	dli	R_SCRATCH4, L2_READ_TAG_MASK; \
	and 	pattern1, R_SCRATCH2, R_SCRATCH4; 

#else

#define TAG_MAKE_PAT(pattern0, pattern1)\
        li      R_SCRATCH4, 0x1000000;\
        and     R_SCRATCH2, R_SCRATCH4, pattern0;\
        dsll    R_SCRATCH2, R_SCRATCH2, 25;\
        li      R_SCRATCH4, 0x2000000;\
        and     R_SCRATCH4, R_SCRATCH4, pattern0;\
        dsll    R_SCRATCH4, R_SCRATCH4, 23;\
        or      R_SCRATCH2, R_SCRATCH2, R_SCRATCH4;\
        li      R_SCRATCH4, 0x3fffff;\
        and     R_SCRATCH4, R_SCRATCH4, pattern0;\
        dsll    R_SCRATCH4, R_SCRATCH4, 17;\
        or      R_SCRATCH2, R_SCRATCH2, R_SCRATCH4;\
        li      R_SCRATCH4, 0xc00000;\
        and     R_SCRATCH4, R_SCRATCH4, pattern0;\
        dsrl    R_SCRATCH4, R_SCRATCH4, 7;\
        or      R_SCRATCH2, R_SCRATCH2, R_SCRATCH4;\
        dli     R_SCRATCH4, L2_READ_TAG_MASK; \
        and     pattern1, R_SCRATCH2, R_SCRATCH4; 

#endif

#define TAG_CHECK_PAT(addr, pattern0, pattern1)\
        li	R_SCRATCH2, 4;\
	dli	R_SCRATCH4, XKPHYS_UNC; \
	dli	R_SCRATCH5, L2_BASE; \
	or	R_SCRATCH4, R_SCRATCH4, R_SCRATCH5; \
	dli	R_SCRATCH5, L2_READ_TAG_MASK;\
	dli	R_SCRATCH0, L2M_READ_RAW_ACCESS; \
	or	R_SCRATCH0, addr, R_SCRATCH0; \
1:	ld 	R_SCRATCH1, (R_SCRATCH0); \
	sync; \
	ld 	R_SCRATCH1, L2_READ_TAG(R_SCRATCH4); \
	and	R_SCRATCH1, R_SCRATCH1, R_SCRATCH5; \
	sne	R_SCRATCH1, R_SCRATCH1, pattern0; \
	or	R_PASS_FAIL, R_PASS_FAIL, R_SCRATCH1; 	\
	ld 	R_SCRATCH1, 0x2000(R_SCRATCH0); \
	sync; \
	ld 	R_SCRATCH1, L2_READ_TAG(R_SCRATCH4); \
	and	R_SCRATCH1, R_SCRATCH1, R_SCRATCH5; \
	sne	R_SCRATCH1, R_SCRATCH1, pattern1; \
	or	R_PASS_FAIL, R_PASS_FAIL, R_SCRATCH1; 	\
	addi	R_SCRATCH2, R_SCRATCH2, -1;	\
        bne	R_SCRATCH2, zero, 1b;	\
	daddu 	R_SCRATCH0, R_SCRATCH0, R_NEXT_WAY

#define TAG_CHECK_PAT1(addr, pattern0, pattern1)\
        li	R_SCRATCH2, 4;\
	dli	R_SCRATCH4, XKPHYS_UNC; \
	dli	R_SCRATCH5, L2_BASE; \
	or	R_SCRATCH4, R_SCRATCH4, R_SCRATCH5; \
	dli	R_SCRATCH5, L2_READ_TAG_MASK;\
	dli	R_SCRATCH0, 0x00200000; \
	or	R_SCRATCH0, addr, R_SCRATCH0; \
1:	ld 	R_SCRATCH1, (R_SCRATCH0); \
	sync; \
	ld 	R_SCRATCH1, L2_READ_TAG(R_SCRATCH4); \
	and	R_SCRATCH1, R_SCRATCH1, R_SCRATCH5; \
	sne	R_SCRATCH1, R_SCRATCH1, pattern0; \
	or	R_PASS_FAIL, R_PASS_FAIL, R_SCRATCH1; 	\
	ld 	R_SCRATCH1, 0x2000(R_SCRATCH0); \
	sync; \
	ld 	R_SCRATCH1, L2_READ_TAG(R_SCRATCH4); \
	and	R_SCRATCH1, R_SCRATCH1, R_SCRATCH5; \
	sne	R_SCRATCH1, R_SCRATCH1, pattern1; \
	or	R_PASS_FAIL, R_PASS_FAIL, R_SCRATCH1; 	\
	addi	R_SCRATCH2, R_SCRATCH2, -1;	\
        bne	R_SCRATCH2, zero, 1b;	\
	daddu 	R_SCRATCH0, R_SCRATCH0, R_NEXT_WAY

	
l2dtest_tag_data:
/*		
	move    R_ERR_TABLE_0, $0
	move    R_ERR_TABLE_1, $0
	move    R_ERR_TABLE_2, $0
	move    R_ERR_TABLE_3, $0
*/
#if 1 /* zb */
	/*li 	R_BLOCK, START_BLK*/
        sll	R_BLOCK, k0, 1
	li	R_NEXT_WAY,0x20000
tag_next_block:
#ifdef USE_LEDS
	addi	R_BG_SCRATCH2, R_BG_BLOCK, '0'
	or 	R_BG_SCRATCH2, R_BG_SCRATCH2, ('T' << 8)
	SET_LEDS_HI(R_BG_SCRATCH2, R_BG_SCRATCH0, R_BG_SCRATCH1)
#endif
	
	move	R_PATT_IND, $0
	dli 	R_PAT0_0, TAG_PATT0
	dli 	R_PAT0_1, TAG_PATT0
	TAG_MAKE_PAT(R_PAT0_0, R_PAT0_2)
	TAG_MAKE_PAT(R_PAT0_1, R_PAT0_3)
	dli 	R_PAT1_0, TAG_INVPATT0
	dli 	R_PAT1_1, TAG_INVPATT0
	TAG_MAKE_PAT(R_PAT1_0, R_PAT1_2)
	TAG_MAKE_PAT(R_PAT1_1, R_PAT1_3)

tag_next_pattern:
#ifdef USE_LEDS
	addi	R_BG_SCRATCH2, R_PATT_IND, '0'
	or 	R_BG_SCRATCH2, R_BG_SCRATCH2, ('P' << 8)
	SET_LEDS_LO(R_BG_SCRATCH2, R_BG_SCRATCH0, R_BG_SCRATCH1)
#endif

	dli	R_WADDR, XKPHYS_C_COH_EXC	/* uncached accelerated */
	dli	R_SCRATCH0, L2_RAM_BASE_ADDR	/* mgmt mode */
	or	R_WADDR,R_ECC_WADDR,R_BG_SCRATCH0
	sll	R_SCRATCH0, R_BLOCK, L2_BLOCK_ROW_SHIFT /* block number */
	or	R_WADDR, R_WADDR, R_SCRATCH0

	.set	noreorder
	move 	R_LINE, zero
tag_init_next_line:
	TAG_WRITE_PAT(R_WADDR,R_PAT0_0,R_PAT0_1)
	li      R_SCRATCH0, (32)
        dadd	R_WADDR, R_WADDR, R_SCRATCH0	/* next line */
        
	slt     R_SCRATCH0,R_LINE,L2_LINES_PER_BLOCK-1
	bne	R_SCRATCH0, $0, tag_init_next_line
	add	R_LINE, R_LINE,1
	
	dli	R_RADDR, XKPHYS_C_COH_EXC
	dli	R_SCRATCH0, L2_RAM_BASE_ADDR
	or	R_RADDR, R_RADDR, R_SCRATCH0
	sll	R_SCRATCH1, R_BLOCK, L2_BLOCK_ROW_SHIFT
	or	R_RADDR, R_RADDR, R_SCRATCH1
	li	R_NEXT_WAY, 0x20000

	move 	R_LINE, zero
tag_march1:	
	move 	R_PASS_FAIL, zero
	TAG_CHECK_PAT(R_WADDR,R_PAT0_2,R_PAT0_3)  
	TAG_WRITE_PAT(R_WADDR,R_PAT1_0,R_PAT1_1)
	TAG_CHECK_PAT(R_WADDR,R_PAT1_2,R_PAT1_3) 
	SET_ERR_TABLE(R_PASS_FAIL, R_LINE)
	daddiu	R_RADDR, R_RADDR, 0x20 

	slt     R_SCRATCH0,R_LINE,L2_LINES_PER_BLOCK-1
	bne	R_SCRATCH0, $0, tag_march1
	add	R_LINE, R_LINE,1
	
	dli	R_RADDR, XKPHYS_C_COH_EXC
	dli	R_SCRATCH0, L2_RAM_BASE_ADDR
	or	R_RADDR, R_RADDR, R_SCRATCH0
	sll	R_SCRATCH1, R_BLOCK, L2_BLOCK_ROW_SHIFT
	or	R_RADDR, R_RADDR, R_SCRATCH1

	move 	R_LINE,zero
tag_march2:	
	move 	R_PASS_FAIL, zero
	TAG_CHECK_PAT(R_WADDR,R_PAT1_2,R_PAT1_3)  
	TAG_WRITE_PAT(R_WADDR,R_PAT0_0,R_PAT0_1)
	TAG_CHECK_PAT(R_WADDR,R_PAT0_2,R_PAT0_3) 
	SET_ERR_TABLE(R_PASS_FAIL, R_LINE)
	daddiu	R_RADDR, R_RADDR, 0x20 

	slt     R_SCRATCH0,R_LINE,L2_LINES_PER_BLOCK-1
	bne	R_SCRATCH0, $0, tag_march2
	add	R_LINE, R_LINE,1
	
	dli	R_RADDR, XKPHYS_C_COH_EXC
	dli	R_SCRATCH0, L2_RAM_BASE_ADDR
	or	R_RADDR, R_RADDR, R_SCRATCH0
#ifdef TEST_ALL_LINES
        sll     R_SCRATCH0, R_BLOCK, 1
	addi	R_SCRATCH0, R_SCRATCH0, 1
	sll	R_SCRATCH1, R_SCRATCH0, L2_BLOCK_SHIFT
#else 
	sll	R_SCRATCH1, R_BLOCK, L2_BLOCK_ROW_SHIFT
#endif
	or	R_RADDR, R_RADDR, R_SCRATCH1
#ifdef TEST_ALL_LINES
	daddiu  R_RADDR, R_RADDR, -32 
#else 
	daddiu  R_RADDR, R_RADDR, L2_LINES_PER_BLOCK*32-32
#endif
	li 	R_LINE,L2_LINES_PER_BLOCK-1
tag_march3:	
	move 	R_PASS_FAIL, zero
	TAG_CHECK_PAT(R_WADDR,R_PAT0_2,R_PAT0_3)  
	TAG_WRITE_PAT(R_WADDR,R_PAT1_0,R_PAT1_1)
	TAG_CHECK_PAT(R_WADDR,R_PAT1_2,R_PAT1_3) 
	SET_ERR_TABLE(R_PASS_FAIL, R_LINE)
	daddiu	R_RADDR, R_RADDR, -32 

	bne	R_LINE,$0, tag_march3
	add	R_LINE,R_LINE,-1

	dli	R_RADDR, XKPHYS_C_COH_EXC
	dli	R_SCRATCH0, L2_RAM_BASE_ADDR
	or	R_RADDR, R_RADDR, R_SCRATCH0
#ifdef TEST_ALL_LINES
        sll     R_SCRATCH0, R_BLOCK, 1
	addi	R_SCRATCH0, R_SCRATCH0, 1
	sll	R_SCRATCH1, R_SCRATCH0, L2_BLOCK_SHIFT
#else 
	sll	R_SCRATCH1, R_BLOCK, L2_BLOCK_ROW_SHIFT
#endif
	or	R_RADDR, R_RADDR, R_SCRATCH1
#ifdef TEST_ALL_LINES
	daddiu  R_RADDR, R_RADDR, -32 
#else 
	daddiu  R_RADDR, R_RADDR, L2_LINES_PER_BLOCK*32-32
#endif
	li 	R_LINE,L2_LINES_PER_BLOCK-1
tag_march4:	
	move 	R_PASS_FAIL, zero
	TAG_CHECK_PAT(R_WADDR,R_PAT1_2,R_PAT1_3)  
	TAG_WRITE_PAT(R_WADDR,R_PAT0_0,R_PAT0_1)
	TAG_CHECK_PAT(R_WADDR,R_PAT0_2,R_PAT0_3) 
	SET_ERR_TABLE(R_PASS_FAIL, R_LINE)
	daddiu	R_RADDR, R_RADDR, -32 

	bne	R_LINE,$0, tag_march4
	add	R_LINE,R_LINE,-1

	addi	R_PATT_IND, R_PATT_IND, 1
	li 	R_SCRATCH0, 1
	bne	R_SCRATCH0, R_PATT_IND, 2f
	nop
	dli 	R_PAT0_0, TAG_INVPATT0
	dli 	R_PAT0_1, TAG_PATT0
	TAG_MAKE_PAT(R_PAT0_0, R_PAT0_2)
	TAG_MAKE_PAT(R_PAT0_1, R_PAT0_3)
	dli 	R_PAT1_0, TAG_PATT0
	dli 	R_PAT1_1, TAG_INVPATT0
	TAG_MAKE_PAT(R_PAT1_0, R_PAT1_2)
	TAG_MAKE_PAT(R_PAT1_1, R_PAT1_3)

	b	tag_next_pattern
2:	
	li 	R_SCRATCH0, 2
	bne	R_SCRATCH0, R_PATT_IND, 3f
	nop
	
	dli 	R_PAT0_0, TAG_PATT2
	dli 	R_PAT0_1, TAG_PATT2
	TAG_MAKE_PAT(R_PAT0_0, R_PAT0_2)
	TAG_MAKE_PAT(R_PAT0_1, R_PAT0_3)
	dli 	R_PAT1_0, TAG_INVPATT2
	dli 	R_PAT1_1, TAG_INVPATT2
	TAG_MAKE_PAT(R_PAT1_0, R_PAT1_2)
	TAG_MAKE_PAT(R_PAT1_1, R_PAT1_3)
	b	tag_next_pattern
3:	
	li 	R_SCRATCH0, 3
	bne	R_SCRATCH0, R_PATT_IND, 4f
	nop
	
	dli 	R_PAT0_0, TAG_PATT3
	dli 	R_PAT0_1, TAG_PATT3
	TAG_MAKE_PAT(R_PAT0_0, R_PAT0_2)
	TAG_MAKE_PAT(R_PAT0_1, R_PAT0_3)
	dli 	R_PAT1_0, TAG_INVPATT3
	dli 	R_PAT1_1, TAG_INVPATT3
	TAG_MAKE_PAT(R_PAT1_0, R_PAT1_2)
	TAG_MAKE_PAT(R_PAT1_1, R_PAT1_3)
	b	tag_next_pattern
4:		
	li 	R_SCRATCH0, 4
	bne	R_SCRATCH0, R_PATT_IND, 5f
	nop
	
	dli 	R_PAT0_0, TAG_PATT4
	dli 	R_PAT0_1, TAG_PATT4
	TAG_MAKE_PAT(R_PAT0_0, R_PAT0_2)
	TAG_MAKE_PAT(R_PAT0_1, R_PAT0_3)
	dli 	R_PAT1_0, TAG_INVPATT4
	dli 	R_PAT1_1, TAG_INVPATT4
	TAG_MAKE_PAT(R_PAT1_0, R_PAT1_2)
	TAG_MAKE_PAT(R_PAT1_1, R_PAT1_3)
	b	tag_next_pattern
5:		
	li 	R_SCRATCH0, 5
	bne	R_SCRATCH0, R_PATT_IND, 6f
	nop
	
	dli 	R_PAT0_0, TAG_PATT5
	dli 	R_PAT0_1, TAG_PATT5
	TAG_MAKE_PAT(R_PAT0_0, R_PAT0_2)
	TAG_MAKE_PAT(R_PAT0_1, R_PAT0_3)
	dli 	R_PAT1_0, TAG_INVPATT5
	dli 	R_PAT1_1, TAG_INVPATT5
	TAG_MAK