📄 diag_l2cache.s
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/* ********************************************************************* * SB1250 Board Support Package * * L2 Cache Diagnostic File: diag_l2cache.S * * A diagnostic for the L2 cache. On pass2 parts, this diag * will disable portions of the cache as necessary. * * Author: Zongbo Chen * ********************************************************************* * * Copyright 2000,2001,2002,2003 * Broadcom Corporation. All rights reserved. * * This software is furnished under license and may be used and * copied only in accordance with the following terms and * conditions. Subject to these conditions, you may download, * copy, install, use, modify and distribute modified or unmodified * copies of this software in source and/or binary form. No title * or ownership is transferred hereby. * * 1) Any source code used, modified or distributed must reproduce * and retain this copyright notice and list of conditions * as they appear in the source file. * * 2) No right is granted to use any trade name, trademark, or * logo of Broadcom Corporation. The "Broadcom Corporation" * name may not be used to endorse or promote products derived * from this software without the prior written permission of * Broadcom Corporation. * * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. ********************************************************************* */#include "sb1250_defs.h" /* include definitions for MAKEMASK etc. */#include "diag_l1cache.h"#include "sb1250_l2c.h"#include "sb1250_scd.h"#include "sb1250_regs.h"#include "sbmips.h"#include "diag_l2util.h"#include "bsp_config.h"#include "cpu_config.h"#include "sb1250_genbus.h"#include "mipsmacros.h"/*#define _SIMULATOR_*//* * This lets us override the WID by poking values into our PromICE */#ifdef _MAGICWID_#undef A_SCD_SYSTEM_REVISION#define A_SCD_SYSTEM_REVISION 0x1FC00508#endif/* We'll always define pass2. This routine will not be run unless we're on a pass2 cpu */#ifndef _SB1250_PASS2_#define _SB1250_PASS2_#endif#define C0_DEBUG $23#define C0_DataLo C0_TAGLO#define C0_DataHi C0_TAGHI#define C0_TagLo C0_TAGLO#define C0_TagHi C0_TAGHI #define DMTC0s(reg, c0reg, sel) \ dmtc0 reg, c0reg, sel; \ ssnop ; \ ssnop #define DMFC0s(reg, c0reg, sel) \ dmfc0 reg, c0reg, sel; \ ssnop ; \ ssnop #define MTC0s(reg, c0reg, sel) \ mtc0 reg, c0reg, sel; \ ssnop ; \ ssnop #define MFC0s(reg, c0reg, sel) \ mfc0 reg, c0reg, sel; \ ssnop ; \ ssnop #define DMFC0(reg, c0reg ) \ dmfc0 reg, c0reg; \ ssnop ; \ ssnop #define DMTC0(reg, c0reg) \ dmtc0 reg, c0reg; \ ssnop ; \ ssnop#undef MFC0 /* avoid redef'n of mipsmacros.h version */#define MFC0(reg, c0reg ) \ mfc0 reg, c0reg; \ ssnop ; \ ssnop #undef MTC0 /* avoid redef'n of mipsmacros.h version */#define MTC0(reg, c0reg) \ mtc0 reg, c0reg; \ ssnop ; \ ssnop #ifdef _SIMULATOR_#define LINES_TO_TEST 2#define LOOP_COUNT 0x16#else#define TEST_ALL_LINES#define LOOP_COUNT 0x1600000#endif#define START_BLK 0#define TOTAL_BLKS 16#define XKPHYS_C_COH 0x8000000000000000#define XKPHYS_U_ACC 0xb800000000000000#define XKPHYS_C_COH_EXC 0xa000000000000000#define XKPHYS_UNC 0x9000000000000000#define L2_RAM_BASE_ADDR 0x00D0180000#define L2M_READ_RAW_ACCESS 0x00200000#define L2M_WRITE_LAST_ECC 0x00400000#define L2M_WRITE_TAG 0x00200000#define L2M_WRITE_TAG_LAST_ECC 0x00600000#undef PHYS_TO_XKPHYS /* avoid redef'n of sbmips.h version */#define PHYS_TO_XKPHYS(x) (0x8000000000000000|(x))#define PHYS_TO_XKPHYS_UNC(x) (0x9000000000000000|(x))#define C0_Status $12#undef C0_SR /* avoid redef'n of sbmips.h version */#define C0_SR C0_Status #define C0_Debug C0_DEBUG#define SR_KX (1 << 7)#ifdef LEDS_PHYS#define USE_LEDS/*Turn off LED display as default*/#undef USE_LEDS#endif#if 1 #define RUN_FROM_K0#endif #define LED_CHAR0 (32+8*3)#define LED_CHAR1 (32+8*2)#define LED_CHAR2 (32+8*1)#define LED_CHAR3 (32+8*0)#define MAC2_HASH0 0x10066240 #define SET_LEDS(leds, temp0, temp1) \ li temp0, PHYS_TO_K1(LEDS_PHYS); \ srl temp1, leds, 24; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR0(temp0); \ srl temp1, leds, 16; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR1(temp0); \ srl temp1, leds, 8; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR2(temp0); \ and temp1, leds, 0xFF; \ sb temp1, LED_CHAR3(temp0)#if 0#define SET_LEDS(leds, temp0, temp1) \ li temp0, PHYS_TO_XKPHYS_UNC(LEDS_PHYS); \ srl temp1, leds, 24; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR0(temp0); \ srl temp1, leds, 16; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR1(temp0); \ srl temp1, leds, 8; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR2(temp0); \ and temp1, leds, 0xFF; \ sb temp1, LED_CHAR3(temp0)#endif #define SET_LEDS_HI(leds, temp0, temp1) \ li temp0, PHYS_TO_XKPHYS_UNC(LEDS_PHYS); \ srl temp1, leds, 8; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR0(temp0); \ and temp1, leds, 0xFF; \ sb temp1, LED_CHAR1(temp0)#define SET_LEDS_LO(leds, temp0, temp1) \ li temp0, PHYS_TO_XKPHYS_UNC(LEDS_PHYS); \ srl temp1, leds, 8; \ and temp1, temp1, 0xFF; \ sb temp1, LED_CHAR2(temp0); \ and temp1, leds, 0xFF; \ sb temp1, LED_CHAR3(temp0)#define DATA_TEST#define DATA_ECC_TEST#define LED_CHAR0 (32+8*3)#define LED_CHAR1 (32+8*2)#define LED_CHAR2 (32+8*1)#define LED_CHAR3 (32+8*0) .text .set mips64#define DISAB_TOP 0x800#define DISAB_BOT 0x400#define DISAB_RGT 0x200#define DISAB_LFT 0x100#define FAILURE 0xFFFFFFFF /* complete failure, cannot continue */disab_table:/* * This table maps failure modes to "disable" masks. * For each combination of failed quadrants, disable half * the cache that contains those quadrants. Note that since * we can only disable top OR bottom and left OR right, not * all combinations will work and will yield diagnostic failure. */ .word 0 /* Entire cache functional */ .word DISAB_LFT /* BR=Good TR=Good BL=Good TL=BAD */ .word DISAB_LFT /* BR=Good TR=Good BL=BAD TL=Good */ .word DISAB_LFT /* BR=Good TR=Good BL=BAD TL=BAD */ .word DISAB_RGT /* BR=Good TR=BAD BL=Good TL=Good */ .word DISAB_TOP|DISAB_RGT /* BR=Good TR=BAD BL=Good TL=BAD */ .word DISAB_RGT|DISAB_BOT /* BR=Good TR=BAD BL=BAD TL=Good */ .word DISAB_LFT|DISAB_TOP /* BR=Good TR=BAD BL=BAD TL=BAD */ .word DISAB_RGT /* BR=BAD TR=Good BL=Good TL=Good */ .word DISAB_LFT|DISAB_BOT /* BR=BAD TR=Good BL=Good TL=BAD */ .word DISAB_BOT|DISAB_RGT /* BR=BAD TR=Good BL=BAD TL=Good */ .word DISAB_LFT|DISAB_BOT /* BR=BAD TR=Good BL=BAD TL=BAD */ .word DISAB_RGT /* BR=BAD TR=BAD BL=Good TL=Good */ .word DISAB_RGT|DISAB_TOP /* BR=BAD TR=BAD BL=Good TL=BAD */ .word DISAB_RGT|DISAB_BOT /* BR=BAD TR=BAD BL=BAD TL=Good */ .word FAILURE /* BR=BAD TR=BAD BL=BAD TL=BAD */ LEAF(diag_main)#define SKIP_DIAGS 1#if SKIP_DIAGS li t0, PHYS_TO_K1(MAC2_HASH0) move t1, zero sd t1, 0(t0) j ra /* Disable diagnostics for now */ nop#endif move fp, ra /* * Don't do any of this diagnostic unless we're greater than PASS2 SB1250. */ la t0,PHYS_TO_K1(A_SCD_SYSTEM_REVISION) ld t0,0(t0) /* get system revision */ and t1,t0,(0xF0FF << S_SYS_PART) /* ignore CPU count */ li t2,V_SYS_PART(0x1050) /* test against ignored count */ bne t2,t1,2f /* go if not a sb1x50 */ nop and t1,t0,M_SYS_REVISION li t2,V_SYS_REVISION(K_SYS_REVISION_PASS3) bge t1,t2,3f /* run diags if >= pass3 (0x20) */ nop li t2,V_SYS_REVISION(K_SYS_REVISION_PASS2) bge t1,t2,1f /* go if pass2 or better (>= 0x03) */ nop2: j ra nop1: dsrl t1,t0,S_SYS_WID /* Get Wafer ID register */ bne t1,zero,2b /* leave if register is set (no diags) */ /* Otherwise, run the diagnostic if the wafer ID is not set. */ /* Special case of A6 parts (revid==4 && wid!=0) will NOT run diags */3:#ifdef USE_LEDS dli t8, (('J'<<24)|('U'<<16)|('M'<<8)|'P') SET_LEDS(t8, t6, t7)#endif#ifdef RUN_FROM_K0 MFC0 (t2,C0_CONFIG) dsrl t2, t2, 3 dsll t2, t2, 3 or t2, t2, 1 MTC0 (t2,C0_CONFIG) bal to_kseg0 nop #endif #ifdef USE_LEDS dli t8, (('C'<<24)|('A'<<16)|('S'<<8)|'H') SET_LEDS(t8, t6, t7) #endif#ifdef RUN_FROM_K0 li t0, LOOP_COUNT1: addi t0, t0, -1 bne t0, zero, 1b#endif/* set up for 64 bit addressing */ DMFC0 (t2,C0_SR) or t1,t2,SR_KX DMTC0 (t1,C0_SR) MFC0s (t2,C0_Debug,2) or t1, t2, 0x3004 MTC0s (t1,C0_Debug,2) /* initialize the cache */ bal sb1250_l2cache_init1 /* use mac2 hash0 reg as result reg, init it to 0 */ dli t0, PHYS_TO_XKPHYS_UNC(MAC2_HASH0) move t1, zero sd t1, 0(t0) /* init quarter number to 0 */ move k0, $0next_quarter: move v0, $0#ifdef DATA_TEST bal l2dtest_bg_rw_uac nop or t0, v0, v1 or t0, t0, s4 or t0, t0, s5 bne t0, $0, test_faildata_fail: /*bne v0, $0, data_fail*/ nop#ifdef RUN_FROM_K0 li t0, LOOP_COUNT1: addi t0, t0, -1 bne t0, zero, 1b#endif#ifdef DATA_ECC_TEST bal l2dtest_data_ecc nop or t0, v0, v1 or t0, t0, s4 or t0, t0, s5 bne t0, $0, test_failecc_fail: /*bne v0, $0, ecc_fail*/ nop#endif/*#else*/#ifdef RUN_FROM_K0 li t0, LOOP_COUNT1: addi t0, t0, -1 bne t0, zero, 1b#endif bal l2dtest_tag_data nop or t0, v0, v1 or t0, t0, s4 or t0, t0, s5 bne t0, $0, test_failtag_fail: /*bne v0, $0, tag_fail*/ nop#ifdef RUN_FROM_K0 li t0, LOOP_COUNT1: addi t0, t0, -1 bne t0, zero, 1b#endif bal l2dtest_tag_ecc nop or t0, v0, v1 or t0, t0, s4 or t0, t0, s5 bne t0, $0, test_failtagecc_fail: /*bne v0, $0, tagecc_fail*/ nop j test_success
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