📄 el3c90xend.h
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*/ #define PHY_BMSR 0x01#define PHY_BMSR_100BT4 0x8000#define PHY_BMSR_100BTXFULL 0x4000#define PHY_BMSR_100BTXHALF 0x2000#define PHY_BMSR_10BTFULL 0x1000#define PHY_BMSR_10BTHALF 0x0800#define PHY_BMSR_RSVD1 0x0400 /* write as zero, don't care */#define PHY_BMSR_RSVD2 0x0200 /* write as zero, don't care */#define PHY_BMSR_RSVD3 0x0100 /* write as zero, don't care */#define PHY_BMSR_RSVD4 0x0080 /* write as zero, don't care */#define PHY_BMSR_MFPRESUP 0x0040#define PHY_BMSR_AUTONEGCOMP 0x0020#define PHY_BMSR_REMFAULT 0x0010#define PHY_BMSR_CANAUTONEG 0x0008#define PHY_BMSR_LINKSTAT 0x0004#define PHY_BMSR_JABBER 0x0002#define PHY_BMSR_EXTENDED 0x0001/* ethernet media */#define IFM_ETHER 0x00000020#define IFM_10_T 3 /* 10BaseT - RJ45 */#define IFM_10_2 4 /* 10Base2 - Thinnet */#define IFM_10_5 5 /* 10Base5 - AUI */#define IFM_100_TX 6 /* 100BaseTX - RJ45 */#define IFM_100_FX 7 /* 100BaseFX - Fiber */#define IFM_100_T4 8 /* 100BaseT4 - 4 pair cat 3 */#define IFM_100_VG 9 /* 100VG-AnyLAN */#define IFM_100_T2 10 /* 100BaseT2 *//* Shared media sub-types */#define IFM_AUTO 0 /* Autoselect best media */#define IFM_MANUAL 1 /* Jumper/dipswitch selects media */#define IFM_NONE 2 /* Deselect all media *//* Shared options */#define IFM_FDX 0x00100000 /* Force full duplex */#define IFM_HDX 0x00200000 /* Force half duplex */#define IFM_FLAG0 0x01000000 /* Driver defined flag */#define IFM_FLAG1 0x02000000 /* Driver defined flag */#define IFM_FLAG2 0x04000000 /* Driver defined flag */#define IFM_LOOP 0x08000000 /* Put hardware in loopback *//* Masks */#define IFM_NMASK 0x000000e0 /* Network type */#define IFM_TMASK 0x0000000f /* Media sub-type */#define IFM_IMASK 0xf0000000 /* Instance */#define IFM_ISHIFT 28 /* Instance shift */#define IFM_OMASK 0x0000ff00 /* Type specific options */#define IFM_GMASK 0x0ff00000 /* Global options *//* Status bits */#define IFM_AVALID 0x00000001 /* Active bit valid */#define IFM_ACTIVE 0x00000002 /* Iface bound to working net */ /* * fragment structure in a descriptor each descriptor can have upto * 63 fragments */ typedef struct elFrag { UINT32 fragAddr; /* fragment address */ UINT32 fragLen; /* fragment length */ } EL_FRAG;/* structure of a descriptor with multiple fragments */ typedef struct elDesc { UINT32 nextDesc; /* final entry has 0 nextptr */ UINT32 status; /* status of the descriptor */ EL_FRAG descFrag [EL_MAXFRAGS]; /* fragments */ } EL_DESC;/* structure of a descriptor with one fragment */typedef struct elDescOnefrag { UINT32 nextDesc; /* final entry has 0 nextptr */ UINT32 status; /* status of the descriptor */ EL_FRAG descFrag; /* one fragment only */ } EL_SIMPLE_DESC;/* structure of the recv and transmit descriptors laid out in memory */ typedef struct elDescBlk { EL_SIMPLE_DESC rxDescs [EL_UPD_CNT]; EL_DESC txDescs [EL_DND_CNT]; unsigned char descPad [EL_MIN_FRAMELEN]; } EL_DESC_BLK;/* structure of a linked list holding ptrs to descriptors */ typedef struct elChain { EL_DESC * pDesc; M_BLK * pMblk; struct elChain * pNextChain; } EL_DESC_CHAIN;/* structure of a linked list holding ptrs to simple descriptors */ typedef struct elChainOnefrag { EL_SIMPLE_DESC * pDesc; M_BLK * pMblk; struct elChainOnefrag * pNextChain; } EL_SIMPLE_DESC_CHAIN;/* structure of recv and transmit chains */ typedef struct elRxTxChain { EL_SIMPLE_DESC_CHAIN rxChain [EL_UPD_CNT]; EL_DESC_CHAIN txChain [EL_DND_CNT]; EL_SIMPLE_DESC_CHAIN * pRxHead; EL_DESC_CHAIN * pTxHead; EL_DESC_CHAIN * pTxTail; EL_DESC_CHAIN * pTxFree; } EL_RX_TX_CHAIN; /* structure of the device type */ typedef struct elType { UINT16 vendorId; UINT16 deviceId; char * devName; } EL_DEV_TYPE;/* structure of the media independant interface frame */ typedef struct elMiiFrame { UINT8 stDelim; UINT8 opCode; UINT8 phyAddr; UINT8 regAddr; UINT8 turnAround; UINT16 data; } EL_MII_FRAME;/* statistics structure */ typedef struct elStats { UINT8 carrierLost; UINT8 sqeErrs; UINT8 txMultiCollision; UINT8 txSingleCollision; UINT8 txLateCollision; UINT8 rxOverrun; UINT8 txFramesOk; UINT8 rxFramesOk; UINT8 txDeferred; UINT8 upperFramesOk; UINT16 rxBytesOk; UINT16 txBytesOk; UINT16 status; } EL_STATS; /* 3com 3c90x device control structure */ typedef struct el3c90xDevice { END_OBJ endObj; /* The class we inherit from */ int unit; /* unit number of the device */ UINT32 flags; /* Our local flags */ EL_DEV_TYPE * pPhyDevType; /* phy info */ UINT8 devType; /* 3c90x or 3c905B */ UINT8 devPhyAddr; /* PHY address */ UINT32 xCvr; /* transciever */ UINT16 devMedia; /* media */ UINT16 devCaps; /* capabilities */ char * pDescMem; /* descriptor memory pointer */ EL_DESC_BLK * pDescBlk; /* pointer to descriptor blk */ EL_RX_TX_CHAIN rxTxChain; /* recv Transmit chains */ UINT32 devAdrs; /* device structure address */ int ivec; /* interrupt vector */ int intLevel; /* interrupt level */ char * memAdrs; /* 3COM memory pool base */ int memSize; /* 3COM memory pool size */ int memWidth; /* width of data port */ int offset; /* offset of data in the buffer */ int bufMtplr; /* buffer multiplier */ UINT32 pciMemBase; /* memory base as seen from PCI*/ UINT8 enetAddr[6]; /* ethernet address */ CACHE_FUNCS cacheFuncs; /* cache function pointers */ BOOL txBlocked; /* transmit flow control */ CL_POOL_ID pClPoolId; /* cluster pool Id */ M_CL_CONFIG mClCfg; /* mBlk & cluster cfg structure */ CL_DESC clDesc; /* cluster descriptor table */ } EL3C90X_DEVICE;#define EL_RX_GOODFRAMES(x) \ ((x.upperFramesOk & 0x03) << 8) | x.rxFramesOk#define EL_TX_GOODFRAMES(x) \ ((x.upperFramesOk & 0x30) << 4) | x.txFramesOk/* * Macros to extract various bits of information from the media word. */#define IFM_TYPE(x) ((x) & IFM_NMASK)#define IFM_SUBTYPE(x) ((x) & IFM_TMASK)#define IFM_INST(x) (((x) & IFM_IMASK) >> IFM_ISHIFT)/* macro to select a window */ #define EL_SEL_WIN(x) \ SYS_OUT_SHORT (pDrvCtrl, (pDrvCtrl->devAdrs + (UINT32)EL_COMMAND, \ EL_CMD_WINSEL | (x)))/* * MII access routines are provided for adapters with external * PHYs (3c905-TX, 3c905-T4, 3c905B-T4) and those with built-in * autoneg logic that's faked up to look like a PHY (3c905B-TX). * Note: if you don't perform the MDIO operations just right, * it's possible to end up with code that works correctly with * some chips/CPUs/processor speeds/bus speeds/etc but not * with others. */#define EL_MII_SET(x) \ el3c90xCsrWriteWord (pDrvCtrl, EL_W4_PHY_MGMT, \ (el3c90xCsrReadWord(pDrvCtrl, \ EL_W4_PHY_MGMT, \ EL_WIN_4) | (x)), EL_WIN_4) #define EL_MII_CLR(x) \ el3c90xCsrWriteWord (pDrvCtrl, EL_W4_PHY_MGMT, \ (el3c90xCsrReadWord(pDrvCtrl, \ EL_W4_PHY_MGMT, \ EL_WIN_4) & ~(x)), EL_WIN_4) /* board level/bus specific and architecture specific macros */ #if _BYTE_ORDER==_BIG_ENDIAN#define PCI_SWAP(x) LONGSWAP((int)(x))#define PCI_WORD_SWAP(x) ((LSB((USHORT)(x)) << 8) | MSB((USHORT)(x)))#else#define PCI_SWAP(x) (x)#define PCI_WORD_SWAP(x) (x)#endif #if (CPU_FAMILY==I80X86)#ifndef EL3C90X_CACHE_VIRT_TO_PHYS#define EL3C90X_CACHE_VIRT_TO_PHYS(address) \ CACHE_DRV_VIRT_TO_PHYS (&pDrvCtrl->cacheFuncs, (address))#endif /* EL3C90X_CACHE_VIRT_TO_PHYS */ #ifndef SYS_OUT_LONG #define SYS_OUT_LONG(pDrvCtrl,addr,value) \ { \ if (pDrvCtrl->flags & EL_MODE_MEM_IO_MAP) \ *((ULONG *)(addr)) = (value); \ else \ sysOutLong((int)(addr), (value)); \ }#endif /* SYS_OUT_LONG */#ifndef SYS_IN_LONG #define SYS_IN_LONG(pDrvCtrl, addr, data) \ { \ if (pDrvCtrl->flags & EL_MODE_MEM_IO_MAP) \ ((data) = *((ULONG *)(addr))); \ else \ ((data) = sysInLong((int) (addr))); \ }#endif /* SYS_IN_LONG */#ifndef SYS_OUT_SHORT#define SYS_OUT_SHORT(pDrvCtrl,addr,value) \ { \ if (pDrvCtrl->flags & EL_MODE_MEM_IO_MAP) \ *((USHORT *)(addr)) = (value); \ else \ sysOutWord((int)(addr), (value)); \ }#endif /* SYS_OUT_SHORT */#ifndef SYS_IN_SHORT#define SYS_IN_SHORT(pDrvCtrl, addr, data) \ { \ if (pDrvCtrl->flags & EL_MODE_MEM_IO_MAP) \ ((data) = *((USHORT *)(addr))); \ else \ ((data) = sysInWord((int) (addr))); \ }#endif /* SYS_IN_SHORT */#ifndef SYS_OUT_BYTE#define SYS_OUT_BYTE(pDrvCtrl,addr,value) \ { \ if (pDrvCtrl->flags & EL_MODE_MEM_IO_MAP) \ *((UCHAR *)(addr)) = (value); \ else \ sysOutByte((int)(addr), (value)); \ }#endif /* SYS_OUT_BYTE */#ifndef SYS_IN_BYTE#define SYS_IN_BYTE(pDrvCtrl, addr, data) \ { \ if (pDrvCtrl->flags & EL_MODE_MEM_IO_MAP) \ ((data) = *((UCHAR *)(addr))); \ else \ ((data) = sysInByte((int) (addr))); \ }#endif /* SYS_IN_BYTE */#endif /* CPU_FAMILY == I80x86 */ #if defined(__STDC__) || defined(__cplusplus)IMPORT END_OBJ * el3c90xEndLoad (char * initString);IMPORT STATUS el3c90xInitParse (EL3C90X_DEVICE * pDrvCtrl, char * initString);#elseIMPORT END_OBJ * el3c90xEndLoad ();IMPORT STATUS el3c90xInitParse ();#endif /* __STDC__ */ #endif /* _ASMLANGUAGE */#ifdef __cplusplus}#endif#endif /* __INCel3c90xEndh */
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