📄 function.h
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- timing is dependant on transducer-type of channel
[ Note: All STIM channels must implement a 'trigger acknowledge' bit
in the channel standard status register ]
The Triggered Channel Address:
- specifies channel to which trigger applies
- if it's a valid channel number, all triggers apply to that channel alone
- if it's CHANNEL_ZERO, triggering is directed at ALL implemented channels
- NCAP writes to 'write triggered channel address' at CHANNEL_ZERO to
change the channel selected for triggering
- there is no defined default value
Triggering Sensors:
- trigger causes sensor to acquire new data/data set
- STIM acknowledges coincident with the channel time
- subsequent to ('trigger ack'+'Channel Read Setup Time'), data is
available to the NCAP
- the NCAP must wait for at least the duration of 'Channel Sampling
Period' between triggers
Sensor specific States:
- Acquire Sample (sample is being acquired)
- Convert Sample (sample is digitised and moved to data buffer)
[Note: the Channel Read Setup Time is the time spent in this state ]
- Valid Data (valid data is available to be read)
Triggering Actuators:
- triggering causes actuator to assume new state/step through new states
- the data associated with the new state must be written prior to trigger
- NCAP must wait 'Channel Write Setup Time' before triggering
- STIM acknowledges when actuator begins to assume (first) new state
- NCAP must wait 'Channel Sampling Period' between triggers
Actuator specific States:
- Data Transferred to Output (last data is being sent to actuator)
- Invalid Data (STIM is processing newly received data)
- Valid Data (valid data is available to actuator => trigger is allowed)
Global Triggering
Global Triggering for Triggers with Mixed Sensors, Actuators and
Buffered Sensors:
- trigger ack is sent by the slowest channel
- worst-case setup times (from Meta-TEDS) must be honoured
- 'Timing Correction' and 'Trigger Accuracy' fields in Channel TEDS
can be used to calculate the timing.
Global Triggering when enabled Event Sequence Sensors are present:
- not considered at this time
Global Triggering when 'Channel Data Repetitions' field is > 0:
- not considered at this time
************************/
// 'Trigger' Function Prototypes:
// ------------------------------
boolean TRIG_SetTrigChanAddr(unsigned char ucChAddr);
unsigned char TRIG_GetTrigChanAddr(void);
void TRIG_SetTrigState(boolean bAllowed);
boolean TRIG_GetTrigState(void);
U8E TRIG_GetXdcrType(unsigned char ucChannel);
void TRIG_SetXdcrType(unsigned char ucChannel, U8E eType);
void TRIG_AckTrigger(void);
void TRIG_RemoveTrigAck(void);
boolean TRIG_PollTrigger(void);
boolean TRIG_DetectAbort(void);
/************************
Status:
------
The status function allows the NCAP to determine the state of the STIM as
a whole or of individual channels.
It is implemented by means of standard and auxiliary status registers.
Each bit in a specific status register represents the presence (1) or
absence (0) of a particular condition.
The status function is used with interrupt masks and interrupts to indicate
that the STIM is requesting a service, and for what purpose.
Standard and Auxiliary status registers must exist for:
- each implemented channel
- CHANNEL_ZERO (each bit can represent logical OR of individual channel bits)
Status bits that are labeled 'reserved' or 'open' will report 0 when read.
Status bits are cleared:
- 1. when the condition they report goes away.
- 2. when the condition they report goes away *and* the status register has
been read.
- the 1st option applies unless the standard specifically states otherwise
After power-on or reset, the STIM will hold off all data transport until
it is happy that it has read an accurate representation of its state.
Standard Status:
----------------
the following (global status) bits *must* be implemented:
- global service request bit (bit 0)
- STIM trigger acknowledge (bit 1)
- STIM has been reset (bit 2)
- STIM invalid command (bit 3)
- STIM OR of all 'channel auxiliary status available bits' (bit 4)
- STIM operational bit (bit 8)
the following (channel status) bits *must* be implemented:
- channel service request bit (bit 0)
- channel trigger acknowledge (bit 1)
- channel has been reset (bit 2)
- channel auxiliary status available (bit 4)
- channel operational (bit 8)
the following would be implemented for Data Sequence Sensors, Buffered
Data Sequence Sensors or Event Sequence Sensors:
- STIM OR of all 'channel missed data or event bits' bit (bit 5)
- STIM OR of all 'channel data/event bits' bit (bit 6)
- channel missed data or event bit (bit 5)
- channel data/event bit (bit 6)
the following would be implemented if an Event Sequence Sensor was
specified, and 'consistency checks' are made:
- STIM OR of 'channel hardware error bits' bit (bit 7)
- channel hardware error bit (bit 7)
The status register is 2 bytes (16 bits) wide.
bit CHANNEL_ZERO definition Channel Definition
i (msb)15 open open
i 14 open open
i 13 open open
i 12 open open
i 11 reserved reserved
i 10 reserved reserved
i 9 reserved reserved
i 8 STIM operational Channel Operational
na 7 OR of channel hardware error Channel hardware error
na 6 OR of channel data/event Channel data/event
na 5 OR of channel missed data/event Channel missed data/event
i 4 OR of chan auxiliary status available Channel auxiliary status avail.
i 3 STIM invalid command reserved
i 2 STIM has been reset Channel has been reset
i 1 STIM trigger acknowledge Channel trigger acknowledge
i (lsb)0 global service request Channel service request
[Note: i=> to be implemented: na=> not applicable in this implementation]
Auxiliary Status:
-----------------
NOTE: All auxiliary bits are optional.
bit CHANNEL_ZERO definition Channel Definition
i (msb)15 open open
i 14 open open
i 13 open open
i 12 open open
i 11 open open
i 10 open open
i 9 reserved reserved
i 8 reserved reserved
i 7 reserved reserved
i 6 reserved reserved
i 5 reserved reserved
o 4 OR of all channel data over Channel data over or under
or under range bits range bits
o 3 OR of all channel consumables Channel consumables exhausted
exhausted bits
o 2 STIM failed self-test Channel failed self-test
o 1 OR of channel failed calibration Channel failed calibration
bits
o (lsb)0 OR of channel busy bits Channel busy bit
[Note: i=> to be implemented: o=> optional]
*************************/
// 'Status' Function Prototypes:
// -----------------------------
boolean STA_SetStatusBit (U8E eReg, unsigned int uiBit,
unsigned char ucChannel);
boolean STA_ClearStatusBit(U8E eReg, unsigned int uiBit,
unsigned char ucChannel);
boolean STA_GetStatusBit (U8E eReg, unsigned int uiBit,
unsigned char ucChannel);
STATUS_REGISTER STA_GetStdStatus ( unsigned char ucChannel);
boolean STA_SetStdStatus ( STATUS_REGISTER StatusReg,
unsigned char ucChannel );
STATUS_REGISTER STA_GetAuxStatus ( unsigned char ucChannel);
boolean STA_SetAuxStatus ( STATUS_REGISTER StatusReg,
unsigned char ucChannel );
boolean STA_ClearStdStatus ( unsigned char ucChannel, STATUS_REGISTER StReg );
boolean STA_ClearAuxStatus ( unsigned char ucChannel, STATUS_REGISTER StReg );
/**************************
Interrupts:
----------
The STIM contains:
1. Standard interrupt mask register (2-bytes wide) - for each channel
2. Auxiliary interrupt mask register (2-bytes wide) - for each channel
The 'service request bit' may be set if:
- a 1 is written to a bit position in either interrupt mask register
- the corresponding bit is set in the status register (see 'status.h')
When a 'service request' bit is set, an interrupt will be generated.
Standard Interrupt Mask register:
---------------------------------
- bit positions correspond one-to-one with the bit positions in the
Stantard Status register.
- default value is all '1's (i.e. 0xFFFF - all standard status bits can
generate an interrupt )
- a STIM or Channel reset will not affect the register contents
[NOTE: the lsb of the standard interrupt mask register cannot be used,
as this corresponds with the 'service request' bit.
The 'Service Request' bit CANNOT BE MASKED. ]
Auxiliary Interrupt Mask register:
----------------------------------
- bit positions correspond one-to-one with the bit positions in the
Auxiliary Status register.
- default value is all '0's (i.e. 0x0000 - no auxiliary status bits can
generate an interrupt )
- a STIM or Channel reset will not affect the register contents
[ NOTE 1: ]
There is a separate physical signal in the TII that allows the STIM to
request service from the NCAP (i.e. the NINT line).
The interrupt signal will be asserted if:
- the service request bit is set:
- in the global standard status register
- in the channel standard status register
[ NOTE 2: ]
The service request bit is set by a combination of the standard
status register bits, the auxiliary status register bits and the
interrupt masks.
The NCAP is not required to service an interrupt immediately.
[ NOTE 3: ]
The bit-positions within the 'standard' and 'auxiliary' interrupt
masks correspond directly with the bit-positions defined for the
'standard' and 'auxiliary' status registers.
The status bits are merely enabled/disabled in these interrupt masks.
See the 'status' section to see the list of bit-definitions and
their positions.
***************************/
// 'Interrupt' Function Prototypes:
// --------------------------------
INTERRUPT_MASK INT_GetInterruptMask(U8C eFlag, unsigned char ucCh);
boolean INT_SetInterruptMask(U8C eFlag, unsigned char ucCh,
INTERRUPT_MASK Mask);
void INT_SetMaskDefaults(void);
boolean INT_ServiceRequest (void);
void INT_ToggleInterrupt(boolean bSet);
/*************************
The control function allows commands to be sent to the STIM as a whole or
to each channel thereof.
It is accessed by:
- writing to fn address 'write channel control command', for a given channel
- writing to fn address 'write global control command' for CHANNEL_ZERO
Control Commands 0 and 1 are necessary for *all* STIM implementations for
*all* channels.
Control Commands 2-4 are optional functions.
Control Commands 5-7 are necessary for STIMs defining Event Sequence Sensors
Control Commands 9, 10 are necessary for STIMs defining Data Sequence
Sensors or Buffered Data Sequence Sensors
Control Commands 8, 11-255 are reserved - they *can NOT* be implemented
Control Commands 256-65525 are open to industry - they *may* be implemented
This implementation will implement:
Command: CHANNEL_ZERO definition: Individual Channel definition:
0 no operation no operation
1 reset STIM reset channel
< the following will probably not be implemented: we'll see >
2 initiate STIM self-test initiate channel self-test
3 calibrate all channels calibrate channel
4 zero all channels zero channel
< these *won't* be implemented >
5 enable all event sequence sensors enable event sequence sensor
6 disable all event seq sensors disable event seq sensor
7 set all ev seq sensors to config mode set ev seq sensor to config mode
9 enable all data seq sensors enable data seq sensor
10 disable all data seq sensors disable data seq sensor
**************************/
// 'Control' Function Prototypes:
// ------------------------------
void CTRL_NoOp(void);
boolean CTRL_Reset (unsigned char ucChannel);
boolean CTRL_SelfTest (unsigned char ucChannel);
boolean CTRL_Calibrate(unsigned char ucChannel);
boolean CTRL_Zero (unsigned char ucChannel);
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