📄 tii.c
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/*
Author: Paul Conway
Contact Details: PEI Technologies Ltd.
Foundation Building
National Technological Park
Limerick
http://www.ul.ie/~pei
Release Date: May 1999.
Version: 1.01
Company: Analog Devices
*/
#include <aduc812.h>
#include "datatype.h"
#include "function.h"
#include "stim.h"
#include "tii.h"
// Definitions for the TII lines:
// -----------------------------
// Note that there is no need to define DOUT, DIN and DCLK: they are physically
// connected on the SPI port pins (MISO, MOSI and SCLK), and once SPI has been
// configured, they will run automatically.
// STIM Inputs...
//
sbit NIOE = P1 ^ 5;
sbit NTRIG = P3 ^ 2;
// STIM Outputs...
//
sbit NACK = P3 ^ 4;
sbit NINT = P3 ^ 5;
// Module Level Variables:
// ----------------------
//
static boolean mbAbort=FALSE;
static boolean bSPIDone=FALSE;
static unsigned char mucBuffer=0;
// Module Level Function Prototypes:
// --------------------------------
//
boolean TII_SPIDone(void);
// TII Functions:
// -------------
void TII_Initialise(void)
{
// Initialise the TII Port Lines:
// -----------------------------
// Set up Port 1.5 as a digital input port (i.e. NIOE pin, 'SS').
// - this is done by writing 0 to that SFR bit.
//
P1 = P1 & 0xDF;
// Set up Port 3.4 and Port 3.5 as digital outputs (i.e. NACK and NINT)
// - this is done by writing 0 to those SFR bits.
// Set up Port 3.2 as a digital input (i.e. NTRIG)
// - this is done by writing 1 to that SFR bit.
//
P3 = P3 & 0xCF;
P3 = P3 | 0x04;
// Set the TII outputs to idle-high (i.e. inactive)
//
NACK = 1;
NINT = 1;
// Initialise the SPI Interface:
// ----------------------------
//
SPICON = 0x0C; // slave mode: CPOL=1, CPHA=1, SPIM=0
IE2 = 0x01; // enable SPI interrupt
SPE = 1; // enable SPI
EA = 1; // enable global interrupts
}
//
// Receive one byte from the NCAP...
//
unsigned char TII_WriteByte(void)
{
unsigned char res=0;
// NIOE is asserted: or at least it should be! If it is not, abort now.
//
if( !TII_DetectNIOE() ) mbAbort=TRUE;
// If the sequence has not aborted:
//
if(!mbAbort)
{
bSPIDone=FALSE;
// Do the 'pacing' thing. This enables one byte to be received.
//
TII_ToggleNACK();
// Now wait for a byte to be received into the SPI (interrupt routine)
//
while( !TII_SPIDone() )
//
// ...better stop waiting if the transport aborted
//
if(mbAbort) break;
// Assign the byte received (from the interrupt routine) to our
// local return variable, then reset the interrupt variable
//
res = mucBuffer;
mucBuffer = 0;
}
return res;
}
//
// Transmit one byte from the STIM to the NCAP
//
boolean TII_ReadByte(unsigned char ucByte)
{
// NIOE is asserted: or at least it should be! If it is not, abort now.
//
if( !TII_DetectNIOE() ) mbAbort=TRUE;
// If the sequence has not aborted:
//
if(!mbAbort)
{
bSPIDone=FALSE;
// load the outbound byte into the SPI buffer
//
SPIDAT = ucByte;
// do the 'pacing' thing - there is data available to be read
//
TII_ToggleNACK();
// now wait for the byte to be transmitted from the SPI
//
while( !TII_SPIDone() )
//
// ...better stop waiting if transport aborted
//
if( mbAbort) break;
}
return !mbAbort;
}
//
// Receive uiNumBytes from the interface and store them into the buffer
// referenced by pBuffer.
//
boolean TII_WriteFrame(unsigned int uiNumBytes, unsigned char *pBuffer)
{
unsigned int count;
for(count=0; count<uiNumBytes; count++)
{
if(!mbAbort) *(pBuffer+count)=TII_WriteByte();
else break;
}
return !mbAbort;
}
//
// Transmit uiNumBytes from the buffer referenced by pBuffer.
//
boolean TII_ReadFrame(unsigned int uiNumBytes, unsigned char *pBuffer)
{
unsigned int count;
for(count=0; count<uiNumBytes; count++)
{
if(!mbAbort) TII_ReadByte( *(pBuffer+count) );
else break;
}
return !mbAbort;
}
//
// Interrogate the Physial line representing NIOE.
// If the line is Asserted, return TRUE : else return FALSE.
//
boolean TII_DetectNIOE(void)
{
return !NIOE;
}
//
// Interrogate the Physial line representing NTRIG.
// If the line is Asserted, return TRUE : else return FALSE.
//
boolean TII_DetectNTRIG(void)
{
return !NTRIG;
}
//
// Assert the Physical line representing NACK
//
void TII_AssertNACK(void)
{
NACK = 0;
}
//
// Negate the Physical line representing NACK
//
void TII_NegateNACK(void)
{
NACK = 1;
}
//
// Toggle the Physical line representing NACK
//
void TII_ToggleNACK(void)
{
NACK = ~NACK;
}
//
// Assert the Physical line representing NINT
//
void TII_AssertNINT(void)
{
NINT = 0;
}
//
// Negate the Physical line representing NINT
//
void TII_NegateNINT(void)
{
NINT = 1;
}
// Functions that can be used by external software modules to either
// look and see if the data transport aborted, or to set the Abort flag.
//
boolean TII_GetAbortStatus()
{
return mbAbort;
}
void TII_SetAbortStatus(boolean bAbort)
{
mbAbort = bAbort;
}
//
// Check to see whether the SPI transport action has completed
//
boolean TII_SPIDone(void)
{
if(!TII_DetectNIOE())
// Oops- NIOE is no longer asserted
//
if(!bSPIDone)
// ...and the SPI transport did not complete => abort!
//
mbAbort=TRUE;
return bSPIDone;
}
//
// The Interrupt Routine:
// All we want to do here is set the 'bSPIDone' flag, and place whatever
// data was received into the 'mucBuffer' variable.
//
void SPI_InterruptRoutine(void) interrupt 7
{
// We better wait for the interrupt sequence to finish...
//
while (WCOL) ;
mucBuffer = SPIDAT;
bSPIDone = TRUE;
}
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