boot.s

ARM7TDMI软件模拟器

;;**************************************************************
;;ucosII for simuCPU,you can only free use it for personal study purpose!
;;www.MShowTec.com for more information.
;;lmjx,Email:[e-mail],All Right Reserved.
;;**************************************************************
		IMPORT OSISR
		
 
        AREA    Init, CODE, READONLY
		CODE32
		GET snds.s
		
        ENTRY

start

	B	reset					; Reset   
	B	undef  					; Undef	
	B	swi						; Software interrupt
	B	prefetch				; Prefetch Abort
	B	data					; Data Abort
	NOP
	B	OSISR					; Irq


;Part 1
;***************************************************************
;disable interrupts in CPU and switch to SVC32 mode

reset	

	MRS	r0, cpsr
	BIC	r0, r0, #MASK_MODE
	ORR	r0, r0, #MODE_SVC32
	ORR 	r0, r0, #I_BIT
	ORR 	r0, r0, #F_BIT
	MSR	cpsr_c, r0

	LDR	r2, =ARM7_INTMASK			 ;R2->interrupt controller
	MVN	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;disable all interrupt soucres

	LDR	r2, =ARM7_INTPEND			 ;R2->interrupt pend register.
	MOV	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;clear all interrupt flags.


;Part 2
;****************************************************************
;Initalize the memory as followa:
;	FLASH			@ 0  ~ 8 M
;	SDRAM			@ 8  ~ 16M

	LDR	r2, =ARM7_MEMMAP			 
	LDR	r1, =0x08080800				;8M flash form address 0x00000000,8M sdram form 0x08000000		 
	STR	r1, [r2]


;Part 3
;****************************************************************
;	Import some important variables for later use

    IMPORT |Image$$RO$$Base|    
	IMPORT |Image$$RO$$Limit|   
	IMPORT |Image$$RW$$Base|   
	IMPORT |Image$$RW$$Limit| 	
	IMPORT |Image$$ZI$$Base| 	
	IMPORT |Image$$ZI$$Limit| 	
	
;Part 4
;*****************************************************************
; Copy RW & ZI to SDRAM

	LDR r0, =|Image$$RO$$Limit| 	
	LDR r1, =|Image$$RW$$Base| 		
	LDR r3, =|Image$$ZI$$Base| 		

	CMP r0, r1 
	BEQ %1
 
0 	CMP r1, r3 						; Copy init data
	LDRCC r2, [r0], #4
	STRCC r2, [r1], #4
	BCC %B0

1 	LDR r1, =|Image$$ZI$$Limit| 	; Top of zero init segment
	MOV r2, #0

2 	CMP r3, r1 						; Zero init
	STRCC r2, [r3], #4
	BCC %B2
	
;Part 5
;***********************************************************************
	
;Set stack pointer & jump to c function

	; Put the stack base address into R0
	LDR     r0, =0xe00000
	; Add the stack size to get the top of the stack in R0
	ADD	r0,r0,#0x600
    SUB	r0,r0,#4

    ; stack IRQ
    MOV     r3,#2_11010010
    MSR     CPSR_c,r3		
    MOV     r13,r0			

    ; stack  ABORT
    SUB     r0,r0,#0x100
    MOV     r3,#2_11010111
    MSR     CPSR_c,r3		
    MOV     r13,r0			

    ; stack UNDEF 
    SUB     r0,r0,#0x100
    MOV     r3,#2_11011011
    MSR     CPSR_c,r3		
    MOV     r13,r0			

    ; stack FIQ 
    SUB     r0,r0,#0x100
    MOV     r3,#2_11010001
    MSR     CPSR_c,r3		
    MOV     r13,r0				
    
    ; stack SVC
    SUB     r0,r0,#0x100
    MOV     r3,#2_11010011
    MSR     CPSR_c,r3
	MOV	r13,r0
	
	 ; stack SYSTEM(USER)
    SUB     r0,r0,#0x100
    MOV     r3,#2_11011111
    MSR     CPSR_c,r3		
    MOV     r13,r0	
    
    ;enable IRQ & FIQ
    MRS	r0, cpsr
	BIC 	r0, r0, #I_BIT
	BIC 	r0, r0, #F_BIT
	MSR	cpsr_c, r0

	IMPORT	main
	
	B main
	
	;IMPORT __main  
              
    ;B  __main   

	
undef
	b undef
	
swi
	b swi
	
prefetch
	b prefetch
	
data
	b data

        END