📄 clr_alg.lst
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298 009e ba01 SUB #1 ;
299 009f 9005! SACL flashAlgoVars.PLS_CNT ;Pulse counter now has remaining
300 ;pulses allowable.
301
302 00a0 e388 BCND CHK_IF_FAIL,EQ ;If zero then the pulse count is exceeded,
00a1 00a4+
303 ;enter error handling,
304 00a2 7980 B PGVERON ;verify word programmed
00a3 0070+
305 ;--------------------------------------------------------------------------------------------------
306 00a4 CHK_IF_FAIL: ; If here then MAX_PCNT pulses have been
307 ; applied. So, check the fail command.
TMS320C24xx COFF Assembler Version 7.02 Tue Jul 29 10:56:09 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
clr_alg.asm PAGE 8
308 00a4 690c! LACL flashAlgoVars.FAIL_CMD ; Get the FAIL_CMD passed from caller.
309 00a5 e308 BCND ERROR,NEQ ; If non-zero begin error handling.
00a6 00a9+
310 00a7 7980 B NEXTWORD ; If fail command is zero, then the
00a8 00ad+
311 ; caller intended to allow programming
312 ; failures. So continue the flow.
313 00a9 7a80 ERROR: CALL END1
00aa 00e1+
314 00ab 7980 B ERROR1
00ac 003f+
315
316 ;--------------------------------------------------------------------------------------------------
317 ; NEXTWORD
318 ; This block does the following things:
319 ; 1. Checks if the ADDR is at the last address in the sector.
320 ; 2. If not, increments ADDR.
321 ; 3. Sets up program pulse count for programming the next word.
322 ;--------------------------------------------------------------------------------------------------
323 00ad NEXTWORD:
324
325 00ad 6900! LACL flashAlgoVars.ADDR ;ACC = (address of previous word programmed).
326 00ae 3008! SUB flashAlgoVars.FL_SECEND ;ACC = (prev word addr) - (last address of sector)
327 00af e308 BCND NW,NEQ ;If there is a match end the routine,
00b0 00b2+
328 00b1 ef00 RET ;otherwise continue with the next word.
329
330 00b2 6900! NW LACL flashAlgoVars.ADDR ;ACC = (address of previous word programmed).
331 00b3 b801 ADD #1 ;INCREMENT ADDR
332 00b4 9000! SACL flashAlgoVars.ADDR ;STORE ADDR OF NEXT WORD
333
334 00b5 ae05! SPLK #MX_PCNT,flashAlgoVars.PLS_CNT ;Initialize PROGRAM PULSE COUNT
00b6 00fa
335 00b7 7980 B PGVERON ;begin prog of next word
00b8 0070+
336
337
338 ;--------------------------------------------------------------------------------------------------
339 ; PROG: Program subroutine.
340 ;--------------------------------------------------------------------------------------------------
341 ; This is a LEVEL4 subroutine.
342 ;--------------------------------------------------------------------------------------------------
343 ;
344 ; 1. This subroutine applies programming pulses to the flash word based on
345 ; the bitmask built by the caller and placed in flashAlgoVars.DATA.
346 ;
347 ; 2. The pulses are applied to the main array or the redundant rows depending
348 ; on the status of flashAlgoVars.FL_CMD.
349 ; FL_CMD = 0080h (NOROWRED) programs the bits in the main array.
350 ; FL_CMD = 0100h (PRECON).
351 ;--------------------------------------------------------------------------------------------------
352 00b9 bf80 PROG LACC #WDATA ;Load data to be prog
00ba 0003
353 00bb a703! TBLW flashAlgoVars.DATA ;Write data to the WDATA register.
TMS320C24xx COFF Assembler Version 7.02 Tue Jul 29 10:56:09 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
clr_alg.asm PAGE 9
354
355 00bc 1009! LACC flashAlgoVars.FL_CMD ;Get the flash command.
356 00bd bfd0 XOR #0003h ;Add in the bits for the PROG mode.
00be 0003
357 00bf 9001! SACL flashAlgoVars.PAD
358
359 00c0 bf80 LACC #CTRL ;Init prog mode
00c1 0001
360 00c2 a701! TBLW flashAlgoVars.PAD
361 00c3 SDELAY #T_psu_p ;Wait T_psu(P)
1 00c3 bb3a RPT #T_psu_p
1 00c4 8b00 NOP
362
363 00c5 bf80 LACC #PMPC ;Turn on prog voltages
00c6 0000
364 00c7 ae01! SPLK #0005h,flashAlgoVars.PAD
00c8 0005
365 00c9 a701! TBLW flashAlgoVars.PAD
366
367 00ca PPW SDELAY #T_prog_e1 ;PROG pulse width part 1
1 00ca bb1c RPT #T_prog_e1
1 00cb 8b00 NOP
368 00cc SDELAY #T_prog_e2 ;PROG pulse width part 2
1 00cc bb1c RPT #T_prog_e2
1 00cd 8b00 NOP
369
370 00ce ae01! SPLK #0000h,flashAlgoVars.PAD ;Turn off PROG Voltages.
00cf 0000
371 00d0 a701! TBLW flashAlgoVars.PAD
372
373 00d1 SDELAY #Tph_P ;Wait T_ph(P) (HOLD TIME).
1 00d1 bb3a RPT #Tph_P
1 00d2 8b00 NOP
374
375 00d3 ae04! SPLK #0001h,flashAlgoVars.PAD1 ;Clear PMPC and CTRL.
00d4 0001
376 00d5 7a80 CALL CLRCMD ;Since PMPC is 0s already from above,
00d6 00e8+
377 ;really the only thing affected is CTRL
378
379 00d7 SDELAY #Tph_A ;Wait in normal read mode.
1 00d7 bb3a RPT #Tph_A
1 00d8 8b00 NOP
380
381
382 00d9 ef00 RET
383
384
385
386
387
388 ;--------------------------------------------------------------------------------------------------
389 ; READWORD
390 ; This routine performs the following operations
TMS320C24xx COFF Assembler Version 7.02 Tue Jul 29 10:56:09 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
clr_alg.asm PAGE 10
391 ; 1. Reads the word at the location pointed to by flashAlgoVars.ADDR.
392 ; 2. Stores the word in the variable READ.
393 ; 3. Returns to the caller in Register Mode.
394 ; This is a LEVEL4 subroutine.
395 ;--------------------------------------------------------------------------------------------------
396 00da READWORD:
397 00da ACCESS_ARRAY
1 00da af7f IN 07fh,0ff0fh
00db ff0f
398 00dc 1000! LACC flashAlgoVars.ADDR ;Read word flash
399 00dd a602! TBLR flashAlgoVars.READ ;store word in READ (data space)
400 00de ACCESS_REGS
1 00de 0c7f OUT 07fh,0ff0fh
00df ff0f
401 00e0 ef00 RET
402 ;--------------------------------------------------------------------------------------------------
403 ; END1:
404 ; This routine performs the following operations
405 ; 1. Clears the control registers PMPC,CNTL,WADDR,WDATA,ENABLE AND SECTOR)
406 ; 2. Returns to the caller in ARRAY Mode.
407 ;--------------------------------------------------------------------------------------------------
408 00e1 ae04! END1: SPLK #0006h,flashAlgoVars.PAD1 ;CLEAR ALL SIX
00e2 0006
409 00e3 7a80 CALL CLRCMD
00e4 00e8+
410 00e5 ACCESS_ARRAY
1 00e5 af7f IN 07fh,0ff0fh
00e6 ff0f
411 00e7 ef00 RET
412
413 ;--------------------------------------------------------------------------------------------------
414 ; CLRCMD
415 ;--------------------------------------------------------------------------------------------------
416 ; This routine performs the following operations
417 ; 1. Places the flash in normal read mode by writing 0000 to two control
418 ; registers PMPC=0000,CNTL=0000.
419 ; 2. Returns to the caller in Register Mode.
420 ;--------------------------------------------------------------------------------------------------
421 00e8 CLRCMD: ACCESS_REGS
1 00e8 0c7f OUT 07fh,0ff0fh
00e9 ff0f
422 00ea ae01! SPLK #0,flashAlgoVars.PAD
00eb 0000
423 00ec bf80 LACC #0
00ed 0000
424 00ee 0b04! RPT flashAlgoVars.PAD1
425 00ef a701! TBLW flashAlgoVars.PAD
426 00f0 ef00 RET
427
428 00f1 .label ClearAlgoEndMain
429
430 0000 .sect "CSPL_text"
431 0000 SETWADDR:
432 0000 .label ClearAlgoStartSpl
TMS320C24xx COFF Assembler Version 7.02 Tue Jul 29 10:56:09 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
clr_alg.asm PAGE 11
433 0000 a700! TBLW flashAlgoVars.ADDR ;Perform the write to the address register.
434 0001 ef00 RET
435 0002 .label ClearAlgoEndSpl
436
437
No Errors, No Warnings
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