📄 pgm_alg.lst
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289 ; the address ADDR.
290 ; DATA contains the bitmask for the pulses.
291 ;--------------------------------------------------------------------------------------------------
292 0062 bf80 PROG LACC #WDATA ;Load data to be prog
0063 0003
293 0064 a703! TBLW flashAlgoVars.DATA
294
295 0065 1009! LACC flashAlgoVars.FL_CMD
296 0066 bfd0 XOR #0003h ;PROG CMND
0067 0003
297 0068 9001! SACL flashAlgoVars.PAD
298
299 0069 bf80 LACC #CTRL ;Init prog mode
006a 0001
300 006b a701! TBLW flashAlgoVars.PAD
301 006c SDELAY #T_psu_p ;Wait T_psu(P)
1 006c bb3a RPT #T_psu_p
1 006d 8b00 NOP
302
303 006e bf80 LACC #PMPC ;Turn on prog voltages
006f 0000
304 0070 ae01! SPLK #0005h,flashAlgoVars.PAD
0071 0005
305 0072 a701! TBLW flashAlgoVars.PAD
306
307 0073 PPW SDELAY #T_prog_e1 ;PROG PULSE WIDTH PART 1
1 0073 bb1c RPT #T_prog_e1
1 0074 8b00 NOP
308 0075 SDELAY #T_prog_e2 ;PROG PULSE WIDTH PART 2
1 0075 bb1c RPT #T_prog_e2
1 0076 8b00 NOP
309
310 0077 ae01! SPLK #0000h,flashAlgoVars.PAD ;TURN OFF PROG VOLTAGES
0078 0000
311 0079 a701! TBLW flashAlgoVars.PAD
312
313 007a SDELAY #Tph_P ;Wait T_ph(P) (HOLD TIME).
1 007a bb3a RPT #Tph_P
1 007b 8b00 NOP
314
315 007c ae04! SPLK #0001h,flashAlgoVars.PAD1 ;CLEAR PMPC AND CNTL
007d 0001
316 007e 7a80 CALL CLRCMD
007f 00ab+
317
318
319 0080 SDELAY #Tph_A ;Wait in normal read mode.
1 0080 bb3a RPT #Tph_A
1 0081 8b00 NOP
320
TMS320C24xx COFF Assembler Version 7.02 Tue Jul 29 10:56:11 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
pgm_alg.asm PAGE 8
321
322 0082 ef00 RET
323 ;--------------------------------------------------------------------------------------------------
324 ; Handles the error code generation for the case when bit(s) cannot be programmed even after
325 ; the application of the maximum allowed pulses.
326 ;--------------------------------------------------------------------------------------------------
327 0083 PULSE_LIMIT_ERROR:
328 0083 ae04! SPLK #0005h,flashAlgoVars.PAD1
0084 0005
329 0085 7a80 CALL CLRCMD
0086 00ab+
330
331 0087 ae0f! SPLK #3,flashAlgoVars.ALGO_STATUS
0088 0003
332 0089 ACCESS_ARRAY
1 0089 af7f IN 07fh,0ff0fh
008a ff0f
333 008b 8b89 MAR *,AR1
334 008c ef00 RET
335 ;--------------------------------------------------------------------------------------------------
336 ; Handles the error code generation for the case when a zero bit error has occurred.
337 ; A zero bit error is defined as occurring when a bit in flash is a zero, when its intended value
338 ; as defined by the RAM buffer is a one.
339 ;--------------------------------------------------------------------------------------------------
340 008d ZERO_BIT_ERROR:
341 008d ae04! SPLK #0005h,flashAlgoVars.PAD1
008e 0005
342 008f 7a80 CALL CLRCMD
0090 00ab+
343
344 0091 ae0f! SPLK #4,flashAlgoVars.ALGO_STATUS
0092 0004
345 0093 ACCESS_ARRAY
1 0093 af7f IN 07fh,0ff0fh
0094 ff0f
346 0095 8b89 MAR *,AR1
347 0096 ef00 RET
348
349 ;--------------------------------------------------------------------------------------------------
350 ; READWORD
351 ;--------------------------------------------------------------------------------------------------
352 ; This routine performs the following operations
353 ; 1. Reads the word at the location pointed to by ADDR.
354 ; 2. Stores the word in the variable READ.
355 ; 3. Returns to the caller in Register Mode.
356 ;--------------------------------------------------------------------------------------------------
357 0097 READWORD
358 0097 ACCESS_ARRAY
1 0097 af7f IN 07fh,0ff0fh
0098 ff0f
359
360 0099 1000! LACC flashAlgoVars.ADDR ;Read word flash
361 009a a602! TBLR flashAlgoVars.READ ;store word in READ (data space)
362
TMS320C24xx COFF Assembler Version 7.02 Tue Jul 29 10:56:11 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
pgm_alg.asm PAGE 9
363 009b ACCESS_REGS
1 009b 0c7f OUT 07fh,0ff0fh
009c ff0f
364
365 009d ef00 RET
366
367 ;--------------------------------------------------------------------------------------------------
368 ; END1:
369 ;--------------------------------------------------------------------------------------------------
370 ; This routine performs the following operations
371 ; 1. Clears the control registers PMPC,CNTL,WADDR,WDATA,ENABLE AND SECTOR)
372 ; 2. Returns to the caller in ARRAY Mode.
373 ;--------------------------------------------------------------------------------------------------
374 009e 1000! END1: LACC flashAlgoVars.ADDR ;Get the address variable and increment
375 009f b801 ADD #1 ;the address counter and store it back.
376 00a0 9000! SACL flashAlgoVars.ADDR ;
377
378 00a1 ae04! SPLK #0006h,flashAlgoVars.PAD1 ;Clear 6 regs.
00a2 0006
379 00a3 7a80 CALL CLRCMD
00a4 00ab+
380
381 00a5 ae0f! SPLK #0,flashAlgoVars.ALGO_STATUS ;Zero error code, since programming
00a6 0000
382 ;completed successfully.
383 00a7 ACCESS_ARRAY
1 00a7 af7f IN 07fh,0ff0fh
00a8 ff0f
384 00a9 8b89 MAR *,AR1
385 00aa ef00 RET
386
387 ;--------------------------------------------------------------------------------------------------
388 ; CLRCMD
389 ;--------------------------------------------------------------------------------------------------
390 ; This routine performs the following operations
391 ; 1. Places the flash in normal read mode by writing 0000 to two control
392 ; registers PMPC,CNTL=>0000)
393 ; 2. Returns to the caller in Register Mode.
394 ;--------------------------------------------------------------------------------------------------
395 00ab CLRCMD: ACCESS_REGS
1 00ab 0c7f OUT 07fh,0ff0fh
00ac ff0f
396 00ad ae01! SPLK #0,flashAlgoVars.PAD
00ae 0000
397 00af bf80 LACC #0
00b0 0000
398 00b1 0b04! RPT flashAlgoVars.PAD1
399 00b2 a701! TBLW flashAlgoVars.PAD
400 00b3 ef00 RET
401 00b4 .label ProgramAlgoEndMain
402
403 0000 .sect "PSPL_text"
404 0000 SETWADDR:
405 0000 .label ProgramAlgoStartSpl
TMS320C24xx COFF Assembler Version 7.02 Tue Jul 29 10:56:11 2003
Copyright (c) 1987-2002 Texas Instruments Incorporated
pgm_alg.asm PAGE 10
406 0000 a700! TBLW flashAlgoVars.ADDR
407 0001 ef00 RET
408 0002 .label ProgramAlgoEndSpl
409
No Errors, No Warnings
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