📄 superio.asl
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OperationRegion (
SPIO, // name of Operation Region for SuperIO device
SystemIO, // type of address space
0x3F0, // base address for Configuration Mode
0x2) // size of region in bytes
Field ( SPIO, // name of Operation Region containing field
ByteAcc, // access in Byte mode
NoLock, // may change, depending on SMI behavior
Preserve) // Update Rule
{
INDX,8, //field named INDX is 8 bits wide
DATA,8 //field naemd DATA is 8 bits wide
}
IndexField(INDX, //index name
DATA, //name of I/O port
ByteAcc,
NoLock,
Preserve)
{
offset(0xE0),
CRC0,8,
CRC1,8,
CRC2,8,
CRC3,8,
CRC4,8,
CRC5,8,
CRC6,8,
CRC7,8,
CRC8,8,
CRC9,8,
CRCA,8,
CRCB,8,
CRCC,8,
CRCD,8,
CRCE,8,
CRCF,8,
CRD0,8,
CRD1,8,
CRD2,8,
CRD3,8,
CRD4,8,
CRD5,8,
CRD6,8,
CRD7,8,
CRD8,8
} //end of indexed field
OperationRegion ( PCIC, SystemIO, 0x0CF8, 0x08)
Field ( PCIC, DWordAcc, NoLock, Preserve)
{
PIND, 32,
PDAT, 32
}
Method(ENFG,0)
{
Store(0x80002084, PIND)
Store(PDAT, Local0)
Or(Local0, 0x00000200, Local0) // VT686 Function 0 Rx85 bit 1
Store(0x80002084, PIND)
Store(Local0, PDAT)
}
Method(EXFG,0)
{
Store(0x80002084, PIND)
Store(PDAT, Local0)
And(Local0, 0xFFFFFDFF, Local0) // VT686 Function 0 Rx85 bit 1
Store(0x80002084, PIND)
Store(Local0, PDAT)
}
Include ("686_FDC.asl")
Include ("686_UAR1.asl")
Include ("686_UAR2.asl")
Include ("686_LPT.asl")
Include ("PS2.asl") //R02
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