686_fdc.asl

惠普公司bios完整源代码大机密!

Device(FDC0)	{ 			// Floppy Disk controller
               Name(_HID, EISAID("PNP0700")) 	// PnP Device ID
               Method(_STA,0)	{ 		// Status of the Floppy disk controller
                Store(0x80002084, PIND)
                Store(PDAT, Local0)
                And(Local0, 0x00000100, Local0)		// VT686 Function 0 Rx85 bit 0
                If(LNot(Local0)) {
                        Return(0x00)
                }  //end if

                       Else {
                        ENFG() 			// Enter Config Mode
                        Store(CRC2, Local0)		//Read FSR register
                        And(Local0, 0x10, Local0)	//Read bit4 FDC enable
                        If(LNotEqual(Local0, 0x00)){
                                       EXFG()
                                Return(0x0F)		//present, enable, UI, functioning
                        }  // end if
                        Else {
                                       Store(CRC3, Local1)     // Read FAR register //R01 - starts
                                       If (LNotEqual(Local1, 0x00)) {
                                               EXFG()
                                               Return(0x0D)		//present, disable
                                }  // end if				     
                                else {					     //R01 - ends
                                        EXFG()
                                               Return(0x00)		//disable
                                }
                               }  // end else
                       }  // end else
               }  // end of _STA method

               Method(_DIS,0)	{
                        ENFG() 				// Enter Config Mode
                        Store(CRC2, Local0)		//Read FSR register
                        And(Local0, 0xEF, Local0)	//Read bit4 FDC enable
                        Store(Local0, CRC2)  		//Disable
                        EXFG()

               }  //end _DIS method

               Method(_CRS,0)	{ 			//Current FDC Resource
                Name(BUFF, ResourceTemplate(){
                        IO(
                                Decode16,	// FIO2._DEC
                                0x03F0,		// Min base I/O addr, FIO2._MIN
                                0x03F0,		// Max base I/O addr, FIO2._MAX
                                0x08,		// Base alignment, FIO2._ALN 
                                0x06,		// Number of contig I/O ports, FIO2._LEN
                                       FIO1		// Name
                                )
                        IO(
                                Decode16,	// FIO2._DEC
                                0x03F7,		// Min base I/O addr, FIO2._MIN
                                0x03F7,		// Max base I/O addr, FIO2._MAX
                                0x01,		// Base alignment, FIO2._ALN 
                                0x01,		// Number of contig I/O ports, FIO2._LEN
                                       FIO2		// Name
                                )
                               IRQNoFlags(
                                       FIRQ
                                )
                                {0x06}      	// IRQ 6, FIRQ._INT
                        DMA(
                                Compatibility,	// Channel Speed, FDMA._TYP
                                BusMaster,	// Bus Master, FDMA._BM
                                Transfer8,	// Transfer Size, FDMA._SIZ
                                       FDMA		// Name
                                )
                                {0x02}		// DMA channel 2, FDMA._DMA  
                        } // end Resource Template
                ) // end buffer BUFF

                Return(BUFF) 			// Return BUFF
               }  // end _CRS method

        Name(_PRS, ResourceTemplate(){
                IO(
                        Decode16,	// FIO1._DEC
                        0x03F0,		// Min base I/O addr, FIO1._MIN
                        0x03F0,		// Max base I/O addr, FIO1._MAX
                        0x08,		// Base alignment, FIO1._ALN 
                        0x06,		// Number of contig I/O ports, FIO1._LEN
                               FIO1		// Name
                )
                IO(
                        Decode16,	// FIO2._DEC
                        0x03F7,		// Min base I/O addr, FIO2._MIN
                        0x03F7,		// Max base I/O addr, FIO2._MAX
                        0x01,		// Base alignment, FIO2._ALN 
                        0x01,		// Number of contig I/O ports, FIO2._LEN
                               FIO2		// Name
                )
                       IRQNoFlags(
                               FIRQ
                )
                        {0x06}      	// IRQ 6, FIRQ._INT
                DMA(
                        Compatibility,	// Channel Speed, FDMA._TYP
                        BusMaster,	// Bus Master, FDMA._BM
                        Transfer8,	// Transfer Size, FDMA._SIZ
                               FDMA		// Name
                )
                        {0x02}		// DMA channel 2, FDMA._DMA  
                } // end Resource Template
        ) // end of _PRS

               Method(_SRS,1)	{			//Set Resource
                       CreateByteField (Arg0, 0x02, IOLO)      //IO Port Low Byte (F2)
                       CreateByteField (Arg0, 0x03, IOHI)      //IO Port High Byte (03)
                       CreateWordField (Arg0, 0x11, IRQ0)      //IRQ 
                       CreateByteField (Arg0, 0x14, DMA0) 	//DMA

                       ENFG()                  // Enter Config Mode

                       Store(CRC2,Local0)      // Disable FDC
                       And(Local0,0xEF,Local1)
                       Store(Local1,CRC2)

                Store(IOLO, Local0)			//Set IO
                ShiftRight(Local0, 0x02, Local0)	//FDC IO: CRC3
                And(Local0, 0xFC, Local0)		//Bit7-2 = ADR9-4
                Store(IOHI, Local1)			//Bit1-0 = 00
                ShiftLeft(Local1, 0x06, Local1)
                Or(Local0, Local1, Local0)
                       Store(Local0, CRC3)        

                       FindSetRightBit(IRQ0, Local0)		//Set IRQ
                If(LGreater(Local0, 0x00)) {
                        Decrement(Local0)
                }
                Store(Local0, \_SB.PCI0.PIB.FLIR)      // Set IRQ: 6

                FindSetRightBit(DMA0, Local0)		//Set DMA
                If(LGreater(Local0, 0x00)) {
                        Decrement(Local0)
                }
                       Store(Local0, \_SB.PCI0.PIB.FLDA)      // Set DMA: channel 2

                       Store(CRC2,Local0)      // Enable FDC
                       Or(Local0,0x10,Local1)
                       Store(Local1,CRC2)

                       EXFG()                  // Exit Config Mode

               }  // end of _SRS method

}    // end of FDC0 device