pmupost.asm

惠普公司bios完整源代码大机密!

		Public	PM_Int8_Hook
PM_Int8_Hook	Proc	Near
		ret
PM_Int8_Hook	Endp

;[]===============================================================[]
;
; Cfg_Video_Mode:
;	Routine to initial video after vga initial within POST.
;
; Entry:	none
;
; Exit:		none
;
; Name	| Date		| Description
; -----------------------------------------------------------------
;[]==================================================================[]
		public	Cfg_Video_Mode
Cfg_Video_Mode	proc	near
		ret
Cfg_Video_Mode	endp


;----------------------------------------------------------------------------
;Output   :	AL = 0  DPMS not support
;		(CRT sleep disable or Controll by H/V sync & Blanking)
;		   = 1  CRT sleep use DPMS STANDBY
;		   = 2	CRT sleep use DPMS SUSPEND
;*(Default Value)  = 3	CRT sleep use DPMS OFF
;		   = 4	CRT sleep use DPMS REDUCE ON (not support in v1.0)
;----------------------------------------------------------------------------
		Public	Get_DPMS_Option
Get_DPMS_Option	proc	near

ifndef	NO_DPMS_SUPPORT
		extrn	VGA_Type_Item:near
		mov     si,offset VGA_Type_Item
		call    GetItem_Value
		cmp	al,3

		jnz	short _No_DPMS_Support
		mov     dx,12D2H                ; ST AGP vendor ID
		mov     cx,0018H                ; RIVA 128 device ID
		xor     si,si                   ; first device
		mov     ax,0b102H               ; find PCI device func. call
		int     1AH
		jnc	short Have_ST_AGP	; Found => Set No Support DPMS
		mov	al,3
		jmp	short @f		; No => Set Support DPMS
Have_ST_AGP:
_No_DPMS_Support:
		xor	al,al			; Set No Support DPMS
@@:
else	;DPMS_STANDARD
		xor	al,al
endif	;DPMS_STANDARD
		ret

Get_DPMS_Option	endp

ifndef	CRT_Control_Not_In_F000
	ifdef	CRT_Control_Not_In_APM
		include	CRT_Ctrl.inc
	endif	;CRT_Control_Not_In_APM
endif	;CRT_Control_Not_In_F000

ifdef	LCD_CRT_OPTION
;[]==================================================================[]
;
; Procedure Name: LCD_BACKLIGHT_ON
;
;	This routine is used to turn on the LCD backlight.
;
; Saves: all
; Input:
;	none
;
; Output:
;	none
;
; [Note]:
;	1. This routine is hardware dependent.
;
; Author: Daniel Huang
; Date: August, 08, 1995
;
; Name	| Date		| Description
; -----------------------------------------------------------------
; DNL	| 08/08/95	| Initial version for C&T65545
;[]==================================================================[]

		PUBLIC	LCD_BACKLIGHT_ON
LCD_BACKLIGHT_ON	PROC	NEAR

		clc
		ret
LCD_BACKLIGHT_ON	ENDP

;[]==================================================================[]
;
; Procedure Name: LCD_BACKLIGHT_OFF
;
;	This routine is used to turn off the LCD backlight.
;
; Saves: all
; Input:
;	none
;
; Output:
;	none
;
; [Note]:
;	1. This routine is hardware dependent.
;
; Author: Daniel Huang
; Date: August, 08, 1995
;
; Name	| Date		| Description
; -----------------------------------------------------------------
; DNL	| 08/08/95	| Initial version for C&T65545
;[]==================================================================[]

		PUBLIC	LCD_BACKLIGHT_OFF
LCD_BACKLIGHT_OFF	PROC	NEAR

		clc
		ret
LCD_BACKLIGHT_OFF	ENDP
endif	;LCD_CRT_OPTION

ifdef	NEW_SUPERVGA_KERNEL

		public	VGA_SIGN_ON_BEFORE
VGA_SIGN_ON_BEFORE	proc	near
		ret
VGA_SIGN_ON_BEFORE	ENDP

;;============================================================
		public	CT_MODESET_ADJUST
CT_MODESET_ADJUST	proc	near
		ret
CT_MODESET_ADJUST	ENDP
;;============================================================
		public	CT_GET_PANEL_TYPE
CT_GET_PANEL_TYPE	proc	near
		ret
CT_GET_PANEL_TYPE	ENDP

F_Video_Func	Proc	Far
	    	Call	Video_Func
	    	retf
F_Video_Func	Endp

;===============================================================
		public	CT_PWR_OFF_PANEL
CT_PWR_OFF_PANEL	proc	near
		ret
CT_PWR_OFF_PANEL	ENDP
;===============================================================
		public	CT_PWR_ON_PANEL
CT_PWR_ON_PANEL	proc	near
		ret
CT_PWR_ON_PANEL	ENDP
;===============================================================
		public	Ct_Set_TV_Mode
Ct_Set_TV_Mode	Proc	Near
		ret
Ct_Set_TV_Mode	ENDP

;===============================================================
endif	;NEW_SUPERVGA_KERNEL

;---------------------------------------------------------------------------
ifdef	Notebook_Power_Management
		Public	F_Suspend_0V
F_Suspend_0V	proc	Far
		call  Suspend_0V
		ret
F_Suspend_0V	ENDP
F_Resume_0V	Proc	Far
 		Call Resume_0V
 		ret
F_Resume_0V	Endp
endif	;Notebook_Power_Management
;R52 - starts
IFDEF		USB_SUPPORT
  ifdef	USB_STORAGE_SUPPORT
COMPILE_FOR_USBBIOS	=	4
		include	USBBIOS.ASM
  endif	;USB_STORAGE_SUPPORT
ENDIF	;USB_SUPPORT
;R52 - ends
FCODE		ENDS

;--------------------------------------------------------------
;--------------------------------------------------------------
;----- The following codes will be located at E000 ! ----------
;----- The following codes will be located at E000 ! ----------
;----- The following codes will be located at E000 ! ----------
;----- The following codes will be located at E000 ! ----------
;--------------------------------------------------------------
;--------------------------------------------------------------
EGROUP		GROUP	ECODE
ECODE		SEGMENT USE16 PARA PUBLIC 'ECODE'
		ASSUME	CS:EGROUP,DS:G_RAM,ES:EGROUP
		align	4

ifdef	S3_SUPPORT
;R71 - start
IFE	BIOS_SUPPORT_AMD_K7
ifdef	MP_Support
	       		Public	Ct_Set_APIC_Mode
Ct_Set_APIC_Mode	proc	near
										
ifdef	VT686
		mov	cx, VT686 + 077h		
		mov	bl,10h			;enable IO APIC
		f000_call 	Get_Set_Ct_OR		
endif	;VT686		
						
ifdef	VT596
		mov	cx, VT596 + 074h		
 ifdef	USE_EXTERNAL_IOAPIC					
		mov	bl, 080h    	;enable external IOAPIC	
 else;	USE_EXTERNAL_IOAPIC	 				
		mov	bl, 02h	   	;enable interal IOAPIC
 endif;	USE_EXTERNAL_IOAPIC					
		f000_call 	Get_Set_Ct_OR			;
endif	;VT596			
			
			ret		
Ct_Set_APIC_Mode	endp			
endif	;MP_Support
ENDIF	;BIOS_SUPPORT_AMD_K7
;R71 - end
;*************************************************
; Call	by ACPIONOFF
; SM RAM can access
;*************************************************
Save_VGA_State	proc	far
		pusha
		push	es
		push	ds

                mov     ax, PM_RAM_SEGMENT
                mov     ds, ax
                ASSUME  DS:PM_RAM

		call	Get_SMBASE_Seg  	;get destination address
		shr	eax, 4
		mov	es, ax  	  	;destination segment address
		mov	di, offset VGA_Data_Save

;Save AGP IO/MEM Space

		mov	cx,(AGP_SLOTID shl 8) +04h
@@:
		xor	bl,bl
		call	Get_PCI1
		stos	byte ptr es:[di]
		inc	cl
		cmp	cl,040h
		jne	short @b

;Save VGA IO/MEM Space

		xor	cx,cx
 		mov	cl,byte ptr ds:[VGA_DEV_ID]
		shl	cx,11
		add	cx,4		;from 4h save
@@:
 		mov	bl,byte ptr ds:[VGA_SLOT_ID]
		call	Get_PCI1

		stos	byte ptr es:[di]
		inc	cl
		cmp	cl,040h
		jne	short @b

		pop	ds
    		pop	es

		popa
		ret
Save_VGA_State	endp

;[]========================================================================[]
;[]========================================================================[]
		Public	Save_S3_Chipset
Save_S3_Chipset	Proc	Near

HI_CMOS		EQU	72h

		push	ds
		push	ebx

		mov	ax,seg DGROUP:Five_V_Tbl
		mov	ds,ax
		mov	si,offset DGROUP:Five_V_Tbl
		lodsb
		mov	bl,al
		mov	cx,VT694X
	@@:
		lodsb
		or	al,al
		jz	short @F

		mov	cl,al
		lodsb
		mov	bh,al
	Next_Reg:
		Call	E000_Get_PMU
		xchg	al,bl
		out	HI_CMOS,al
		NEWIODELAY
		xchg	al,bl
		out	HI_CMOS+1,al

		inc	cl
	        inc	bl
		dec	bh
		jnz	short Next_Reg
		jmp	short @b
	@@:
		pop	ebx
		pop	ds
		ret
Save_S3_Chipset	Endp
endif	;S3_Support

if	STD_Function	EQ	1

;[]========================================================================[]
;
;Procedure:	CT_0V_Shutdown
;
;Function :	Routine to put system into off state.
;
;Input	  :	None
;
;Output   :	None
;
;[]========================================================================[]
		Public	CT_0V_Shutdown
CT_0V_Shutdown	Proc	Near
		mov	ax,PM_RAM_SEGMENT
		mov	ds,ax

;R20		extrn	APM_16_PowerOff:near
;R20		F000_call	DGROUP:APM_16_PowerOff

		mov	cl, 05h			;R20
		mov	bx, 28E3h		;R20
		call	e000_Get_Set_PMIO 	;R20

		ret
CT_0V_Shutdown	Endp

;[]========================================================================[]
;
;Procedure:	CT_System_Wakeup
;
;Function :	Routine for system wake up from Zero-Volt-Suspend.
;
;Input	  :	None
;
;Output   :	None
;
;[]========================================================================[]
		Public	CT_System_Wakeup
CT_System_Wakeup	Proc	Near
		ret
CT_System_Wakeup	Endp

endif	;STD_Function				;OEM02
if	ACPI_RESUME	EQ	1		;OEM02
;[]========================================================================[]
;
; Suspend_Chipset_Table
;
;	This table describe chipset registers which save & restore during
;	Zero-Volt-Suspend & Resume.
;	It is refrenced by routine Save_Chipset & Restore_Chipset.
;
;	Formate:
;
;		DW	<Register Index start>, <Regisetr counts>
;		DW		:			:
;		DW		:			:
;		DW		:			:
;		DW	<Register Index start>, <Regisetr counts>
;		DW	FFFFh					; End of table
;
;
;[]========================================================================[]
		PUBLIC	Suspend_Chipset_Table
Suspend_Chipset_Table:
		dw	VT694X + 00h	,	100h		;0
		dw	VT694X_PP + 00h	,	100h		;1
		dw	VT586 + 00h	,	100h		;7-0
		dw	VT586_IDE + 00h	,	100h		;7-1
		dw	VT586_USB + 00h	,	0C2h		;7-2
	ifdef	VT686
	ifdef	VT586_USB_2					;R46
		dw	VT586_USB_2+ 00h,	0C2h		;7-3
	endif;	VT586_USB_2					;R46
	endif;	VT686
		dw	VT586_ACPI + 00h,	92h		;7-4
		dw	VT586_ACPI +0D0h,	10h		;7-4
	ifdef	VT686
	  ifndef Always_Disable_AC97
		dw	VT686_AC97 + 00h,	100h		;7-5
	  endif; Always_Disable_AC97
	  ifndef Always_Disable_MC97
		dw	VT686_AC97 + 100h,	100h		;7-6
	  endif; Always_Disable_MC97
	endif;	VT686
		dw	(SLOT1_ID SHL 11) + 0,	100h		;OEM08
		dw	(SLOT2_ID SHL 11) + 0,	100h		;OEM08
		dw	(SLOT3_ID SHL 11) + 0,	100h		;OEM08
		dw	0FF00h		,	50h
		dw	0FFFFh

;OEM02 endif	;STD_Function
endif	;ACPI_RESUME	EQ	1		;OEM02
;[]========================================================================[]
;Procedure:	Get_SMBASE_Seg
;
;Function :	Return SMBASE segment.
;
;Input	  :	None
;
;Output   :	EAX: should point to the SMBASE address (32bit address).
;
;[]========================================================================[]
		Public	Get_SMBASE_SEG
Get_SMBASE_SEG	Proc	Near
	ifdef	VT8371			;R50
		mov	eax, 0B0000h	;R50
	else;	VT8371			;R50
		mov	eax, 0A0000h
	endif;	VT8371			;R50
		ret
Get_SMBASE_SEG	Endp

if	STD_Function	EQ	1
;[]========================================================================[]
;Procedure:	CT_AllShadow_RW
;
;Function :	To Enable/Disable all shadow Read/Write.
;
;Input	  :	AL = 0 For all shadow readable.
;		AL = 1 For all shadow writeable.
;
;Output   :	None
;
;Preserve :
;
;Note	  :	1. Stack available.
;		2. called from Suspend_0V or Resume_0V.
;		3. If the chipset support shadow RAM both Readable & Writeable
;		   then don't care input AL, Just program chipset for shadow
;		   RAM both R/W-able.
;
;[]========================================================================[]
		Public	CT_AllShadow_RW
CT_AllShadow_RW	Proc	Near
ifdef	VT8371
		pusha
		mov	cx,VT8371 + 61h			;R04
		mov	bl,0FFh				;R04
		call	E000_GET_SET_PMU_OR		;R04
		inc	cl				;R04
		call	E000_GET_SET_PMU_OR		;R04