clkcntl.asm

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;	[]===========================================================[]
;
;	NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R)
;	        INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE
;	        DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED
;	        WRITTEN AUTHORIZATION FROM THE OWNER.
;
; 	[]===========================================================[]
;

;----------------------------------------------------------------------------
;Rev	Date	 Name	Description
;----------------------------------------------------------------------------
;R34	03/03/00 ALU    Added code that system is running formally then disable 
;			watch dog timer.
;R33	01/12/00 JSN	Fixed Ali south bridge M1535D SMBus can't work.    
;R26A	12/15/99 RCH	Fixed some platforms can not program clock generator
;			chip properly due to wrong SMBALERT_STS report.
;R32	11/16/99 VIN	Added SIS540 Block Write Support.
;R31	09/15/99 PAL	Added "Patch_RT52039D" definition to support RT52039D
;R30	08/30/99 PAL	Added SIS630 Block Write Support
;R29A	08/20/99 JMS	Fixed coding mistake for check SMBus status
;R29	06/28/99 JMS	Added AMD 756 (Viper) SMbus support.
;R28	05/19/99 AVN	Added SiS960 SM bus support.
;R27	04/21/99 PAL	Added Public Prg_ClkGen_Chip
;R26	04/07/99 TNY	Rewrite ICH SMBus block write(add time-out service).
;R25	03/05/99 TNY	Add ICH SMBus block mode programming.
;R24	02/05/99 RIC	Fix that some mainboard will hang when BIOS control 
;			clock generator signal from Disabled to Enabled.
;			So we must to do second RESET.
;			Definition: Reset_After_Early_Prg_ClkGen EQU	1
;				    RESET_CLK_CMOS	EQU	CMOS_Loc
;R23	02/04/99 PAL	Fix PCI_Clk_Val location error
;R22	01/30/99 PAL	Move "Check_ClkGen_Byte_RW" to all clock.gen file and
;			added extrn definition
;R21	01/29/99 PAL	Move "SndChip_Cntl_USE_ClkGen" from CHIPPOST.ASM
;R20	01/27/99 PAL	Added "Set_Default_Value" option to reduce code
;R19	01/26/99 LAW	added Check_insert_Key_Press hook for bypass Clock GEN
;			Setting
;R18	01/21/99 AVN	Added SiS5595 B version hardware SMBus support.
;R17	01/14/99 PAL	Added RTM_Turbo_Freq hook for e0post.asm in order to 
;			avoid show freq. error in POST
;R16	01/08/99 PAL	Added RTM_CLOCKGEN definition for Real Tek clockgen
;R15	12/19/98 RCH	The bit 6 (InUse status) of SMBus host status register
;			is always "high" in Intel/ICH A0 revision. Don't check
;			this bit while programming I2C devices.
;R14	12/18/98 RCH	Fixed compilation error if "SMBus_Port_HiByte" is
;			not defined in BIOS.CFG for PIIX platform
;R13	09/03/98 LAW	Fixed ALi M1543/M1543C with Ali M1621 cann't Work
;R12	07/07/98 PAL	Fix Disable_ClkGen_For_VT586B error for Winbond 
;R11	07/06/98 PAL	Fix Disable_ClkGen_For_SISSMBus error for Winbond 
;R10	06/19/98 RIC	Add VIA SMBus Support.
;R09	06/02/98 LAW	when using CLOCK GEN with GL518 work not fine on M1543

ifdef	MASM611
.MODEL  SMALL,BASIC
OPTION	PROC: PRIVATE
endif	;MASM611

.386p
		PAGE	56,132
		TITLE	CLKCNTL.ASM
.XLIST
		INCLUDE	BIOS.CFG
		INCLUDE	COMMON.MAC
		INCLUDE POST.EQU

		extrn	F000_call_proc:near
		extrn	F000_GetItem_Value:near
		extrn	GetItem_Value:near

		extrn	E000_64K_shadow_RW:near		
		extrn	E000_64K_shadow_R:near		
ifdef	Reset_After_Early_Prg_ClkGen			;R24
		extrn	Issue_System_Reset:Near		;R24
endif;	Reset_After_Early_Prg_ClkGen			;R24
;R19 - start
ifdef	Jumpless_Support
ifdef	POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT
		extrn	Check_insert_Key_Press:near
		extrn	Make_Into_Setup_Flag:near
endif;	POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT
endif;	Jumpless_Support
;R19 - end

G_RAM		SEGMENT	USE16 AT 0

		ORG	04H*4
		INCLUDE	SEG_0.INC

		ORG	400H
		INCLUDE	G_RAM.INC

G_RAM		ENDS

.LIST

DGROUP		GROUP	FCODE
FCODE           SEGMENT PARA PUBLIC 'CODE'
                ASSUME  CS:DGROUP
FCODE           ENDS

EGROUP		GROUP	ECODE
ECODE		SEGMENT	USE16 PARA PUBLIC 'ECODE'
		ASSUME	CS:EGROUP,DS:G_RAM,ES:EGROUP

;[]======================================================================[]
;[]======================================================================[]
		Public	Init_Onboard_Generator
Init_Onboard_Generator	Proc	Near

IF	CLKCNTL_KERNEL

		pushad
		push	ds
		push	es
		pushf

		push	cs					
		pop	ds
		f000_call	E000_64K_shadow_RW		
;R21 - start
		call	Check_Device_Item
;R21 - end
		call	Prepare_ClkGen_Val
		f000_call	E000_64K_shadow_R		

		call	Prg_ClkGen_Chip

;R34_START
ifdef	ICS94201_Watchdog 			 ;R34
		mov     si,offset EGROUP:Watchdog_Timer
		and     byte ptr cs:[si],01000000b
		call	Prg_ClkGen_Chip
endif;ICS94201_Watchdog				 ;R34	
;R34_END


;R16 - start
ifdef	RTM_CLOCKGEN
		call	Check_ClkGen_Byte_RW
		jne	short	Block_Access
		call	Set_Default_Value	;R20
;R20;R17 - start
;R20		mov	ah, 078h
;R20		mov	cx,0d211h		;Index 11h
;R20		call	Ct_I2CWriteWord
;R20		Newiodelay
;R20		Newiodelay   
;R20		mov	cx,0d212h		;Index 12h
;R20		mov	ah,0ch			;set N data 15 
;R20		call	Ct_I2CWriteWord
;R20		Newiodelay
;R20		Newiodelay
;R20
;R20		mov	cx,0d21fh		;Index 1fh
;R20		xor	ax, ax			;set command 
;R20		call	Ct_I2CWriteWord
;R20		Newiodelay
;R20		Newiodelay
;R17 - end
;R17		call	Set_Turbo_Freq
;R17		jmp	short Byte_Access
	Block_Access:
;R17		push	ds
;R17		mov	ax,0f000h
;R17		mov	ds,ax
;R17		assume	ds:DGROUP
;R17		f000_call	DGROUP:F000_Shadow_W
;R17		or	word ptr ds:[Turbo_Freq_Item ].ITEMSTAT,ITEMDISABLE
;R17		f000_call	DGROUP:F000_Shadow_R
;R17		pop	ds
;R17	Byte_Access:
endif;	RTM_CLOCKGEN
;R16 - end

		popf
		pop	es
		pop	ds
		popad

ENDIF	;CLKCNTL_KERNEL
		ret
Init_Onboard_Generator	Endp
;R21 - start
IF	CLKCNTL_KERNEL
Check_Device_Item	Proc	near
;R23		mov	di, offset PCI_Clk_Val
ifdef	SndChip_Cntl_USE_ClkGen
		mov	di, offset PCI_Clk_Val		;R23
                extrn   SndChip_Item:near
                mov     si,offset DGROUP:SndChip_Item
		call	F000_GetItem_Value
		or	al,al
		jz	short @F
		and	byte ptr cs:[di], not SndChip_Cntl_USE_ClkGen
	@@:
endif;	SndChip_Cntl_USE_ClkGen
ifdef	LanChip_Cntl_USE_ClkGen
		mov	di, offset PCI_Clk_Val		;R23
		extrn	LanChip_Item:near
		mov	si,offset DGROUP:LanChip_Item
		call	F000_GetItem_Value
		or	al,al
		jz	short @F
		and	byte ptr cs:[di], not LanChip_Cntl_USE_ClkGen
	@@:
endif;	LanChip_Cntl_USE_ClkGen
		ret
Check_Device_Item	ENDP
ENDIF;	CLKCNTL_KERNEL
;R21 - end

;R17 - start
ifdef	RTM_CLOCKGEN
	Public	RTM_Turbo_Freq
RTM_Turbo_Freq	proc	near
		call	Check_ClkGen_Byte_RW
		jne	short	Block_Access
		call	Set_Turbo_Freq
		jmp	short Byte_Access
	Block_Access:
ifndef	Patch_RT52039D	 			;R31
		push	ds
		mov	ax,0f000h
		mov	ds,ax
		assume	ds:DGROUP
		extrn	F000_Shadow_W:near		;R22
		extrn	F000_Shadow_R:near		;R22
		f000_call	DGROUP:F000_Shadow_W
		or	word ptr ds:[Turbo_Freq_Item ].ITEMSTAT,ITEMDISABLE
		f000_call	DGROUP:F000_Shadow_R
		pop	ds
endif;	Patch_RT52039D	 			;R31
	Byte_Access:
		ret
RTM_Turbo_Freq	ENDP
endif;	RTM_CLOCKGEN
;R17 - end

ifdef	Early_Init_ClkGen
		Public	Early_Init_Onboard_Generator
Early_Init_Onboard_Generator	Proc	Near

IF	CLKCNTL_KERNEL

		pushad
		push	ds
		push	es
		pushf

		call	Prg_ClkGen_Chip

ifdef	Reset_After_Early_Prg_ClkGen				;R24
		call	Do_Reset_After_Early_Prg_ClkGen		;R24
endif;	Reset_After_Early_Prg_ClkGen				;R24
		popf
		pop	es
		pop	ds
		popad

ENDIF	;CLKCNTL_KERNEL
		ret
Early_Init_Onboard_Generator	Endp

;R24 - satrts
ifdef	Reset_After_Early_Prg_ClkGen
Do_Reset_After_Early_Prg_ClkGen	Proc	Near
		mov	al,RESET_CLK_CMOS
		extrn	F000_Get_Cmos:Near
		extrn	F000_Set_Cmos:Near
		call	F000_Get_Cmos
		cmp	al,55h
		jz	_Not_Reset

		mov	al,RESET_CLK_CMOS
		mov	ah,55h
		call	F000_Set_Cmos
		F000_call	Issue_System_Reset
		jmp	short $
_Not_Reset:
		mov	al,RESET_CLK_CMOS
		mov	ah,00h
		call	F000_Set_Cmos
		ret
Do_Reset_After_Early_Prg_ClkGen	Endp
endif;	Reset_After_Early_Prg_ClkGen
;R24 - ends
endif;	Early_Init_ClkGen					

IF	CLKCNTL_KERNEL				
		Public	Prepare_ClkGen_Val	
		include	CLOCK.GEN
endif;	CLKCNTL_KERNEL				

IF	CLKCNTL_KERNEL
SIS_SMBus	=	0
ifdef	SIS_5598_PCI_RESET				
SIS_SMBus	=	1
endif;	SIS_5598_PCI_RESET				
ifdef	SIS5595_ID
SIS_SMBus	=	1
endif;	SIS5595_ID
ifdef	SIS960_ID					;R28
SIS_SMBus	=	1				;R28
endif;	SIS960_ID					;R28
;R30 - start
ifdef	SIS630_ID
SIS_SMBus	=	1
endif;	SIS630_ID
;R30 - end
;R32
ifdef	SIS540_ID
SIS_SMBus	=	1
endif;	SIS540_ID
;R32

VIA_SMBus	=	0				;R10
ifdef	VT596						;R10
  IFDEF	SMBus_Port					;R10
VIA_SMBus	=	1				;R10
  ENDIF;SMBus_Port					;R10
endif;	VT596						;R10

;R29 -starts
COBRA_SMBus	=	0    
ifdef	COBRA
  IFDEF	SMBus_Port	     
COBRA_SMBus	=	1    
  ENDIF;SMBus_Port	     
endif;	COBRA		     
;R29 -ends

;R22;R16 - start
;R22ifdef	RTM_CLOCKGEN
;R22Check_ClkGen_Byte_RW	Proc	near
;R22		extrn	Ct_I2CReadWord:near
;R22		mov	ch, 0D2h		;Device ID
;R22		mov	cl, 10h			;Index
;R22		call	Ct_I2CReadWord
;R22		cmp	ah, 3			;3 byte read write
;R22		ret
;R22Check_ClkGen_Byte_RW	Endp
;R22endif;	RTM_CLOCKGEN
;R22;R16 - end
		Public	Prg_ClkGen_Chip			;R27
Prg_ClkGen_Chip	Proc	Near

ifdef	PIIX_ID
		call	Disable_ClkGen_For_PIIX4
endif;	PIIX_ID

ifdef	M1543
;R19 - start
ifdef	Jumpless_Support
ifdef	POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT
		call	Check_insert_Key_Press
		jnc	short do_into_setup
endif;	POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT
endif;	Jumpless_Support
;R19 - end
		call	Disable_ClkGen_For_M1543
	do_into_setup:					;R19
endif;	M1543

ifdef	VT586_ACPI					
  IF		VIA_SMBus	EQ	0		;R10
		call	Disable_ClkGen_For_VT586B	; VIA Chipset
  ENDIF;	VIA_SMBus	EQ	0		;R10
endif;	VT586_ACPI					

if	VIA_SMBus					;R10
		call	Disable_ClkGen_For_VT596	;R10 VIA 596 SouthBridge
endif;	VIA_SMBus					;R10

if	SIS_SMBus
		call	Disable_ClkGen_For_SISSMBus
endif;	SIS_SMBus

;R29 -starts				
if	COBRA_SMBus
		call	Disable_ClkGen_For_COBRASMBus
endif;	COBRA_SMBus
;R29 -ends

		ret
Prg_ClkGen_Chip	Endp

ifdef	PIIX_ID
Disable_ClkGen_For_PIIX4	Proc	near
;R25 - start
ifdef	ICH
	;Send SMbus block write for ICH platforms (i820,i810/815,i840)
;R26		mov	dx,SMBus_Port + 00h
;R26Chk_Status0:
;R26		in	al,dx		;get status
;R26		out	dx,al
;R26		and	al,NOT 40H	;don't check INUSE bit		
;R26		or	al,al
;R26		jnz	short Chk_Status0

;R26 - start
		mov	cx,800h
		mov	dx,SMBus_Port + 00h
Chk_Status0:
		in	al,dx		;get status
		newiodelay
		newiodelay
		out	dx,al
;R26A		and	al,NOT 40H	;don't check INUSE bit		
		and	al,NOT 60H	;don't check INUSE & SMBALER_STS bit;R26A
		or	al,al
		jz	short @F
		loop	short Chk_Status0
	@@:
;R26 - end

		mov	dx,SMBus_Port + 04h
		mov	al,0d2h		;ID (write)
		out	dx,al

;Program first data.
		mov	si,offset Prg_ClkGen_Num
		mov	dx,SMBus_Port + 05H
		mov	al,cs:[si]
		out	dx,al

		mov	dx,SMBus_Port + 07H
;Program block num.
		mov	si,offset Prg_ClkGen_Tbl	
		mov	al,cs:[si]
		out	dx,al

		mov	dx,SMBus_Port + 03H
		mov	al,0
		out	dx,al

;Start send.
		mov	dx,SMBus_Port + 02H
		mov	al,54h
		out	dx,al

;R26;;Program block data
;R26	PrgBlock:
;R26		mov	cx, 0fffh		;wait for for SMbus ready
;R26	ck:					;to patch ICH bug.
;R26		newiodelay
;R26		loop	ck
;R26
;R26		mov	dx,SMBus_Port + 00H
;R26		in	al,dx
;R26		NEWIODELAY
;R26
;R26;		out	80h, al
;R26
;R26		mov	dx,SMBus_Port + 00H
;R26		in	al,dx
;R26		test	al,80h			;ready for next byte ?
;R26		jz	short PrgBlock
;R26		inc	si
;R26		cmp	si,offset Prg_ClkGen_Tbl_End		
;R26		je	short PrgBlockEnd
;R26
;R26		mov	dx,SMBus_Port + 00H
;R26		mov	al, 80H
;R26		out	dx,al
;R26
;R26		mov	dx,SMBus_Port + 07H
;R26		mov	al,cs:[si]
;R26		out	dx,al
;R26
;R26		jmp	PrgBlock

;R26 - start
;;Program block data
PrgBlkStart:
		mov	cx,40h
	PrgBlock:
		push	cx
		mov	cx, 400h		;wait for for SMbus ready
	ck:					;to patch ICH bug.
		newiodelay
		loop	short ck
		pop	cx

		mov	dx,SMBus_Port + 00H
		in	al,dx
		NEWIODELAY
		out	dx,al
		NEWIODELAY
		test	al,80h			;ready for next byte ?
		jnz	short @F
		loop	short PrgBlock
	@@:

		inc	si
		cmp	si,offset Prg_ClkGen_Tbl_End		
		je	short PrgBlockEnd

		mov	dx,SMBus_Port + 07H
		mov	al,cs:[si]
		out	dx,al
		NEWIODELAY

		jmp	PrgBlkStart
;R26 - end

PrgBlockEnd:
else;	ICH
;R25 - end
	;Send SMbus block write for PIIX4 platforms (430TX, 440LX/BX/GX)

		mov	dx,SMBus_Port + 04h
		mov	al,0d2h		;ID (write)
		out	dx,al
		NEWIODELAY
		NEWIODELAY

		mov	dx,SMBus_Port + 00h
Chk_Status0:
		in	al,dx		;get status
		NEWIODELAY
		out	dx,al
		NEWIODELAY
		and	al,NOT 40H	;don't check INUSE bit		;R15
		or	al,al
		jnz	short Chk_Status0

		mov	dx,SMBus_Port + 02h
		in	al,dx		;reset pointer
		NEWIODELAY
		NEWIODELAY

;Programe block num.
		mov	si,offset Prg_ClkGen_Num	
;R14		mov	dh,SMBus_Port_HiByte
;R14		mov	dl,05h
		mov	dx,SMBus_Port + 05H		;R14
		mov	al,cs:[si]
		out	dx,al
		newiodelay
		newiodelay

;Programe block data
		mov	si,offset Prg_ClkGen_Tbl		
		mov	dx,SMBus_Port + 07H		;R14
;R14		mov	dh,SMBus_Port_HiByte	
	@@:
;R14		mov	dl,07h
		mov	al,cs:[si]
		out	dx,al
		NEWIODELAY
		NEWIODELAY
		add	si,1
		cmp	si,offset Prg_ClkGen_Tbl_End		
		jne	short @B

;Start send.
;R14		mov	dh,SMBus_Port_HiByte
;R14		mov	dl,02h
		mov	dx,SMBus_Port + 02H		;R14
		mov	al,54h
		out	dx,al
		newiodelay
		newiodelay


		xor	cx,cx		;loop count
		mov	dx,SMBus_Port + 00h
Chk_Status_Final0:
		in	al,dx		;get status
		NEWIODELAY
		test	al,02h		;Send Ok ?
		jnz	short SendSmbusOk0
	;check other status 
		loop	short Chk_Status_Final0
SendSmbusOk0:
endif;	ICH					;R25
		ret
Disable_ClkGen_For_PIIX4	Endp
endif;	PIIX_ID

ifdef	M1543
Disable_ClkGen_For_M1543	Proc	near

 ;(3-b.) write '1' clear to let read index 00h to be "04h" ( Idle ).
		mov	dx,SMBUS_PORT + 00h
 Chk_Status:
		mov	al,0ffh
		out	dx,al
    		NEWIODELAY
		NEWIODELAY
		in	al,dx		;get status
		NEWIODELAY
		NEWIODELAY
;R13		cmp	al,04h
;R13		jne	short Chk_Status
		test	al,04h			;R13
		jz	short Chk_Status	;R13


		mov	dx,SMBUS_PORT + 03h
		mov	al,0d2h		;ID (write)
		out	dx,al
		NEWIODELAY
		NEWIODELAY

		mov	dx,SMBUS_PORT + 01h
ifndef	M1535				;R33
		mov	al,0c0h		;reset pointer & set R/W block mode
else	;M1535				;R33
		mov	al,040h		;R33
endif	;M1535				;R33
		out	dx,al
		NEWIODELAY
		NEWIODELAY
;R13 - start
		mov	dx, SMBUS_PORT + 07h
		mov	al, 000h		;set command
		out	dx, al
		NEWIODELAY
		NEWIODELAY
;R13 - end

;Programe block num.