f206.h

TI TMS320F206

/*===========================================================*/
/*=       F206 存储器和I/O内部映射寄存器以及用户寄存器定义       =*/
/*===========================================================*/
/*typedef unsigned int	Boolean; */
/*#define False		0x0000*/

/*==============F206 I/O内部映射寄存器===============*/
ioport	unsigned int	portffe4;   /*PMST*/	
ioport	unsigned int	portffe8;   /*CLK--clkout*/
ioport	unsigned int	portffec;   /*IC--interrupt control register*/
ioport	unsigned int	portfff0;   /*SYNC PORT*/
ioport	unsigned int	portfff1;   /*SYNC PORT CONTROL REGISTER*/
ioport	unsigned int	portfff4;   /*ADTR--asynchronism port send/receiver register*/
ioport	unsigned int	portfff5;   /*ASPCR--asynchronism port control register*/
ioport	unsigned int	portfff6;   /*IOSR--i/o state register(IO0~3,UART STATE)*/
ioport	unsigned int	portfff7;   /*BRD--baud reat frequency divider(波特率分频器)*/
ioport	unsigned int	portfff8;   /*TCR--timer control register*/
ioport	unsigned int	portfff9;   /*PRD--timer period register*/
ioport	unsigned int	portfffa;   /*TIM--timer/count register*/
ioport	unsigned int	portfffc;   /*WSGR--wait states register*/

/*--------------F206 存储器映射寄存器----------------*/
/*C2xx Core Registers*/
#define     reg_ifr	    0x0006	    /*IFR--interrupt flag register*/
#define     reg_greg	0x0005	    /*GREG--global memory assign register*/
#define	    reg_imr	    0x0004	    /*IMR--interrupt mask register*/ 

/*On-chip Register*/   
#define     reg_pmst	portffe4    /*PMST*/    
#define     reg_clk1	portffe8    /*CLK--clkout*/                           
#define	    reg_icr	    portffec    /*ICR--interrupt control register*/                                    
#define	    reg_sdtr	portfff0    /*SYNC PORT*/
#define	    reg_sspcr	portfff1    /*SYNC PORT CONTROL REGISTER*/                    
#define	    reg_adtr	portfff4    /*ADTR--asynchronism port send/receiver register*/
#define     reg_aspcr	portfff5    /*ASPCR--asynchronism port control register*/
#define	    reg_iosr	portfff6    /*IOSR--i/o state register(IO0~3,UART STATE)*/
#define	    reg_brd	    portfff7    /*BRD--baud-reat frequency divider(波特率分频器)*/                  
#define     reg_tcr	    portfff8    /*TCR--timer control register*/
#define	    reg_prd	    portfff9    /*PRD--timer period register*/
#define	    reg_tim	    portfffa    /*TIM--timer/count register*/  		
#define	    reg_wsgr	portfffc    /*WSGR--wait states register*/  

/*=================USER DEFINE==================*/
ioport  unsigned int 	port2000;


#define max125	port2000  
                            
                            
ioport	unsigned int	port4000;   /*SA4828--adress*/
ioport	unsigned int	port4001;   /*SA4828--data  */

#define  sa_addr	port4000  
#define  sa_data	port4001