pcmcia_core.4

pcmcia source code

.\" Copyright (C) 1998 David A. Hinds -- [e-mail]
.\" pcmcia_core.4 1.26 2002/07/10 05:08:16
.\"
.TH PCMCIA_CORE 4 "2002/07/10 05:08:16" "pcmcia-cs"
.SH NAME
pcmcia_core \- PCMCIA Card Services core module

.SH SYNOPSIS
.B insmod pcmcia_core.o
[\fBpc_debug=\fIn\fR]
[\fBsetup_delay=\fIn\fR]
[\fBresume_delay=\fIn\fR]
[\fBshutdown_delay=\fIn\fR]
[\fBvcc_settle=\fIn\fR]
[\fBreset_time=\fIn\fR]
[\fBunreset_delay=\fIn\fR]
[\fBunreset_check=\fIn\fR]
[\fBunreset_limit=\fIn\fR]
[\fBcis_speed=\fIn\fR]
[\fBio_speed=\fIn\fR]
[\fBcis_width=\fIn\fR]
[\fBprobe_io=\fIn\fR]
[\fBprobe_mem=\fIn\fR]
[\fBcb_mem_base=\fIn\fR]
[\fBcb_bus_base=\fIn\fR]
[\fBcb_bus_step=\fIn\fR]
[\fBcb_pci_irq=\fIn\fR]

.SH DESCRIPTION
.B Pcmcia_core
is the core Card Services module, required for all drivers for
specific PCMCIA cards.  It is loaded prior to loading any socket
device drivers.
.PP
In the event that kernel version mismatches prevent this module from
being loaded, version information can be extracted from the module
itself by doing:
.sp
.RS
.nf
strings -n 10 pcmcia_core.o | head -3
.RE
.fi
.sp

.SH PARAMETERS
.TP
.BI pc_debug= n
Selects the PCMCIA debugging level.  This parameter is only available
if the module is compiled with debugging enabled.  A non-zero value
enables debugging.
.TP
.BI setup_delay= n
Sets the delay between when a card is first detected, and when it will
be powered up.  In 1/100 second increments, the default is 5.
.TP
.BI resume_delay= n
Sets the delay between when a resume event is processed, and when a
suspended card will be powered up.  In 1/100 second increments, the
default is 20.
.TP
.BI shutdown_delay= n
Sets the delay between when when a card removal event is detected, and
when the socket will be disabled.  In 1/100 second increments, the
default is 5.
.TP
.BI vcc_settle= n
Sets the time to wait after first applying power to a socket before
accessing a card.  In 1/100 second increments, the default is 40.
.TP
.BI reset_time= n
Sets how long the software reset signal will be asserted, in
microseconds.  The default is 10.
.TP
.BI unreset_delay= n
Sets the delay between when a card is reset, and when the card will
first be checked to see if it is ready.  In 1/100 second increments,
the default is 10.  This delay should be increased for cards that
raise the ready signal prematurely.
.TP
.BI unreset_check= n
Sets how often to check to see if a card is ready after it is sent a
software reset.  In 1/100 second increments, the default is 10.
.TP
.BI unreset_limit= n
Sets the maximum number of checks to make before pronouncing a card to
be dead.  The default is 50 (i.e., 5 seconds).
.TP
.BI cis_speed= n
Sets the access delay in nanoseconds for CIS memory windows.  This
parameter only affects card identification.  The default is 300 ns.
.TP
.BI cis_width= n
If this flag is set, then CIS windows are configured for 16-bit
transfers.  The default is 0 (i.e., use 8-bit transfers).
.TP
.BI io_speed= n
Sets the access delay in nanoseconds for IO port windows.  The default
is 0.
.TP
.BI probe_io= n
A flag indicating if Card Services should probe IO port regions for
conflicts with other devices unknown to Linux.  The default is 1
(true).
.TP
.BI probe_mem= n
A flag indicating if Card Services should probe memory windows for
conflicts with ROM extensions or memory-mapped devices.  The default
is 1 (true).

.SH CardBus bridge configuration settings
The following module parameters are only available under pre-2.4.*
kernels.  Under 2.4.* kernels, we rely on the kernel's PCI subsystem
to set up the bridge correctly.
.TP
.BI cb_mem_base= n
Sets the base address to use for memory mapping CardBus bridge
registers.  By default, bridges that are not already initialized by
the PCI BIOS will be mapped at 0x68000000.  If this parameter is set,
then this value will override any existing mappings.
.TP
.BI cb_bus_base= n
Specifies that PCI bus numbers for CardBus busses should be renumbered
starting with this value.  By default, bus values that are
uninitialized at boot time will be numbered starting with bus 0x20.
.TP
.BI cb_bus_step= n
Specifies the number of bus slots to reserve for secondary PCI
busses, for each CardBus socket, when busses are renumbered.  The
default is 2.
.TP
.BI cb_pci_irq= n
Specifies an interrupt number 1..15 to be assigned to any CardBus
bridge whose PCI interrupt was not set by the BIOS.  The default is to
pick an interrupt based on the BIOS PCI Interrupt Routing table only
when the table is unambiguous.

.SH AUTHOR
David Hinds \- [e-mail]

.SH "SEE ALSO"
cardmgr(8), pcmcia(5).