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📄 iflash2+_mtd.4

📁 pcmcia source code
💻 4
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.\" Copyright (C) 1998 David A. Hinds -- dahinds@users.sourceforge.net.\" iflash2_mtd.4 1.8 2000/06/12 21:24:47.\".TH IFLASH2_MTD 4 "2000/06/12 21:24:47" "pcmcia-cs".SH NAMEiflash2+_mtd \- memory technology driver for Intel Series 2+ flash.SH SYNOPSIS.B insmod iflash2+_mtd.o.RB [ pc_debug=\c.IR n ].RB [ mem_speed=\c.IR n ].RB [ word_width=\c.IR n ].RB [ vpp_timeout_period=\c.IR n ].RB [ vpp_settle=\c.IR n ].RB [ erase_timeout=\c.IR n ].RB [ erase_limit=\c.IR n ].RB [ retry_limit=\c.IR n ].RB [ max_tries=\c.IR n ].RB [ mem_speed=\c.IR n ].RB [ word_width=\c.IR n ].RB [ do_sleep=\c.IR n ].SH DESCRIPTION.B Iflash2+_mtdis a memory technology driver for Intel Series 2+ flash devices.Memory technology drivers are used by Card Services to providedevice-independent access for memory cards through bulk memoryservices..PPIn addition to backwards compatibility with Series 2 flash devices,Series 2+ devices provide fast page-mode transfers, which allowsequential flash writes to proceed in the background without activemonitoring.  While faster than Series 2 cards in actual write speeds,this means that Series 2+ cards also do not tie up the host processorwhile writes are in progress.  By default, the driver sleeps whilewaiting for writes to complete.  For even faster write throughput, atthe expense of higher CPU utilization, the driver can optionally pollfor write completion.  The \fBdo_sleep\fR parameter determines whichmode is used..SH PARAMETERS.TP.BI pc_debug= nSelects the PCMCIA debugging level.  This parameter is only availableif the module is compiled with debugging enabled.  A non-zero valueenables debugging..TP.BI mem_speed= nSets the access speed of shared memory windows, in nanoseconds.  Thedefault is 0 (i.e., no extra wait states).  Values of up to 1000 arelegal..TP.BI word_width= nA flag indicating if memory windows should be configured for8-bit (if 0) or 16-bit (if 1) transfers.  The default is 1 (16-bit)..TP.BI vpp_timeout_period= nIn milliseconds, this specifies the maximum idle period after a writeoperation before programming power will be switched off.  The defaultis 1000 ms..TP.BI vpp_settle= nIn milliseconds, this gives a delay between when programming power isswitched on, and when the device is assumed to be powered up and readyto receive erase or write commands.  The default is 100 ms..TP.BI write_timeout= nIn milliseconds, specifies the maximum elapsed time for a page write(256 words) before it times out.  The default is 100 ms..TP.BI erase_timeout= nIn milliseconds, specifies the poll interval for monitoring the statusof a bulk erase operation.  The default is 100 ms..TP.BI erase_limit= nIn milliseconds, specifies the maximum elapsed time before an eraseoperation is assumed to have failed.  The default is 10000 ms..TP.BI retry_limit= nThe maximum number of retries for a write operation.  The default is8..TP.BI max_tries= nThe maximum number of status register polls before various commandsare assumed to have timed out.  The default is 4096..TP.BI do_sleep= nA flag indicating if the driver should sleep or busy loop whilewaiting for write completion.  The default is 1 (true)..SH AUTHORDavid Hinds \- dahinds@users.sourceforge.net.SH "SEE ALSO"iflash2+_mtd(4), memory_cs(4).

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