i82365.c

pcmcia source code

	flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass);
	if (p->misc2 & PD67_MC2_FREQ_BYPASS)
	    strcat(buf, " [freq bypass]");
	}
#ifdef CONFIG_PCI
    } else {
	p->misc1 &= ~PD67_MC1_MEDIA_ENA;
	p->misc1 &= ~(PD67_MC1_PULSE_MGMT | PD67_MC1_PULSE_IRQ);
	p->ectl1 &= ~(PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ);
	flip(p->misc2, PD67_MC2_FAST_PCI, fast_pci);
	if (p->misc2 & PD67_MC2_IRQ15_RI)
	    mask &= (s->type == IS_PD6730) ? ~0x0400 : ~0x8000;
	if ((s->flags & IS_PCI) && (irq_mode == 1) && get_pci_irq(s)) {
	    /* Configure PD6729 bridge for PCI interrupts */
	    p->ectl1 |= PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ;
	    s->pci_irq_code = 3; /* PCI INTA = "irq 3" */
	    buf += strlen(buf);
	    sprintf(buf, " [pci irq %d]", s->cap.pci_irq);
	    mask = 0;
	}
#endif
    }
#ifdef CONFIG_ISA
    if (s->type != IS_VT83C469)
#endif
    {
	if (setup_time >= 0)
	    p->timer[0] = p->timer[3] = setup_time;
	if (cmd_time > 0) {
	    p->timer[1] = cmd_time;
	    p->timer[4] = cmd_time*2+4;
	}
	if (p->timer[1] == 0) {
	    p->timer[1] = 6; p->timer[4] = 16;
	    if (p->timer[0] == 0)
		p->timer[0] = p->timer[3] = 1;
	}
	if (recov_time >= 0)
	    p->timer[2] = p->timer[5] = recov_time;
	buf += strlen(buf);
	sprintf(buf, " [%d/%d/%d] [%d/%d/%d]", p->timer[0], p->timer[1],
		p->timer[2], p->timer[3], p->timer[4], p->timer[5]);
    }
    return mask;
}

/*======================================================================

    Code to save and restore global state information for Vadem VG468
    and VG469 controllers, and to set and report global configuration
    options.
    
======================================================================*/

#ifdef CONFIG_ISA

static void __init vg46x_get_state(socket_info_t *s)
{
    vg46x_state_t *p = &s->state.vg46x;
    p->ctl = i365_get(s, VG468_CTL);
    if (s->type == IS_VG469)
	p->ema = i365_get(s, VG469_EXT_MODE);
}

static void vg46x_set_state(socket_info_t *s)
{
    vg46x_state_t *p = &s->state.vg46x;
    i365_set(s, VG468_CTL, p->ctl);
    if (s->type == IS_VG469)
	i365_set(s, VG469_EXT_MODE, p->ema);
}

static u_int __init vg46x_set_opts(socket_info_t *s, char *buf)
{
    vg46x_state_t *p = &s->state.vg46x;
    
    flip(p->ctl, VG468_CTL_ASYNC, async_clock);
    flip(p->ema, VG469_MODE_CABLE, cable_mode);
    if (p->ctl & VG468_CTL_ASYNC)
	strcat(buf, " [async]");
    if (p->ctl & VG468_CTL_INPACK)
	strcat(buf, " [inpack]");
    if (s->type == IS_VG469) {
	u_char vsel = i365_get(s, VG469_VSELECT);
	if (vsel & VG469_VSEL_EXT_STAT) {
	    strcat(buf, " [ext mode]");
	    if (vsel & VG469_VSEL_EXT_BUS)
		strcat(buf, " [isa buf]");
	}
	if (p->ema & VG469_MODE_CABLE)
	    strcat(buf, " [cable]");
	if (p->ema & VG469_MODE_COMPAT)
	    strcat(buf, " [c step]");
    }
    return 0xffff;
}

#endif

/*======================================================================

    Code to save and restore global state information for TI 1130 and
    TI 1131 controllers, and to set and report global configuration
    options.
    
======================================================================*/

#ifdef CONFIG_PCI

static void __init ti113x_get_state(socket_info_t *s)
{
    ti113x_state_t *p = &s->state.ti113x;
    pci_readl(s, TI113X_SYSTEM_CONTROL, &p->sysctl);
    pci_readb(s, TI113X_CARD_CONTROL, &p->cardctl);
    pci_readb(s, TI113X_DEVICE_CONTROL, &p->devctl);
    pci_readb(s, TI1250_DIAGNOSTIC, &p->diag);
    pci_readl(s, TI12XX_IRQMUX, &p->irqmux);
}

static void ti113x_set_state(socket_info_t *s)
{
    ti113x_state_t *p = &s->state.ti113x;
    pci_writel(s, TI113X_SYSTEM_CONTROL, p->sysctl);
    pci_writeb(s, TI113X_CARD_CONTROL, p->cardctl);
    pci_writeb(s, TI113X_DEVICE_CONTROL, p->devctl);
    pci_writeb(s, TI1250_MULTIMEDIA_CTL, 0);
    pci_writeb(s, TI1250_DIAGNOSTIC, p->diag);
    pci_writel(s, TI12XX_IRQMUX, p->irqmux);
    i365_set_pair(s, TI113X_IO_OFFSET(0), 0);
    i365_set_pair(s, TI113X_IO_OFFSET(1), 0);
}

static int ti113x_set_irq_mode(socket_info_t *s, int pcsc, int pint)
{
    ti113x_state_t *p = &s->state.ti113x;
    s->intr = (pcsc) ? I365_INTR_ENA : 0;
    if (s->type <= IS_TI1131) {
	p->cardctl &= ~(TI113X_CCR_PCI_IRQ_ENA |
			TI113X_CCR_PCI_IREQ | TI113X_CCR_PCI_CSC);
	if (pcsc)
	    p->cardctl |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_CSC;
	if (pint)
	    p->cardctl |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_IREQ;
    } else if (s->type == IS_TI1250A) {
	p->diag &= TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ;
	if (pcsc)
	    p->diag |= TI1250_DIAG_PCI_CSC;
	if (pint)
	    p->diag |= TI1250_DIAG_PCI_IREQ;
    }
    return 0;
}

static u_int __init ti113x_set_opts(socket_info_t *s, char *buf)
{
    ti113x_state_t *p = &s->state.ti113x;
    u_int mask = 0xffff;
    int old = (s->type <= IS_TI1131);
    
    flip(p->cardctl, TI113X_CCR_RIENB, has_ring);
    p->cardctl &= ~TI113X_CCR_ZVENABLE;
    p->cardctl |= TI113X_CCR_SPKROUTEN;
    if (!old) flip(p->sysctl, TI122X_SCR_P2CCLK, p2cclk);
    switch (irq_mode) {
    case 0:
	p->devctl &= ~TI113X_DCR_IMODE_MASK;
	p->irqmux = (p->irqmux & ~0x0f) | 0x02; /* route INTA */
	if (!(p->sysctl & TI122X_SCR_INTRTIE))
	    p->irqmux = (p->irqmux & ~0xf0) | 0x20; /* route INTB */
	break;
    case 1:
	p->devctl &= ~TI113X_DCR_IMODE_MASK;
	p->devctl |= TI113X_DCR_IMODE_ISA;
	break;
    case 2:
	p->devctl &= ~TI113X_DCR_IMODE_MASK;
	p->devctl |= TI113X_DCR_IMODE_SERIAL;
	break;
    case 3:
	p->devctl &= ~TI113X_DCR_IMODE_MASK;
	p->devctl |= TI12XX_DCR_IMODE_ALL_SERIAL;
	break;
    default:
	/* Feeble fallback: if PCI-only but no PCI irq, try ISA */
	if (((p->devctl & TI113X_DCR_IMODE_MASK) == 0) &&
	    (s->cap.pci_irq == 0))
	    p->devctl |= TI113X_DCR_IMODE_ISA;
    }
    if (p->cardctl & TI113X_CCR_RIENB) {
	strcat(buf, " [ring]");
	if (old) mask &= ~0x8000;
    }
    if (old && (p->sysctl & TI113X_SCR_CLKRUN_ENA)) {
	if (p->sysctl & TI113X_SCR_CLKRUN_SEL) {
	    strcat(buf, " [clkrun irq 12]");
	    mask &= ~0x1000;
	} else {
	    strcat(buf, " [clkrun irq 10]");
	    mask &= ~0x0400;
	}
    }
    switch (p->devctl & TI113X_DCR_IMODE_MASK) {
    case TI12XX_DCR_IMODE_PCI_ONLY:
	strcat(buf, " [pci only]");
	mask = 0;
	break;
    case TI113X_DCR_IMODE_ISA:
	strcat(buf, " [isa irq]");
	if (old) mask &= ~0x0018;
	break;
    case TI113X_DCR_IMODE_SERIAL:
	strcat(buf, " [pci + serial irq]");
	mask = 0xffff;
	break;
    case TI12XX_DCR_IMODE_ALL_SERIAL:
	strcat(buf, " [serial pci & irq]");
	mask = 0xffff;
	break;
    }
    return mask;
}

#endif

/*======================================================================

    Code to save and restore global state information for the Ricoh
    RL5C4XX controllers, and to set and report global configuration
    options.

    The interrupt test doesn't seem to be reliable with Ricoh
    bridges.  It seems to depend on what type of card is in the
    socket, and on the history of that socket, in some way that
    doesn't show up in the current socket state.

======================================================================*/

#ifdef CONFIG_PCI

static void __init ricoh_get_state(socket_info_t *s)
{
    ricoh_state_t *p = &s->state.ricoh;
    pci_readw(s, RL5C4XX_CONFIG, &p->config);
    pci_readw(s, RL5C4XX_MISC, &p->misc);
    pci_readw(s, RL5C4XX_16BIT_CTL, &p->ctl);
    pci_readw(s, RL5C4XX_16BIT_IO_0, &p->io);
    pci_readw(s, RL5C4XX_16BIT_MEM_0, &p->mem);
}

static void ricoh_set_state(socket_info_t *s)
{
    ricoh_state_t *p = &s->state.ricoh;
    pci_writew(s, RL5C4XX_CONFIG, p->config);
    pci_writew(s, RL5C4XX_MISC, p->misc);
    pci_writew(s, RL5C4XX_16BIT_CTL, p->ctl);
    pci_writew(s, RL5C4XX_16BIT_IO_0, p->io);
    pci_writew(s, RL5C4XX_16BIT_MEM_0, p->mem);
}

static u_int __init ricoh_set_opts(socket_info_t *s, char *buf)
{
    ricoh_state_t *p = &s->state.ricoh;
    u_int mask = 0xffff;
    int old = (s->type < IS_RL5C475);

    p->ctl = RL5C4XX_16CTL_IO_TIMING | RL5C4XX_16CTL_MEM_TIMING;
    if (old)
	p->ctl |= RL5C46X_16CTL_LEVEL_1 | RL5C46X_16CTL_LEVEL_2;
    else
	p->config |= RL5C4XX_CONFIG_PREFETCH;

    if (setup_time >= 0) {
	p->io = (p->io & ~RL5C4XX_SETUP_MASK) +
	    ((setup_time+1) << RL5C4XX_SETUP_SHIFT);
	p->mem = (p->mem & ~RL5C4XX_SETUP_MASK) +
	    (setup_time << RL5C4XX_SETUP_SHIFT);
    }
    if (cmd_time >= 0) {
	p->io = (p->io & ~RL5C4XX_CMD_MASK) +
	    (cmd_time << RL5C4XX_CMD_SHIFT);
	p->mem = (p->mem & ~RL5C4XX_CMD_MASK) +
	    (cmd_time << RL5C4XX_CMD_SHIFT);
    }
    if (hold_time >= 0) {
	p->io = (p->io & ~RL5C4XX_HOLD_MASK) +
	    (hold_time << RL5C4XX_HOLD_SHIFT);
	p->mem = (p->mem & ~RL5C4XX_HOLD_MASK) +
	    (hold_time << RL5C4XX_HOLD_SHIFT);
    }
    if (irq_mode == 0) {
	mask = 0;
	p->misc &= ~RL5C47X_MISC_SRIRQ_ENA;
	sprintf(buf, " [pci only]");
	buf += strlen(buf);
    } else if (!old) {
	switch (irq_mode) {
	case 1:
	    p->misc &= ~RL5C47X_MISC_SRIRQ_ENA; break;
	case 2:
	    p->misc |= RL5C47X_MISC_SRIRQ_ENA; break;
	}
	if (p->misc & RL5C47X_MISC_SRIRQ_ENA)
	    sprintf(buf, " [serial irq]");
	else
	    sprintf(buf, " [isa irq]");
	buf += strlen(buf);
    }
    sprintf(buf, " [io %d/%d/%d] [mem %d/%d/%d]",
	    (p->io & RL5C4XX_SETUP_MASK) >> RL5C4XX_SETUP_SHIFT,
	    (p->io & RL5C4XX_CMD_MASK) >> RL5C4XX_CMD_SHIFT,
	    (p->io & RL5C4XX_HOLD_MASK) >> RL5C4XX_HOLD_SHIFT,
	    (p->mem & RL5C4XX_SETUP_MASK) >> RL5C4XX_SETUP_SHIFT,
	    (p->mem & RL5C4XX_CMD_MASK) >> RL5C4XX_CMD_SHIFT,
	    (p->mem & RL5C4XX_HOLD_MASK) >> RL5C4XX_HOLD_SHIFT);
    return mask;
}

#endif

/*======================================================================

    Code to save and restore global state information for O2Micro
    controllers, and to set and report global configuration options.
    
======================================================================*/

#ifdef CONFIG_PCI

static void __init o2micro_get_state(socket_info_t *s)
{
    o2micro_state_t *p = &s->state.o2micro;
    if ((s->revision == 0x34) || (s->revision == 0x62) ||
	(s->type == IS_OZ6812)) {
	p->mode_a = i365_get(s, O2_MODE_A_2);
	p->mode_b = i365_get(s, O2_MODE_B_2);
    } else {
	p->mode_a = i365_get(s, O2_MODE_A);
	p->mode_b = i365_get(s, O2_MODE_B);
    }
    p->mode_c = i365_get(s, O2_MODE_C);
    p->mode_d = i365_get(s, O2_MODE_D);
    if (s->flags & IS_CARDBUS) {
	p->mhpg = i365_get(s, O2_MHPG_DMA);
	p->fifo = i365_get(s, O2_FIFO_ENA);
	p->mode_e = i365_get(s, O2_MODE_E);
    }
}

static void o2micro_set_state(socket_info_t *s)
{
    o2micro_state_t *p = &s->state.o2micro;
    if ((s->revision == 0x34) || (s->revision == 0x62) ||
	(s->type == IS_OZ6812)) {
	i365_set(s, O2_MODE_A_2, p->mode_a);
	i365_set(s, O2_MODE_B_2, p->mode_b);
    } else {
	i365_set(s, O2_MODE_A, p->mode_a);
	i365_set(s, O2_MODE_B, p->mode_b);
    }
    i365_set(s, O2_MODE_C, p->mode_c);
    i365_set(s, O2_MODE_D, p->mode_d);
    if (s->flags & IS_CARDBUS) {
	i365_set(s, O2_MHPG_DMA, p->mhpg);
	i365_set(s, O2_FIFO_ENA, p->fifo);
	i365_set(s, O2_MODE_E, p->mode_e);
    }
}

static u_int __init o2micro_set_opts(socket_info_t *s, char *buf)
{
    o2micro_state_t *p = &s->state.o2micro;
    u_int mask = 0xffff;

    p->mode_b = (p->mode_b & ~O2_MODE_B_IDENT) | O2_MODE_B_ID_CSTEP;
    flip(p->mode_b, O2_MODE_B_IRQ15_RI, has_ring);
    p->mode_c &= ~(O2_MODE_C_ZVIDEO | O2_MODE_C_DREQ_MASK);
    if (s->flags & IS_CARDBUS) {
	p->mode_d &= ~O2_MODE_D_W97_IRQ;
	p->mode_e &= ~O2_MODE_E_MHPG_DMA;
	p->mhpg = O2_MHPG_CINT_ENA | O2_MHPG_CSC_ENA;
	if (s->revision == 0x34)
	    p->mode_c = 0x20;
    } else {
	if (p->mode_b & O2_MODE_B_IRQ15_RI) mask &= ~0x8000;
    }
    if (p->mode_b & O2_MODE_B_IRQ15_RI)
	strcat(buf, " [ring]");
    if (irq_mode != -1)
	p->mode_d = irq_mode;
    if (p->mode_d & O2_MODE_D_ISA_IRQ) {
	strcat(buf, " [pci+isa]");
    } else {
	switch (p->mode_d & O2_MODE_D_IRQ_MODE) {
	case O2_MODE_D_IRQ_PCPCI:
	    strcat(buf, " [pc/pci]"); break;
	case O2_MODE_D_IRQ_PCIWAY:
	    strcat(buf, " [pci/way]"); break;
	case O2_MODE_D_IRQ_PCI:
	    strcat(buf, " [pci only]"); mask = 0; break;
	}
    }
    if (s->flags & IS_CARDBUS) {
	if (p->mode_d & O2_MODE_D_W97_IRQ)
	    strcat(buf, " [win97]");
    }
    return mask;
}

#endif

/*======================================================================

    Code to save and restore global state information for the Toshiba
    ToPIC 95 and 97 controllers, and to set and report global
    configuration options.
    
======================================================================*/

#ifdef CONFIG_PCI

static void __init topic_get_state(socket_info_t *s)
{
    topic_state_t *p = &s->state.topic;
    pci_readb(s, TOPIC_SLOT_CONTROL, &p->slot);
    pci_readb(s, TOPIC_CARD_CONTROL, &p->ccr);
    pci_readb(s, TOPIC_CARD_DETECT, &p->cdr);
    pci_readl(s, TOPIC_REGISTER_CONTROL, &p->rcr);
    p->fcr = i365_get(s, TOPIC_FUNCTION_CONTROL);
}

static void topic_set_state(socket_info_t *s)
{
    topic_state_t *p = &s->state.topic;
    u_int state;
    pci_writeb(s, TOPIC_SLOT_CONTROL, p->slot);