wavelan.h

pcmcia source code

/*
 *	Wavelan Pcmcia driver
 *
 *		Jean II - HPLB '96
 *
 * Reorganization and extension of the driver.
 * Original copyright follow. See wavelan_cs.h for details.
 *
 * This file contain the declarations of the Wavelan hardware. Note that
 * the Pcmcia Wavelan include a i82593 controller (see definitions in
 * file i82593.h).
 *
 * The main difference between the pcmcia hardware and the ISA one is
 * the Ethernet Controller (i82593 instead of i82586). The i82593 allow
 * only one send buffer. The PSA (Parameter Storage Area : EEprom for
 * permanent storage of various info) is memory mapped, but not the
 * MMI (Modem Management Interface).
 */

/*
 * Definitions for the AT&T GIS (formerly NCR) WaveLAN PCMCIA card: 
 *   An Ethernet-like radio transceiver controlled by an Intel 82593
 *   coprocessor.
 *
 *
 ****************************************************************************
 *   Copyright 1995
 *   Anthony D. Joseph
 *   Massachusetts Institute of Technology
 *
 *   Permission to use, copy, modify, and distribute this program
 *   for any purpose and without fee is hereby granted, provided
 *   that this copyright and permission notice appear on all copies
 *   and supporting documentation, the name of M.I.T. not be used
 *   in advertising or publicity pertaining to distribution of the
 *   program without specific prior permission, and notice be given
 *   in supporting documentation that copying and distribution is
 *   by permission of M.I.T.  M.I.T. makes no representations about
 *   the suitability of this software for any purpose.  It is pro-
 *   vided "as is" without express or implied warranty.         
 ****************************************************************************
 *
 *
 * Credits:
 *     Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht for
 *       providing extremely useful information about WaveLAN PCMCIA hardware
 *
 *     This driver is based upon several other drivers, in particular:
 *       David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter
 *       Bruce Janson's Linux driver for the AT-bus WaveLAN adapter
 *	 Anders Klemets' PCMCIA WaveLAN adapter driver
 *       Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter
 */

#ifndef _WAVELAN_H
#define	_WAVELAN_H

/************************** MAGIC NUMBERS ***************************/

/* The detection of the wavelan card is made by reading the MAC address
 * from the card and checking it. If you have a non AT&T product (OEM,
 * like DEC RoamAbout, or Digital Ocean, Epson, ...), you must modify this
 * part to accomodate your hardware...
 */
const unsigned char	MAC_ADDRESSES[][3] =
{
  { 0x08, 0x00, 0x0E },		/* AT&T Wavelan (standard) & DEC RoamAbout */
  { 0x08, 0x00, 0x6A },		/* AT&T Wavelan (alternate) */
  { 0x00, 0x00, 0xE1 },		/* Hitachi Wavelan */
  { 0x00, 0x60, 0x1D }		/* Lucent Wavelan (another one) */
  /* Add your card here and send me the patch ! */
};

/*
 * Constants used to convert channels to frequencies
 */

/* Frequency available in the 2.0 modem, in units of 250 kHz
 * (as read in the offset register of the dac area).
 * Used to map channel numbers used by `wfreqsel' to frequencies
 */
const short	channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
				    0xD0, 0xF0, 0xF8, 0x150 };

/* Frequencies of the 1.0 modem (fixed frequencies).
 * Use to map the PSA `subband' to a frequency
 * Note : all frequencies apart from the first one need to be multiplied by 10
 */
const int	fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };


/*************************** PC INTERFACE ****************************/

/* WaveLAN host interface definitions */

#define	LCCR(base)	(base)		/* LAN Controller Command Register */
#define	LCSR(base)	(base)		/* LAN Controller Status Register */
#define	HACR(base)	(base+0x1)	/* Host Adapter Command Register */
#define	HASR(base)	(base+0x1)	/* Host Adapter Status Register */
#define PIORL(base)	(base+0x2)	/* Program I/O Register Low */
#define RPLL(base)	(base+0x2)	/* Receive Pointer Latched Low */
#define PIORH(base)	(base+0x3)	/* Program I/O Register High */
#define RPLH(base)	(base+0x3)	/* Receive Pointer Latched High */
#define PIOP(base)	(base+0x4)	/* Program I/O Port */
#define MMR(base)	(base+0x6)	/* MMI Address Register */
#define MMD(base)	(base+0x7)	/* MMI Data Register */

/* Host Adaptor Command Register bit definitions */

#define HACR_LOF	  (1 << 3)	/* Lock Out Flag, toggle every 250ms */
#define HACR_PWR_STAT	  (1 << 4)	/* Power State, 1=active, 0=sleep */
#define HACR_TX_DMA_RESET (1 << 5)	/* Reset transmit DMA ptr on high */
#define HACR_RX_DMA_RESET (1 << 6)	/* Reset receive DMA ptr on high */
#define HACR_ROM_WEN	  (1 << 7)	/* EEPROM write enabled when true */

#define HACR_RESET              (HACR_TX_DMA_RESET | HACR_RX_DMA_RESET)
#define	HACR_DEFAULT		(HACR_PWR_STAT)

/* Host Adapter Status Register bit definitions */

#define HASR_MMI_BUSY	(1 << 2)	/* MMI is busy when true */
#define HASR_LOF	(1 << 3)	/* Lock out flag status */
#define HASR_NO_CLK	(1 << 4)	/* active when modem not connected */

/* Miscellaneous bit definitions */

#define PIORH_SEL_TX	(1 << 5)	/* PIOR points to 0=rx/1=tx buffer */
#define MMR_MMI_WR	(1 << 0)	/* Next MMI cycle is 0=read, 1=write */
#define PIORH_MASK	0x1f		/* only low 5 bits are significant */
#define RPLH_MASK	0x1f		/* only low 5 bits are significant */
#define MMI_ADDR_MASK	0x7e		/* Bits 1-6 of MMR are significant */

/* Attribute Memory map */

#define CIS_ADDR	0x0000		/* Card Information Status Register */
#define PSA_ADDR	0x0e00		/* Parameter Storage Area address */
#define EEPROM_ADDR	0x1000		/* EEPROM address (unused ?) */
#define COR_ADDR	0x4000		/* Configuration Option Register */

/* Configuration Option Register bit definitions */

#define COR_CONFIG	(1 << 0)	/* Config Index, 0 when unconfigured */
#define COR_SW_RESET	(1 << 7)	/* Software Reset on true */
#define COR_LEVEL_IRQ	(1 << 6)	/* Level IRQ */

/* Local Memory map */

#define RX_BASE		0x0000		/* Receive memory, 8 kB */
#define TX_BASE		0x2000		/* Transmit memory, 2 kB */
#define UNUSED_BASE	0x2800		/* Unused, 22 kB */
#define RX_SIZE		(TX_BASE-RX_BASE)	/* Size of receive area */
#define RX_SIZE_SHIFT	6		/* Bits to shift in stop register */

#define TRUE  1
#define FALSE 0

#define MOD_ENAL 1
#define MOD_PROM 2

/* Size of a MAC address */
#define WAVELAN_ADDR_SIZE	6

/* Maximum size of Wavelan packet */
#define WAVELAN_MTU	1500

#define	MAXDATAZ		(6 + 6 + 2 + WAVELAN_MTU)

/********************** PARAMETER STORAGE AREA **********************/

/*
 * Parameter Storage Area (PSA).
 */
typedef struct psa_t	psa_t;
struct psa_t
{
  /* For the PCMCIA Adapter, locations 0x00-0x0F are unused and fixed at 00 */
  unsigned char	psa_io_base_addr_1;	/* [0x00] Base address 1 ??? */
  unsigned char	psa_io_base_addr_2;	/* [0x01] Base address 2 */
  unsigned char	psa_io_base_addr_3;	/* [0x02] Base address 3 */
  unsigned char	psa_io_base_addr_4;	/* [0x03] Base address 4 */
  unsigned char	psa_rem_boot_addr_1;	/* [0x04] Remote Boot Address 1 */
  unsigned char	psa_rem_boot_addr_2;	/* [0x05] Remote Boot Address 2 */
  unsigned char	psa_rem_boot_addr_3;	/* [0x06] Remote Boot Address 3 */
  unsigned char	psa_holi_params;	/* [0x07] HOst Lan Interface (HOLI) Parameters */
  unsigned char	psa_int_req_no;		/* [0x08] Interrupt Request Line */
  unsigned char	psa_unused0[7];		/* [0x09-0x0F] unused */

  unsigned char	psa_univ_mac_addr[WAVELAN_ADDR_SIZE];	/* [0x10-0x15] Universal (factory) MAC Address */
  unsigned char	psa_local_mac_addr[WAVELAN_ADDR_SIZE];	/* [0x16-1B] Local MAC Address */
  unsigned char	psa_univ_local_sel;	/* [0x1C] Universal Local Selection */
#define		PSA_UNIVERSAL	0		/* Universal (factory) */
#define		PSA_LOCAL	1		/* Local */
  unsigned char	psa_comp_number;	/* [0x1D] Compatability Number: */
#define		PSA_COMP_PC_AT_915	0 	/* PC-AT 915 MHz	*/