blnkdly.lst

aduc814的汇编程序例子

BLNKDLY                                                                                                       PAGE 1

                       1    ;======================================================================
                       2    ;
                       3    ; Author        : ADI - Apps
                       4    ;
                       5    ; Date          : Febuary 2001
                       6    ;
                       7    ; Filename      : bdelay.asm
                       8    ;
                       9    ; Hardware      : ADuC814 
                      10    ;
                      11    ; Description   : Blinks LED continuously.
                      12    ;                 200mSec period @ 50% duty cycle.
                      13    ;                 Pressing Int0 delays LED toggle rate by 200mSec
                      14    ;
                      15    ;======================================================================
                      16    ;       
                      17    $MOD814                                 ; Use ADuC814 predefined Symbols
                      18    
  00B3                19    LED     EQU     P3.3                    ; P3.3 is red LED on eval board
  0000                20    FLAG    BIT     00H                     ; define Flag variable
                      21    
----                  22    CSEG                                    ; Defines the following as a segment of code
                      23    
0000                  24    ORG     0000H                           ; Load Code at '00H'    
                      25    
0000 020011           26                    JMP     MAIN            ; Jump to MAIN
                      27    
                      28    ;======================================================================
                      29    
0003                  30    ORG 0003h                               ; (INT0 ISR)
0003 04               31                    INC     A               ; Increment Acc
0004 32               32                    RETI                    ; Return from Interrupt
                      33    
                      34    ;======================================================================
                      35    
                      36                                            ; Subroutines
                      37    ;------------------------------------------------------------------
                      38    
0005                  39    DELAY:                                  ; Delays by 100ms * A
                      40                                            ; 100mSec based on 2.097152MHZ 
                      41                                            ; Core Clock 
                      42                                            ; i.e. default ADuC814 Clock
                      43    
0005 F9               44                    MOV     R1,A            ; Acc holds delay variable
0006 7A22             45     DLY0:          MOV     R2,#022h        ; Set up delay loop0
0008 7BFF             46     DLY1:          MOV     R3,#0FFh        ; Set up delay loop1
000A DBFE             47                    DJNZ    R3,$            ; Dec R3 & Jump here until R3 is 0
000C DAFA             48                    DJNZ    R2,DLY1         ; Dec R2 & Jump DLY1 until R2 is 0
000E D9F6             49                    DJNZ    R1,DLY0         ; Dec R1 & Jump DLY0 until R1 is 0
0010 22               50                    RET                     ; Return from subroutine
                      51    ;======================================================================
                      52    
0011                  53    MAIN:                                           ; (main program)
                      54    
0011 75812F           55                    MOV     SP,#02Fh                ; Initialize SP
0014 D288             56                    SETB    IT0                     ; INT0 edge triggered
0016 D2AF             57                    SETB    EA                      ; enable inturrupts
0018 D2A8             58                    SETB    EX0                     ; enable INT0
BLNKDLY                                                                                                       PAGE 2

                      59            
001A C200             60                    CLR     FLAG                    ; Clear Bit defined as FLAG
                      61            
001C 7401             62                    MOV     A,#01H                  ; Initialize A -> 1
001E B2B3             63    BLINK:          CPL     LED             ; blink LED using compliment instruction
0020 1105             64                    CALL    DELAY                   ; Jump to subroutine DELAY
0022 3000F9           65                    JNB     FLAG,BLINK              ; If FLAG is still cleared the jump to Blink
                                                                               
                      66    
                      67    END
                      68    
                      69    
                      70    

VERSION 1.2h ASSEMBLY COMPLETE, 0 ERRORS FOUND
BLNKDLY                                                                                                       PAGE 3

BLINK. . . . . . . . . . . . . .  C ADDR  001EH  
DELAY. . . . . . . . . . . . . .  C ADDR  0005H  
DLY0 . . . . . . . . . . . . . .  C ADDR  0006H  
DLY1 . . . . . . . . . . . . . .  C ADDR  0008H  
EA . . . . . . . . . . . . . . .  B ADDR  00AFH  PREDEFINED  
EX0. . . . . . . . . . . . . . .  B ADDR  00A8H  PREDEFINED  
FLAG . . . . . . . . . . . . . .  B ADDR  0000H  
IT0. . . . . . . . . . . . . . .  B ADDR  0088H  PREDEFINED  
LED. . . . . . . . . . . . . . .    NUMB  00B3H  
MAIN . . . . . . . . . . . . . .  C ADDR  0011H  
P3 . . . . . . . . . . . . . . .  D ADDR  00B0H  PREDEFINED  
SP . . . . . . . . . . . . . . .  D ADDR  0081H  PREDEFINED