📄 uart_multiproc_slave.lst
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A51 MACRO ASSEMBLER UART_MULTIPROC_SLAVE 04/26/2004 14:14:29 PAGE 1
MACRO ASSEMBLER A51 V7.09
OBJECT MODULE PLACED IN uart_multiproc_slave.OBJ
ASSEMBLER INVOKED BY: C:\KEIL\C51\BIN\A51.EXE uart_multiproc_slave.a51 NOMOD51 SET(SMALL) DEBUG EP
LOC OBJ LINE SOURCE
1 ;$include (reg_c51.INC)
+1 2 +1 $save
+1 210 +1 $restore
211
0020 212 echo BIT 20H; echo enable bit
0021 213 TxOK BIT 21H; software flag
214
0000 215 org 000h
0000 020104 216 ljmp begin
217
0023 218 org 23h
0023 020137 219 ljmp serial_IT
220
221
222
223
224
225
226
0100 227 org 0100h
0100 C220 228 CLR echo
0102 C221 229 CLR TxOK
230
0104 231 begin:
0104 7598F0 232 MOV SCON, #0F0h; /* uart in mode 3 (9 bit), REN=1
*/
0107 75A903 233 MOV SADDR,#03h; /* local address */
010A 75B9FF 234 MOV SADEN,#0FFh; /* address mask */
010D 438920 235 ORL TMOD, #20h; /* Timer 1 in mode 2 */
0110 758DFD 236 MOV TH1, #0FDh; /* 9600 Bds at 11.059MHz */
0113 758BFD 237 MOV TL1, #0FDh; /* 9600 Bds at 11.059MHz */
0116 D2AC 238 SETB ES; /* Enable serial interrup
t */
0118 D2AF 239 SETB EA; /* Enable global inter
rupt */
011A D28E 240 SETB TR1; /* Timer 1 run */
241
242
011C 243 loop:
011C 3020FD 244 JNB echo,$; /* wait data to echo */
011F C220 245 CLR echo ; /* disable echo */
0121 D29B 246 SETB TB8; /* address mode */
0123 D221 247 SETB TxOK; /* set software flag */
0125 759901 248 MOV SBUF,#01h; /* send master adress */
0128 2021FD 249 JB TxOK,$; /* wait the stop bit transmition */
012B C29B 250 CLR TB8; /* data mode */
012D D221 251 SETB TxOK; /* set software flag */
012F F599 252 MOV SBUF,A; /* send data */
0131 2021FD 253 JB TxOK,$; /* wait the stop bit transmition */
254
0134 02011C 255 LJMP loop
256
257
258 ;/**
259 ; * FUNCTION_PURPOSE: serial interrupt, echo receive data to master
260 ; * FUNCTION_INPUTS: P3.0(RXD) serial input
261 ; * FUNCTION_OUTPUTS: none
262 ; */
A51 MACRO ASSEMBLER UART_MULTIPROC_SLAVE 04/26/2004 14:14:29 PAGE 2
0137 263 serial_IT:
0137 309904 264 JNB TI,END_Test_TI; /* if reception occur */
013A C299 265 CLR TI; /* clear transmition flag for next transmition */
013C C221 266 CLR TxOK; /* clear software transmition flag */
013E 267 END_Test_TI:
268
269
013E 309810 270 JNB RI,END_Test_RI; /* test if it is a reception */
0141 C298 271 CLR RI; /* clear reception flag for next reception */
272
0143 309A05 273 JNB RB8,address_mode
0146 C29D 274 CLR SM2; /* go into data mode */
0148 020151 275 LJMP END_Test_RB8
014B 276 address_mode:
014B E599 277 MOV A,SBUF; /* Read receive data */
014D D29D 278 SETB SM2; /* return into address mode after receive data */
014F D220 279 SETB echo
280
0151 281 END_Test_RB8:
282
0151 283 END_Test_RI:
284
0151 32 285 RETI
286
287 end
A51 MACRO ASSEMBLER UART_MULTIPROC_SLAVE 04/26/2004 14:14:29 PAGE 3
SYMBOL TABLE LISTING
------ ----- -------
N A M E T Y P E V A L U E ATTRIBUTES
AC . . . . . . . . B ADDR 00D0H.6 A
ACC. . . . . . . . D ADDR 00E0H A
ADDRESS_MODE . . . C ADDR 014BH A
AUXR . . . . . . . D ADDR 008EH A
AUXR1. . . . . . . D ADDR 00A2H A
B. . . . . . . . . D ADDR 00F0H A
BDRCON . . . . . . D ADDR 009BH A
BEGIN. . . . . . . C ADDR 0104H A
BRL. . . . . . . . D ADDR 009AH A
CCAP0H . . . . . . D ADDR 00FAH A
CCAP0L . . . . . . D ADDR 00EAH A
CCAP1H . . . . . . D ADDR 00FBH A
CCAP1L . . . . . . D ADDR 00EBH A
CCAP2H . . . . . . D ADDR 00FCH A
CCAP2L . . . . . . D ADDR 00ECH A
CCAP3H . . . . . . D ADDR 00FDH A
CCAP3L . . . . . . D ADDR 00EDH A
CCAP4H . . . . . . D ADDR 00FEH A
CCAP4L . . . . . . D ADDR 00EEH A
CCAPM0 . . . . . . D ADDR 00DAH A
CCAPM1 . . . . . . D ADDR 00DBH A
CCAPM2 . . . . . . D ADDR 00DCH A
CCAPM3 . . . . . . D ADDR 00DDH A
CCAPM4 . . . . . . D ADDR 00DEH A
CCF0 . . . . . . . B ADDR 00D8H.0 A
CCF1 . . . . . . . B ADDR 00D8H.1 A
CCF2 . . . . . . . B ADDR 00D8H.2 A
CCF3 . . . . . . . B ADDR 00D8H.3 A
CCF4 . . . . . . . B ADDR 00D8H.4 A
CCON . . . . . . . D ADDR 00D8H A
CF . . . . . . . . B ADDR 00D8H.7 A
CH . . . . . . . . D ADDR 00F9H A
CKCON0 . . . . . . D ADDR 008FH A
CKCON1 . . . . . . D ADDR 00AFH A
CKRL . . . . . . . D ADDR 0097H A
CKSEL. . . . . . . D ADDR 0085H A
CL . . . . . . . . D ADDR 00E9H A
CMOD . . . . . . . D ADDR 00D9H A
CP_RL2 . . . . . . B ADDR 00C8H.0 A
CR . . . . . . . . B ADDR 00D8H.6 A
CY . . . . . . . . B ADDR 00D0H.7 A
C_T2 . . . . . . . B ADDR 00C8H.1 A
DPH. . . . . . . . D ADDR 0083H A
DPL. . . . . . . . D ADDR 0082H A
EA . . . . . . . . B ADDR 00A8H.7 A
EC . . . . . . . . B ADDR 00A8H.6 A
ECHO . . . . . . . B ADDR 0024H.0 A
EECON. . . . . . . D ADDR 00D2H A
END_TEST_RB8 . . . C ADDR 0151H A
END_TEST_RI. . . . C ADDR 0151H A
END_TEST_TI. . . . C ADDR 013EH A
ES . . . . . . . . B ADDR 00A8H.4 A
ET0. . . . . . . . B ADDR 00A8H.1 A
ET1. . . . . . . . B ADDR 00A8H.3 A
ET2. . . . . . . . B ADDR 00A8H.5 A
EX0. . . . . . . . B ADDR 00A8H.0 A
EX1. . . . . . . . B ADDR 00A8H.2 A
EXEN2. . . . . . . B ADDR 00C8H.3 A
EXF2 . . . . . . . B ADDR 00C8H.6 A
F0 . . . . . . . . B ADDR 00D0H.5 A
A51 MACRO ASSEMBLER UART_MULTIPROC_SLAVE 04/26/2004 14:14:29 PAGE 4
FCON . . . . . . . D ADDR 00D1H A
IE0. . . . . . . . B ADDR 0088H.1 A
IE1. . . . . . . . B ADDR 0088H.3 A
IEN0 . . . . . . . D ADDR 00A8H A
IEN1 . . . . . . . D ADDR 00B1H A
INT0 . . . . . . . B ADDR 00B0H.2 A
INT1 . . . . . . . B ADDR 00B0H.3 A
IPH0 . . . . . . . D ADDR 00B7H A
IPH1 . . . . . . . D ADDR 00B3H A
IPL0 . . . . . . . D ADDR 00B8H A
IPL1 . . . . . . . D ADDR 00B2H A
IT0. . . . . . . . B ADDR 0088H.0 A
IT1. . . . . . . . B ADDR 0088H.2 A
KBE. . . . . . . . D ADDR 009DH A
KBF. . . . . . . . D ADDR 009EH A
KBLS . . . . . . . D ADDR 009CH A
LOOP . . . . . . . C ADDR 011CH A
OSCCON . . . . . . D ADDR 0086H A
OV . . . . . . . . B ADDR 00D0H.2 A
P. . . . . . . . . B ADDR 00D0H.0 A
P0 . . . . . . . . D ADDR 0080H A
P1 . . . . . . . . D ADDR 0090H A
P2 . . . . . . . . D ADDR 00A0H A
P3 . . . . . . . . D ADDR 00B0H A
P4 . . . . . . . . D ADDR 00C0H A
P5 . . . . . . . . D ADDR 00E8H A
PCON . . . . . . . D ADDR 0087H A
PI2. . . . . . . . D ADDR 00F8H A
PI2_1. . . . . . . B ADDR 00F8H.1 A
PI2_O. . . . . . . B ADDR 00F8H.0 A
PPCL . . . . . . . B ADDR 00B8H.6 A
PSL. . . . . . . . B ADDR 00B8H.4 A
PSW. . . . . . . . D ADDR 00D0H A
PT0L . . . . . . . B ADDR 00B8H.1 A
PT1L . . . . . . . B ADDR 00B8H.3 A
PT2L . . . . . . . B ADDR 00B8H.5 A
PX0L . . . . . . . B ADDR 00B8H.0 A
PX1L . . . . . . . B ADDR 00B8H.2 A
RB8. . . . . . . . B ADDR 0098H.2 A
RCAP2H . . . . . . D ADDR 00CBH A
RCAP2L . . . . . . D ADDR 00CAH A
RCLK . . . . . . . B ADDR 00C8H.5 A
RD . . . . . . . . B ADDR 00B0H.7 A
REN. . . . . . . . B ADDR 0098H.4 A
RI . . . . . . . . B ADDR 0098H.0 A
RS0. . . . . . . . B ADDR 00D0H.3 A
RS1. . . . . . . . B ADDR 00D0H.4 A
RXD. . . . . . . . B ADDR 00B0H.0 A
SADDR. . . . . . . D ADDR 00A9H A
SADEN. . . . . . . D ADDR 00B9H A
SBUF . . . . . . . D ADDR 0099H A
SCON . . . . . . . D ADDR 0098H A
SERIAL_IT. . . . . C ADDR 0137H A
SM0. . . . . . . . B ADDR 0098H.7 A
SM1. . . . . . . . B ADDR 0098H.6 A
SM2. . . . . . . . B ADDR 0098H.5 A
SP . . . . . . . . D ADDR 0081H A
SPCON. . . . . . . D ADDR 00C3H A
SPDAT. . . . . . . D ADDR 00C5H A
SPSTA. . . . . . . D ADDR 00C4H A
SSADR. . . . . . . D ADDR 0096H A
SSCON. . . . . . . D ADDR 0093H A
SSCS . . . . . . . D ADDR 0094H A
SSDAT. . . . . . . D ADDR 0095H A
T0 . . . . . . . . B ADDR 00B0H.4 A
T1 . . . . . . . . B ADDR 00B0H.5 A
A51 MACRO ASSEMBLER UART_MULTIPROC_SLAVE 04/26/2004 14:14:29 PAGE 5
T2CON. . . . . . . D ADDR 00C8H A
T2MOD. . . . . . . D ADDR 00C9H A
TB8. . . . . . . . B ADDR 0098H.3 A
TCLK . . . . . . . B ADDR 00C8H.4 A
TCON . . . . . . . D ADDR 0088H A
TF0. . . . . . . . B ADDR 0088H.5 A
TF1. . . . . . . . B ADDR 0088H.7 A
TF2. . . . . . . . B ADDR 00C8H.7 A
TH0. . . . . . . . D ADDR 008CH A
TH1. . . . . . . . D ADDR 008DH A
TH2. . . . . . . . D ADDR 00CDH A
TI . . . . . . . . B ADDR 0098H.1 A
TL0. . . . . . . . D ADDR 008AH A
TL1. . . . . . . . D ADDR 008BH A
TL2. . . . . . . . D ADDR 00CCH A
TMOD . . . . . . . D ADDR 0089H A
TR0. . . . . . . . B ADDR 0088H.4 A
TR1. . . . . . . . B ADDR 0088H.6 A
TR2. . . . . . . . B ADDR 00C8H.2 A
TXD. . . . . . . . B ADDR 00B0H.1 A
TXOK . . . . . . . B ADDR 0024H.1 A
WDTPRG . . . . . . D ADDR 00A7H A
WDTRST . . . . . . D ADDR 00A6H A
WR . . . . . . . . B ADDR 00B0H.6 A
REGISTER BANK(S) USED: 0
ASSEMBLY COMPLETE. 0 WARNING(S), 0 ERROR(S)
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