uc390.cc

来自「Small Device C Compiler 面向Inter8051」· CC 代码 · 共 1,183 行 · 第 1/2 页

  tick (1);
  return resGO;
}

/*
 * 0x90 3 24 MOV DPTR,#data
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_mov_dptr_Sdata (uchar code)
{
  uchar pl, ph, px, dps;

  dps = sfr->get (DPS);
  if (dps & 0x01)
    {
      pl = DPL1;
      ph = DPH1;
      px = DPX1;
    }
  else
    {
      pl = DPL;
      ph = DPH;
      px = DPX;
    }

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    sfr->write (px, fetch ());
  sfr->write (ph, fetch ());
  sfr->write (pl, fetch ());

  if (dps & 0x20)                      /* auto-switch dptr */
    sfr->write (DPS, dps ^ 1);    /* toggle dual-dptr switch */

  tick (1);
  return resGO;
}


/*
 * 0x93 1 24 MOVC A,@A+DPTR
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_movc_a_Sa_dptr (uchar code)
{
  uchar pl, ph, px, dps;

  dps = sfr->get (DPS);
  if (dps & 0x01)
    {
      pl = DPL1;
      ph = DPH1;
      px = DPX1;
    }
  else
    {
      pl = DPL;
      ph = DPH;
      px = DPX;
    }

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    acc->write (read_mem (MEM_ROM,
                (sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl) +
                acc->read())));
  else
    acc->write (read_mem (MEM_ROM,
                (sfr->read (ph) * 256 + sfr->read (pl) +
                acc->read())));

  if (dps & 0x20)                      /* auto-switch dptr */
    sfr->write (DPS, dps ^ 1);  /* toggle dual-dptr switch */

  tick (1);
  return resGO;
}

/*
 * 0xc0 2 24 PUSH addr
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_push (uchar code)
{
  class cl_cell *cell;

  cell = get_direct(fetch());
  push_byte (cell->read());
  tick (1);
  return resGO;
}


/*
 * 0xd0 2 24 POP addr
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_pop (uchar code)
{
  class cl_cell *cell;

  cell = get_direct (fetch());
  cell->write (pop_byte());
  tick (1);
  return resGO;
}


/*
 * 0xe0 1 24 MOVX A,@DPTR
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_movx_a_Sdptr (uchar code)
{
  uchar pl, ph, px, dps;

  dps = sfr->get (DPS);
  if (dps & 0x01)
    {
      pl = DPL1;
      ph = DPH1;
      px = DPX1;
    }
  else
    {
      pl = DPL;
      ph = DPH;
      px = DPX;
    }

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    acc->write (read_mem (MEM_XRAM,
                sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl)));
  else
    acc->write (read_mem (MEM_XRAM,
                sfr->read (ph) * 256 + sfr->read (pl)));

  if (dps & 0x20)                      /* auto-switch dptr */
    sfr->write (DPS, dps ^ 1);   /* toggle dual-dptr switch */

  tick (1);
  return resGO;
}

/*
 * 0xf0 1 24 MOVX @DPTR,A
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_movx_Sdptr_a (uchar code)
{
  uchar pl, ph, px, dps;

  dps = sfr->get (DPS);
  if (dps & 0x01)
    {
      pl = DPL1;
      ph = DPH1;
      px = DPX1;
    }
  else
    {
      pl = DPL;
      ph = DPH;
      px = DPX;
    }

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    write_mem (MEM_XRAM,
               sfr->read (px) * 256*256 + sfr->read (ph) * 256 + sfr->read (pl),
               acc->read());
  else
    write_mem (MEM_XRAM,
               sfr->read (ph) * 256 + sfr->read (pl),
               acc->read());

  if (dps & 0x20)                      /* auto-switch dptr */
    sfr->write (DPS, dps ^ 1);   /* toggle dual-dptr switch */

  tick (1);
  return resGO;
}

/*
 * 0x[02468ace]1 2 24 AJMP addr
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_ajmp_addr (uchar code)
{
  uchar x, h, l;

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    {
      x = (code >> 5) & 0x07;
      h = fetch ();
      l = fetch ();
      PC = (PC & 0xf800) | (x * 256*256 + h * 256 + l);
    }
  else
    {
      h = (code >> 5) & 0x07;
      l = fetch ();
      PC = (PC & 0xf800) | (h * 256 + l);
    }
  tick (1);
  return resGO;
}

/*
 * 0x02 3 24 LJMP addr
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_ljmp (uchar code)
{
  uchar x, h, l;

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    {
      x = fetch ();
      h = fetch ();
      l = fetch ();
      PC = x * 256*256 + h * 256 + l;
    }
  else
    {
      h = fetch ();
      l = fetch ();
      PC = h * 256 + l;
    }
  tick (1);
  return resGO;
}

/*
 * 0x[13579bdf]1 2 24 ACALL addr
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_acall_addr (uchar code)
{
  uchar x, h, l;

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    {
      x = (code >> 5) & 0x07;
      h = fetch ();
      l = fetch ();

      push_byte ( PC        & 0xff); /* push low byte  */
      push_byte ((PC >>  8) & 0xff); /* push high byte */
      push_byte ((PC >> 16) & 0xff); /* push x byte    */

      PC = (PC & 0xf800) | (x * 256*256 + h * 256 + l);
    }
  else
    {
      /* stock mcs51 mode */
      class cl_cell *stck;
      t_mem sp;

      h = (code >> 5) & 0x07;
      l = fetch();
      sp = sfr->wadd (SP, 1);
      stck = iram->get_cell (sp);
      stck->write (PC & 0xff); // push low byte

      sp = sfr->wadd (SP, 1);
      stck = iram->get_cell (sp);
      stck->write ((PC >> 8) & 0xff); // push high byte
      PC = (PC & 0xf800) | (h*256 + l);
    }
  tick (1);
  return resGO;
}


/*
 * 0x12 3 24 LCALL addr
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_lcall (uchar code, uint addr)
{
  uchar x = 0, h = 0, l = 0;

  if (!addr)
    { /* this is a normal lcall */
     if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
        x = fetch ();
      h = fetch ();
      l = fetch ();
    }
    /* else, this is interrupt processing */

  push_byte ( PC       & 0xff); /* push low byte  */
  push_byte ((PC >> 8) & 0xff); /* push high byte */

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    {
      push_byte ((PC >> 16) & 0xff); /* push x byte */
      if (addr)
        PC = addr & 0xfffful; /* if interrupt: x-Byte is 0 */
      else
        PC = x * 256*256 + h * 256 + l;
    }
  else
    {
      if (addr)
        PC = addr;
      else
        PC = h * 256 + l;
    }
  return resGO;
}

/*
 * 0x22 1 24 RET
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_ret (uchar code)
{
  uchar x = 0, h, l;

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    x = pop_byte ();
  h = pop_byte ();
  l = pop_byte ();

  tick (1);

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    {
      tick (1);
      PC = x * 256*256 + h * 256 + l;
    }
  else
    PC = h * 256 + l;

  return resGO;
}

/*
 * 0x32 1 24 RETI
 *____________________________________________________________________________
 *
 */

int
t_uc390::inst_reti (uchar code)
{
  uchar x = 0, h, l;

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    x = pop_byte ();
  h = pop_byte ();
  l = pop_byte ();
  tick (1);

  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    {
      tick (1);
      PC = x * 256*256 + h * 256 + l;
    }
  else
    PC = h * 256 + l;

  interrupt->was_reti = DD_TRUE;
  class it_level *il = (class it_level *) (it_levels->top ());
  if (il &&
      il->level >= 0)
    {
      il = (class it_level *) (it_levels->pop ());
      delete il;
    }

  return resGO;
}


/*
 * Disassembling an instruction
 */

struct dis_entry *
t_uc390::dis_tbl (void)
{
  if (sfr->get (ACON) & 0x02) /* AM1 set: 24-bit flat? */
    return disass_390f;
  else
    return disass_51;
    //t_uc51::dis_tbl ();

}

char *
t_uc390::disass (t_addr addr, char *sep)
{
  char work[256], temp[20], c[2];
  char *buf, *p, *b, *t;
  t_mem code;

  if (! (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
    return t_uc51::disass (addr, sep);
  code = get_mem (MEM_ROM, addr);

  p = work;
  b = dis_tbl()[code].mnemonic;
  while (*b)
    {
      if (*b == '%')
        {
          b++;
          switch (*(b++))
            {
              case 'A': // absolute address
                // stock:
                // sprintf (temp, "%04lx",
                //          (addr & 0xf800)|
                //          (((code >> 5) & 0x07) * 256 +
                //          get_mem (MEM_ROM, addr + 1)));

                sprintf (temp, "%06lx",
                         (addr & 0xf80000L) |
                         (((code >> 5) & 0x07) * (256 * 256) +
                         (get_mem (MEM_ROM, addr + 1) * 256) +
                          get_mem (MEM_ROM, addr + 2)));
              break;
            case 'l': // long address
              sprintf (temp, "%06lx",
                       get_mem (MEM_ROM, addr + 1) * (256*256L) +
                       get_mem (MEM_ROM, addr + 2) * 256 +
                       get_mem (MEM_ROM, addr + 3));
                       // get_mem (MEM_ROM, addr + 1) * 256 + get_mem (MEM_ROM, addr + 2));
              break;
            case 'a': // addr8 (direct address) at 2nd byte
               if (!get_name (get_mem (MEM_ROM, addr + 1), sfr_tbl (), temp))
                 sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 1));
              break;
            case '8': // addr8 (direct address) at 3rd byte
              if (!get_name (get_mem (MEM_ROM, addr + 2), sfr_tbl (), temp))
                sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 2));
              break;
            case 'b': // bitaddr at 2nd byte
	      {
		t_addr ba = get_mem (MEM_ROM, addr+1);
		if (get_name (ba, bit_tbl(), temp))
		  break;
		if (get_name ((ba<128) ? ((ba/8)+32) : (ba&0xf8), sfr_tbl(), temp))
		  {
		    strcat (temp, ".");
		    sprintf (c, "%1"_M_"d", ba & 0x07);
		    strcat (temp, c);
		    break;
		  }
		sprintf (temp, "%02x.%"_M_"d", (ba<128) ? ((ba/8)+32) : (ba&0xf8),
		 	 ba & 0x07);
		break;
	      }
            case 'r': // rel8 address at 2nd byte
              sprintf (temp, "%04"_A_"x",
                       t_addr (addr + 2 + (signed char) (get_mem (MEM_ROM, addr + 1))));
              break;
            case 'R': // rel8 address at 3rd byte
              sprintf (temp, "%04"_A_"x",
                       t_addr (addr + 3 + (signed char) (get_mem (MEM_ROM, addr + 2))));
              break;
            case 'd': // data8 at 2nd byte
              sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 1));
              break;
            case 'D': // data8 at 3rd byte
              sprintf (temp, "%02"_M_"x", get_mem (MEM_ROM, addr + 2));
              break;
            default:
              strcpy (temp, "?");
              break;
            }
          t = temp;
          while (*t)
            *p++ = *t++;
        }
      else
        *p++ = *b++;
    }
  *p = '\0';

  p = strchr (work, ' ');
  if (!p)
    {
      buf = strdup (work);
      return buf;
    }
  if (sep == NULL)
    buf = (char *) malloc (6 + strlen (p) + 1);
  else
    buf = (char *) malloc ((p - work) + strlen (sep) + strlen (p) + 1);
  for (p = work, b = buf; *p != ' '; p++, b++)
    *b = *p;
  p++;
  *b = '\0';
  if (sep == NULL)
    while (strlen (buf) < 6)
      strcat (buf, " ");
  else
    strcat (buf, sep);
  strcat (buf, p);
  return buf;
}

void
t_uc390::print_regs (class cl_console *con)
{
  t_addr start;
  t_mem data;

  if (! (sfr->get (ACON) & 0x02)) /* AM1 set: 24-bit flat? */
    {
      t_uc51::print_regs (con);
      return;
    }
  start = sfr->get (PSW) & 0x18;
  //dump_memory(iram, &start, start+7, 8, /*sim->cmd_out()*/con, sim);
  iram->dump (start, start + 7, 8, con);
  start = sfr->get (PSW) & 0x18;
  data = iram->get (iram->get (start));
  con->dd_printf("%06x %02x %c",
		  iram->get (start), data, isprint (data) ? data : '.');
  con->dd_printf("  ACC= 0x%02x %3d %c  B= 0x%02x",
		 sfr->get (ACC), sfr->get (ACC),
		 isprint (sfr->get (ACC)) ?
		 (sfr->get (ACC)) : '.', sfr->get (B));
  eram2xram ();
  data = get_mem (MEM_XRAM,
                  sfr->get (DPX) * 256*256 + sfr->get (DPH) * 256 + sfr->get (DPL));
  con->dd_printf ("   DPTR= 0x%02x%02x%02x @DPTR= 0x%02x %3d %c\n",
		  sfr->get (DPX), sfr->get (DPH), sfr->get (DPL),
		  data, data, isprint (data) ? data : '.');
  data = iram->get (iram->get (start + 1));
  con->dd_printf ("%06x %02x %c", iram->get (start + 1), data,
		  isprint (data) ? data : '.');
  data= sfr->get (PSW);
  con->dd_printf ("  PSW= 0x%02x CY=%c AC=%c OV=%c P=%c    ",
		  data,
		  (data & bmCY) ? '1' : '0', (data & bmAC) ? '1' : '0',
		  (data & bmOV) ? '1' : '0', (data & bmP ) ? '1' : '0'
		  );
  /* show stack pointer */
  if (sfr->get (ACON) & 0x04)
    /* SA: 10 bit stack */
    con->dd_printf ("SP10 0x%03x %3d\n",
		    (sfr->get (ESP) & 3) * 256 + sfr->get (SP),
		    get_mem (MEM_IXRAM, (sfr->get (ESP) & 3) * 256 + sfr->get (SP))
		    );
  else
    con->dd_printf ("SP 0x%02x %3d\n",
		    sfr->get (SP),
		    iram->get (sfr->get (SP))
		    );
  print_disass (PC, con);
}
/* End of s51.src/uc390.cc */