z80.txt

Small Device C Compiler 面向Inter8051

|[ 5b | 091 ] |   LD   E,E      |   +LD   E,E       |    BIT   3,E     |    LD    DE,(nn) |   *BIT   3,(IX+d)       |
|[ 5c | 092 ] |   LD   E,H      |   *LD   E,IXh     |    BIT   3,H     |   *NEG           |   *BIT   3,(IX+d)       |
|[ 5d | 093 ] |   LD   E,L      |   *LD   E,IXl     |    BIT   3,L     |   *RETI          |   *BIT   3,(IX+d)       |
|[ 5e | 094 ] |   LD   E,(HL)   |    LD   E,(IX+d)  |    BIT   3,(HL)  |    IM    2       |    BIT   3,(IX+d)       |
|[ 5f | 095 ] |   LD   E,A      |   +LD   E,A       |    BIT   3,A     |    LD    A,R     |   *BIT   3,(IX+d)       |
|[ 60 | 096 ] |   LD   H,B      |   *LD   IXh,B     |    BIT   4,B     |    IN    H,(C)   |   *BIT   4,(IX+d)       |
|[ 61 | 097 ] |   LD   H,C      |   *LD   IXh,C     |    BIT   4,C     |    OUT   (C),H   |   *BIT   4,(IX+d)       |
|[ 62 | 098 ] |   LD   H,D      |   *LD   IXh,D     |    BIT   4,D     |    SBC   HL,HL   |   *BIT   4,(IX+d)       |
|[ 63 | 099 ] |   LD   H,E      |   *LD   IXh,E     |    BIT   4,E     |    LD    (nn),HL |   *BIT   4,(IX+d)       |
|[ 64 | 100 ] |   LD   H,H      |   *LD   IXh,IXh   |    BIT   4,H     |   *NEG           |   *BIT   4,(IX+d)       |
|[ 65 | 101 ] |   LD   H,L      |   *LD   IXh,IXl   |    BIT   4,L     |   *RETN          |   *BIT   4,(IX+d)       |
|[ 66 | 102 ] |   LD   H,(HL)   |    LD   H,(IX+d)  |    BIT   4,(HL)  |   *IM    0       |    BIT   4,(IX+d)       |
|[ 67 | 103 ] |   LD   H,A      |   *LD   IXh,A     |    BIT   4,A     |    RRD           |   *BIT   4,(IX+d)       |
|[ 68 | 104 ] |   LD   L,B      |   *LD   IXl,B     |    BIT   5,B     |    IN    L,(C)   |   *BIT   5,(IX+d)       |
|[ 69 | 105 ] |   LD   L,C      |   *LD   IXl,C     |    BIT   5,C     |    OUT   (C),L   |   *BIT   5,(IX+d)       |
|[ 6a | 106 ] |   LD   L,D      |   *LD   IXl,D     |    BIT   5,D     |    ADC   HL,HL   |   *BIT   5,(IX+d)       |
|[ 6b | 107 ] |   LD   L,E      |   *LD   IXl,E     |    BIT   5,E     |    LD    HL,(nn) |   *BIT   5,(IX+d)       |
|[ 6c | 108 ] |   LD   L,H      |   *LD   IXl,IXh   |    BIT   5,H     |   *NEG           |   *BIT   5,(IX+d)       |
|[ 6d | 109 ] |   LD   L,L      |   *LD   IXl,IXl   |    BIT   5,L     |   *RETI          |   *BIT   5,(IX+d)       |
|[ 6e | 110 ] |   LD   L,(HL)   |    LD   L,(IX+d)  |    BIT   5,(HL)  |   *IM    * (0?)  |    BIT   5,(IX+d)       |
|[ 6f | 111 ] |   LD   L,A      |   *LD   IXl,A     |    BIT   5,A     |    RLD           |   *BIT   5,(IX+d)       |
|[ 70 | 112 ] |   LD   (HL),B   |    LD   (IX+d),B  |    BIT   6,B     |   *IN    X,(C)   |   *BIT   6,(IX+d)       |
|[ 71 | 113 ] |   LD   (HL),C   |    LD   (IX+d),C  |    BIT   6,C     |   *OUT   (C),X(0)|   *BIT   6,(IX+d)       |
|[ 72 | 114 ] |   LD   (HL),D   |    LD   (IX+d),D  |    BIT   6,D     |    SBC   HL,SP   |   *BIT   6,(IX+d)       |
|[ 73 | 115 ] |   LD   (HL),E   |    LD   (IX+d),E  |    BIT   6,E     |    LD    (nn),SP |   *BIT   6,(IX+d)       |
|[ 74 | 116 ] |   LD   (HL),H   |    LD   (IX+d),H  |    BIT   6,H     |   *NEG           |   *BIT   6,(IX+d)       |
|[ 75 | 117 ] |   LD   (HL),L   |    LD   (IX+d),L  |    BIT   6,L     |   *RETN          |   *BIT   6,(IX+d)       |
|[ 76 | 118 ] |   HALT          |   +HALT           |    BIT   6,(HL)  |   *IM    1       |    BIT   6,(IX+d)       |
|[ 77 | 119 ] |   LD   (HL),A   |    LD   (IX+d),A  |    BIT   6,A     |   *NOP           |   *BIT   6,(IX+d)       |
|[ 78 | 120 ] |   LD   A,B      |   +LD   A,B       |    BIT   7,B     |    IN    A,(C)   |   *BIT   7,(IX+d)       |
|[ 79 | 121 ] |   LD   A,C      |   +LD   A,C       |    BIT   7,C     |    OUT   (C),A   |   *BIT   7,(IX+d)       |
|[ 7a | 122 ] |   LD   A,D      |   +LD   A,D       |    BIT   7,D     |    ADC   HL,SP   |   *BIT   7,(IX+d)       |
|[ 7b | 123 ] |   LD   A,E      |   +LD   A,E       |    BIT   7,E     |    LD    SP,(nn) |   *BIT   7,(IX+d)       |
|[ 7c | 124 ] |   LD   A,H      |   *LD   A,IXh     |    BIT   7,H     |   *NEG           |   *BIT   7,(IX+d)       |
|[ 7d | 125 ] |   LD   A,L      |   *LD   A,IXl     |    BIT   7,L     |   *RETI          |   *BIT   7,(IX+d)       |
|[ 7e | 126 ] |   LD   A,(HL)   |    LD   A,(IX+d)  |    BIT   7,(HL)  |   *IM    2       |    BIT   7,(IX+d)       |
|[ 7f | 127 ] |   LD   A,A      |   +LD   A,A       |    BIT   7,A     |   *NOP           |   *BIT   7,(IX+d)       |
|[ 80 | 128 ] |   ADD  A,B      |   +ADD  A,B       |    RES   0,B     |   *NOP           |   *LD    B,RES 0,(IX+d) |
|[ 81 | 129 ] |   ADD  A,C      |   +ADD  A,C       |    RES   0,C     |   *NOP           |   *LD    C,RES 0,(IX+d) |
|[ 82 | 130 ] |   ADD  A,D      |   +ADD  A,D       |    RES   0,D     |   *NOP           |   *LD    D,RES 0,(IX+d) |
|[ 83 | 131 ] |   ADD  A,E      |   +ADD  A,E       |    RES   0,E     |   *NOP           |   *LD    E,RES 0,(IX+d) |
|[ 84 | 132 ] |   ADD  A,H      |   *ADD  A,IXh     |    RES   0,H     |   *NOP           |   *LD    H,RES 0,(IX+d) |
|[ 85 | 133 ] |   ADD  A,L      |   *ADD  A,IXl     |    RES   0,L     |   *NOP           |   *LD    L,RES 0,(IX+d) |
|[ 86 | 134 ] |   ADD  A,(HL)   |    ADD  A,(IX+d)  |    RES   0,(HL)  |   *NOP           |    RES   0,(IX+d)       |
|[ 87 | 135 ] |   ADD  A,A      |   +ADD  A,A       |    RES   0,A     |   *NOP           |   *LD    A,RES 0,(IX+d) |
|[ 88 | 136 ] |   ADC  A,B      |   +ADC  A,B       |    RES   1,B     |   *NOP           |   *LD    B,RES 1,(IX+d) |
|[ 89 | 137 ] |   ADC  A,C      |   +ADC  A,C       |    RES   1,C     |   *NOP           |   *LD    C,RES 1,(IX+d) |
|[ 8a | 138 ] |   ADC  A,D      |   +ADC  A,D       |    RES   1,D     |   *NOP           |   *LD    D,RES 1,(IX+d) |
|[ 8b | 139 ] |   ADC  A,E      |   +ADC  A,E       |    RES   1,E     |   *NOP           |   *LD    E,RES 1,(IX+d) |
|[ 8c | 140 ] |   ADC  A,H      |   *ADC  A,IXh     |    RES   1,H     |   *NOP           |   *LD    H,RES 1,(IX+d) |
|[ 8d | 141 ] |   ADC  A,L      |   *ADC  A,IXl     |    RES   1,L     |   *NOP           |   *LD    L,RES 1,(IX+d) |
|[ 8e | 142 ] |   ADC  A,(HL)   |    ADC  A,(IX+d)  |    RES   1,(HL)  |   *NOP           |    RES   1,(IX+d)       |
|[ 8f | 143 ] |   ADC  A,A      |   +ADC  A,A       |    RES   1,A     |   *NOP           |   *LD    A,RES 1,(IX+d) |
|[ 90 | 144 ] |   SUB  B        |   +SUB  B         |    RES   2,B     |   *NOP           |   *LD    B,RES 2,(IX+d) |
|[ 91 | 145 ] |   SUB  C        |   +SUB  C         |    RES   2,C     |   *NOP           |   *LD    C,RES 2,(IX+d) |
|[ 92 | 146 ] |   SUB  D        |   +SUB  D         |    RES   2,D     |   *NOP           |   *LD    D,RES 2,(IX+d) |
|[ 93 | 147 ] |   SUB  E        |   +SUB  E         |    RES   2,E     |   *NOP           |   *LD    E,RES 2,(IX+d) |
|[ 94 | 148 ] |   SUB  H        |   *SUB  IXh       |    RES   2,H     |   *NOP           |   *LD    H,RES 2,(IX+d) |
|[ 95 | 149 ] |   SUB  L        |   *SUB  IXl       |    RES   2,L     |   *NOP           |   *LD    L,RES 2,(IX+d) |
|[ 96 | 150 ] |   SUB  (HL)     |    SUB  (IX+d)    |    RES   2,(HL)  |   *NOP           |    RES   2,(IX+d)       |
|[ 97 | 151 ] |   SUB  A        |   +SUB  A         |    RES   2,A     |   *NOP           |   *LD    A,RES 2,(IX+d) |
|[ 98 | 152 ] |   SBC  A,B      |   +SBC  A,B       |    RES   3,B     |   *NOP           |   *LD    B,RES 3,(IX+d) |
|[ 99 | 153 ] |   SBC  A,C      |   +SBC  A,C       |    RES   3,C     |   *NOP           |   *LD    C,RES 3,(IX+d) |
|[ 9a | 154 ] |   SBC  A,D      |   +SBC  A,D       |    RES   3,D     |   *NOP           |   *LD    D,RES 3,(IX+d) |
|[ 9b | 155 ] |   SBC  A,E      |   +SBC  A,E       |    RES   3,E     |   *NOP           |   *LD    E,RES 3,(IX+d) |
|[ 9c | 156 ] |   SBC  A,H      |   *SBC  A,IXh     |    RES   3,H     |   *NOP           |   *LD    H,RES 3,(IX+d) |
|[ 9d | 157 ] |   SBC  A,L      |   *SBC  A,IXl     |    RES   3,L     |   *NOP           |   *LD    L,RES 3,(IX+d) |
|[ 9e | 158 ] |   SBC  A,(HL)   |    SBC  A,(IX+d)  |    RES   3,(HL)  |   *NOP           |    RES   3,(IX+d)       |
|[ 9f | 159 ] |   SBC  A,A      |   +SBC  A,A       |    RES   3,A     |   *NOP           |   *LD    A,RES 3,(IX+d) |
|[ a0 | 160 ] |   AND  B        |   +AND  B         |    RES   4,B     |    LDI           |   *LD    B,RES 4,(IX+d) |
|[ a1 | 161 ] |   AND  C        |   +AND  C         |    RES   4,C     |    CPI           |   *LD    C,RES 4,(IX+d) |
|[ a2 | 162 ] |   AND  D        |   +AND  D         |    RES   4,D     |    INI           |   *LD    D,RES 4,(IX+d) |
|[ a3 | 163 ] |   AND  E        |   +AND  E         |    RES   4,E     |    OUTI          |   *LD    E,RES 4,(IX+d) |
|[ a4 | 164 ] |   AND  H        |   *AND  IXh       |    RES   4,H     |   *NOP           |   *LD    H,RES 4,(IX+d) |
|[ a5 | 165 ] |   AND  L        |   *AND  IXl       |    RES   4,L     |   *NOP           |   *LD    L,RES 4,(IX+d) |
|[ a6 | 166 ] |   AND  (HL)     |    AND  (IX+d)    |    RES   4,(HL)  |   *NOP           |    RES   4,(IX+d)       |
|[ a7 | 167 ] |   AND  A        |   +AND  A         |    RES   4,A     |   *NOP           |   *LD    A,RES 4,(IX+d) |
|[ a8 | 168 ] |   XOR  B        |   +XOR  B         |    RES   5,B     |    LDD           |   *LD    B,RES 5,(IX+d) |
|[ a9 | 169 ] |   XOR  C        |   +XOR  C         |    RES   5,C     |    CPD           |   *LD    C,RES 5,(IX+d) |
|[ aa | 170 ] |   XOR  D        |   +XOR  D         |    RES   5,D     |    IND           |   *LD    D,RES 5,(IX+d) |
|[ ab | 171 ] |   XOR  E        |   +XOR  E         |    RES   5,E     |    OUTD          |   *LD    E,RES 5,(IX+d) |
|[ ac | 172 ] |   XOR  H        |   *XOR  IXh       |    RES   5,H     |   *NOP           |   *LD    H,RES 5,(IX+d) |
|[ ad | 173 ] |   XOR  L        |   *XOR  IXl       |    RES   5,L     |   *NOP           |   *LD    L,RES 5,(IX+d) |
|[ ae | 174 ] |   XOR  (HL)     |    XOR  (IX+d)    |    RES   5,(HL)  |   *NOP           |    RES   5,(IX+d)       |
|[ af | 175 ] |   XOR  A        |   +XOR  A         |    RES   5,A     |   *NOP           |   *LD    A,RES 5,(IX+d) |
|[ b0 | 176 ] |   OR   B        |   +OR   B         |    RES   6,B     |    LDIR          |   *LD    B,RES 6,(IX+d) |
|[ b1 | 177 ] |   OR   C        |   +OR   C         |    RES   6,C     |    CPIR          |   *LD    C,RES 6,(IX+d) |
|[ b2 | 178 ] |   OR   D        |   +OR   D         |    RES   6,D     |    INIR          |   *LD    D,RES 6,(IX+d) |
|[ b3 | 179 ] |   OR   E        |   +OR   E         |    RES   6,E     |    OTIR          |   *LD    E,RES 6,(IX+d) |
|[ b4 | 180 ] |   OR   H        |   *OR   IXh       |    RES   6,H     |   *NOP           |   *LD    H,RES 6,(IX+d) |
|[ b5 | 181 ] |   OR   L        |   *OR   IXl       |    RES   6,L     |   *NOP           |   *LD    L,RES 6,(IX+d) |
|[ b6 | 182 ] |   OR   (HL)     |    OR   (IX+d)    |    RES   6,(HL)  |   *NOP           |    RES   6,(IX+d)       |
|[ b7 | 183 ] |   OR   A        |   +OR   A         |    RES   6,A     |   *NOP           |   *LD    A,RES 6,(IX+d) |
|[ b8 | 184 ] |   CP   B        |   +CP   B         |    RES   7,B     |    LDDR          |   *LD    B,RES 7,(IX+d) |
|[ b9 | 185 ] |   CP   C        |   +CP   C         |    RES   7,C     |    CPDR          |   *LD    C,RES 7,(IX+d) |
|[ ba | 186 ] |   CP   D        |   +CP   D         |    RES   7,D     |    INDR          |   *LD    D,RES 7,(IX+d) |
|[ bb | 187 ] |   CP   E        |   +CP   E         |    RES   7,E     |    OTDR          |   *LD    E,RES 7,(IX+d) |
|[ bc | 188 ] |   CP   H        |   *CP   IXh       |    RES   7,H     |   *NOP           |   *LD    H,RES 7,(IX+d) |
|[ bd | 189 ] |   CP   L        |   *CP   IXl       |    RES   7,L     |   *NOP           |   *LD    L,RES 7,(IX+d) |
|[ be | 190 ] |   CP   (HL)     |    CP   (IX+d)    |    RES   7,(HL)  |   *NOP           |    RES   7,(IX+d)       |
|[ bf | 191 ] |   CP   A        |   +CP   A         |    RES   7,A     |   *NOP           |   *LD    A,RES 7,(IX+d) |
|[ c0 | 192 ] |   RET  NZ       |   +RET  NZ        |    SET   0,B     |   *NOP           |   *LD    B,SET 0,(IX+d) |
|[ c1 | 193 ] |   POP  BC       |   +POP  BC        |    SET   0,C     |   *NOP           |   *LD    C,SET 0,(IX+d) |
|[ c2 | 194 ] |   JP   NZ,nn    |   +JP   NZ,nn     |    SET   0,D     |   *NOP           |   *LD    D,SET 0,(IX+d) |
|[ c3 | 195 ] |   JP   nn       |   +JP   nn        |    SET   0,E     |   *NOP           |   *LD    E,SET 0,(IX+d) |
|[ c4 | 196 ] |   CALL NZ,nn    |   +CALL NZ,nn     |    SET   0,H     |   *NOP           |   *LD    H,SET 0,(IX+d) |
|[ c5 | 197 ] |   PUSH BC       |   +PUSH BC        |    SET   0,L     |   *NOP           |   *LD    L,SET 0,(IX+d) |
|[ c6 | 198 ] |   ADD  A,n      |   +ADD  A,n       |    SET   0,(HL)  |   *NOP           |    SET   0,(IX+d)       |
|[ c7 | 199 ] |   RST  0        |   +RST  0         |    SET   0,A     |   *NOP           |   *LD    A,SET 0,(IX+d) |
|[ c8 | 100 ] |   RET  Z        |   +RET  Z         |    SET   1,B     |   *NOP           |   *LD    B,SET 1,(IX+d) |
|[ c9 | 201 ] |   RET           |   +RET            |    SET   1,C     |   *NOP           |   *LD    C,SET 1,(IX+d) |
|[ ca | 202 ] |   JP   Z,nn     |   +JP   Z,nn      |    SET   1,D     |   *NOP           |   *LD    D,SET 1,(IX+d) |
|[ cb | 203 ] |   [Prefix]      |   *[See DDCB info]|    SET   1,E     |   *NOP           |   *LD    E,SET 1,(IX+d) |
|[ cc | 204 ] |   CALL Z,nn     |   +CALL Z,nn      |    SET   1,H     |   *NOP           |   *LD    H,SET 1,(IX+d) |
|[ cd | 205 ] |   CALL nn       |   +CALL nn        |    SET   1,L     |   *NOP           |   *LD    L,SET 1,(IX+d) |
|[ ce | 206 ] |   ADC  A,n      |   +ADC  A,n       |    SET   1,(HL)  |   *NOP           |    SET   1,(IX+d)       |
|[ cf | 207 ] |   RST  8        |   +RST  8         |    SET   1,A     |   *NOP           |   *LD    A,SET 1,(IX+d) |
|[ d0 | 208 ] |   RET  NC       |   +RET  NC        |    SET   2,B     |   *NOP           |   *LD    B,SET 2,(IX+d) |
|[ d1 | 209 ] |   POP  DE       |   +POP  DE        |    SET   2,C     |   *NOP           |   *LD    C,SET 2,(IX+d) |
|[ d2 | 210 ] |   JP   NC,nn    |   +JP   NC,nn     |    SET   2,D     |   *NOP           |   *LD    D,SET 2,(IX+d) |
|[ d3 | 211 ] |   OUT  (n),A    |   +OUT  (n),A     |    SET   2,E     |   *NOP           |   *LD    E,SET 2,(IX+d) |
|[ d4 | 212 ] |   CALL NC,nn    |   +CALL NC,nn     |    SET   2,H     |   *NOP           |   *LD    H,SET 2,(IX+d) |
|[ d5 | 213 ] |   PUSH DE       |   +PUSH DE        |    SET   2,L     |   *NOP           |   *LD    L,SET 2,(IX+d) |
|[ d6 | 214 ] |   SUB  n        |   +SUB  n         |    SET   2,(HL)  |   *NOP           |    SET   2,(IX+d)       |
|[ d7 | 215 ] |   RST  10H      |   +RST  10H       |    SET   2,A     |   *NOP           |   *LD    A,SET 2,(IX+d) |
|[ d8 | 216 ] |   RET  C        |   +RET  C         |    SET   3,B     |   *NOP           |   *LD    B,SET 3,(IX+d) |
|[ d9 | 217 ] |   EXX           |   +EXX            |    SET   3,C     |   *NOP           |   *LD    C,SET 3,(IX+d) |
|[ da | 218 ] |   JP   C,nn     |   +JP   C,nn      |    SET   3,D     |   *NOP           |   *LD    D,SET 3,(IX+d) |
|[ db | 219 ] |   IN   A,(n)    |   +IN   A,(n)     |    SET   3,E     |   *NOP           |   *LD    E,SET 3,(IX+d) |
|[ dc | 220 ] |   CALL C,nn     |   +CALL C,nn      |    SET   3,H     |   *NOP           |   *LD    H,SET 3,(IX+d) |
|[ dd | 221 ] |   [IX Prefix]   |   +[IX Prefix]    |    SET   3,L     |   *NOP           |   *LD    L,SET 3,(IX+d) |
|[ de | 222 ] |   SBC  A,n      |   +SBC  A,n       |    SET   3,(HL)  |   *NOP           |    SET   3,(IX+d)       |
|[ df | 223 ] |   RST  18H      |   +RST  18H       |    SET   3,A     |   *NOP           |   *LD    A,SET 3,(IX+d) |
|[ e0 | 224 ] |   RET  PO       |   +RET  PO        |    SET   4,B     |   *NOP           |   *LD    B,SET 4,(IX+d) |
|[ e1 | 225 ] |   POP  HL       |    POP  IX        |    SET   4,C     |   *NOP           |   *LD    C,SET 4,(IX+d) |
|[ e2 | 226 ] |   JP   PO,nn    |   +JP   PO,nn     |    SET   4,D     |   *NOP           |   *LD    D,SET 4,(IX+d) |
|[ e3 | 227 ] |   EX   (SP),HL  |    EX   (SP),IX   |    SET   4,E     |   *NOP           |   *LD    E,SET 4,(IX+d) |
|[ e4 | 228 ] |   CALL PO,nn    |   +CALL PO,nn     |    SET   4,H     |   *NOP           |   *LD    H,SET 4,(IX+d) |
|[ e5 | 229 ] |   PUSH HL       |    PUSH IX        |    SET   4,L     |   *NOP           |   *LD    L,SET 4,(IX+d) |
|[ e6 | 230 ] |   AND  n        |   +AND  n         |    SET   4,(HL)  |   *NOP           |    SET   4,(IX+d)       |
|[ e7 | 231 ] |   RST  20H      |   +RST  20H       |    SET   4,A     |   *NOP           |   *LD    A,SET 4,(IX+d) |
|[ e8 | 232 ] |   RET  PE       |   +RET  PE        |    SET   5,B     |   *NOP           |   *LD    B,SET 5,(IX+d) |
|[ e9 | 233 ] |   JP   (HL)     |    JP   (IX)      |    SET   5,C     |   *NOP           |   *LD    C,SET 5,(IX+d) |
|[ ea | 234 ] |   JP   PE,nn    |   +JP   PE,nn     |    SET   5,D     |   *NOP           |   *LD    D,SET 5,(IX+d) |
|[ eb | 235 ] |   EX   DE,HL    |   +EX   DE,HL     |    SET   5,E     |   *NOP           |   *LD    E,SET 5,(IX+d) |
|[ ec | 236 ] |   CALL PE,nn    |   +CALL PE,nn     |    SET   5,H     |   *NOP           |   *LD    H,SET 5,(IX+d) |
|[ ed | 237 ] |   [Prefix]      |   +[Prefix]       |    SET   5,L     |   *NOP           |   *LD    L,SET 5,(IX+d) |
|[ ee | 238 ] |   XOR  n        |   +XOR  n         |    SET   5,(HL)  |   *NOP           |    SET   5,(IX+d)       |
|[ ef | 239 ] |   RST  28H      |   +RST  28H       |    SET   5,A     |   *NOP           |   *LD    A,SET 5,(IX+d) |
|[ f0 | 240 ] |   RET  P        |   +RET  P         |    SET   6,B     |   *NOP           |   *LD    B,SET 6,(IX+d) |
|[ f1 | 241 ] |   POP  AF       |   +POP  AF        |    SET   6,C     |   *NOP           |   *LD    C,SET 6,(IX+d) |
|[ f2 | 242 ] |   JP   P,nn     |   +JP   P,nn      |    SET   6,D     |   *NOP           |   *LD    D,SET 6,(IX+d) |
|[ f3 | 243 ] |   DI            |   +DI             |    SET   6,E     |   *NOP           |   *LD    E,SET 6,(IX+d) |
|[ f4 | 244 ] |   CALL P,nn     |   +CALL P,nn      |    SET   6,H     |   *NOP           |   *LD    H,SET 6,(IX+d) |
|[ f5 | 245 ] |   PUSH AF       |   +PUSH AF        |    SET   6,L     |   *NOP           |   *LD    L,SET 6,(IX+d) |
|[ f6 | 246 ] |   OR   n        |   +OR   n         |    SET   6,(HL)  |   *NOP           |    SET   6,(IX+d)       |
|[ f7 | 247 ] |   RST  30H      |   +RST  30H       |    SET   6,A     |   *NOP           |   *LD    A,SET 6,(IX+d) |
|[ f8 | 248 ] |   RET  M        |   +RET  M         |    SET   7,B     |   *NOP           |   *LD    B,SET 7,(IX+d) |
|[ f9 | 249 ] |   LD   SP,HL    |    LD   SP,IX     |    SET   7,C     |   *NOP           |   *LD    C,SET 7,(IX+d) |
|[ fa | 250 ] |   JP   M,nn     |   +JP   M,nn      |    SET   7,D     |   *NOP           |   *LD    D,SET 7,(IX+d) |
|[ fb | 251 ] |   EI            |   +EI             |    SET   7,E     |   *NOP           |   *LD    E,SET 7,(IX+d) |
|[ fc | 252 ] |   CALL M,nn     |   +CALL M,nn      |    SET   7,H     |   *NOP           |   *LD    H,SET 7,(IX+d) |
|[ fd | 253 ] |   [IY Prefix]   |   +[IY Prefix]    |    SET   7,L     |   *NOP           |   *LD    L,SET 7,(IX+d) |
|[ fe | 254 ] |   CP   n        |   +CP   n         |    SET   7,(HL)  |   *NOP           |    SET   7,(IX+d)       |
|[ ff | 255 ] |   RST  38H      |   +RST  38H       |    SET   7,A     |   *NOP           |   *LD    A,SET 7,(IX+d) |
+-------------+-----------------+-------------------+------------------+------------------+-------------------------+
--
Peter McGavin.   ([e-mail])

From: [e-mail] (Arnt Gulbrandsen)
Newsgroups: comp.sys.sinclair
Subject: Re: Undocumented Z80 opcodes
Date: 6 Jan 1994 13:31:44 +0100
Organization: University of Trondheim, Norway
NNTP-Posting-Host: tigern.nvg.unit.no

In article <[e-mail]>,
Peter McGavin <[e-mail]> wrote:
>In article, <2geqvv$[e-mail]>,
>[e-mail] (Arnt Gulbrandsen) wrote:
>>I believe that list originally was written by from David Librik
>><[e-mail]>.  David (with someone else, I think)
>>reverse-engineered the Z80 and wrote a list of what he found, a list
>>which I think I sent to Peter.
>
>Actually I got it from Simon Owen ([e-mail]).
>
>Here it is:  (sorry it's a bit wide)

Not the same.  Here's the big one.

--Arnt

Date: Fri, 19 Nov 1993 00:40:23 -0800
From: David Librik <[e-mail]>
Message-Id: <[e-mail]>
Subject: Undocumented Z-80 Instructions


Here is my article on undocumented Z-80 instructions.  Please go over
your data and add anything you can to this list, and send it back to me.
Thanks!

- David Librik
[e-mail]

          ------------------

There's been some discussion about the so-called "undocumented" opcodes
of the Z-80 microprocessor.  These are officially-undefined machine-
language instructions that often have powerful and useful effects;
they are so often used by Z-80 system programmers that they are de-facto
"documented".  Here is an article I posted a few years ago on another
computer system.

By the way, the reason these instructions exist even though they were
not part of the original CPU design: the Z-80 was the most complex
microprocessor ever to be completely hard-wired (no microcode).  As a
result -- as anyone who's ever taken a logic design course can tell
you -- it's much easier to have "undefined states" do whatever-comes-
easiest.

* 2/28/88  2:37 pm   librik / pega / cerl *

The undocumented Z80 opcodes.  While Zilog claims that
these should not be "trusted", I have yet to hear of a
Z80 that does not support them; and at least one operating
system uses them.

* HX and LX instructions.  These instructions manipulate
  the high- and low-order 8 bits of the sixteen bit IX and
  IY registers.  (Here, I give the opcodes for HX and LX,
  to get HY and LY, use FD instead of DD in the opcodes.)

* SLL.  This instruction shifts an 8-bit quantity left
  (logical), then inserts 1 into the low-order bit.

* Shift/Bit Set/Bit Reset with autocopy.  These instructions
  perform bit shifts (RLC, RRC, RL, RR, SLA, SRA, SLL, SRL),
  bit set (SET) and bit reset (RES) operations on (IX+jj)
  [and (IY+jj)], but also automatically copy the result
  into an 8-bit register.

* Null port accesses.  IN and OUT without data.

dd24    inc hx     dd62    ld hx,d    dd8c    adc a,hx
dd25    dec hx     dd63    ld hx,e    dd8d    adc a,lx
dd26nn  ld hx,nn   dd64    ld hx,hx   dd94    sub hx
dd2c    inc lx     dd65    ld hx,lx   dd95    sub lx
dd2d    dec lx     dd67    ld hx,a    dd9c    sbc a,hx
dd2enn  ld lx,nn   dd68    ld lx,b    dd9d    sbc a,lx
dd44    ld b,hx    dd69    ld lx,c    dda4    and hx
dd45    ld b,lx    dd6a    ld lx,d    dda5    and lx
dd4c    ld c,hx    dd6b    ld lx,e    ddac    xor hx
dd4d    ld c,lx    dd6c    ld lx,hx   ddad    xor lx
dd54    ld d,hx    dd6d    ld lx,lx   ddb4    or hx
dd55    ld d,lx    dd6f    ld lx,a    ddb5    or lx
dd5c    ld e,hx    dd7c    ld a,hx    ddbc    cp hx
dd5d    ld e,lx    dd7d    ld a,lx    ddbd    cp lx
dd60    ld hx,b    dd84    add a,hx
dd61    ld hx,c    dd85    add a,lx

The corresponding instructions for HY and LY may be obtained
by using FD in place of DD.

cb30    sll b                   cb34    sll h
cb31    sll c                   cb35    sll l
cb32    sll d                   cb36    sll (hl)
cb33    sll e                   cb37    sll a

* The following instructions perform the indicated operation
* on (ix+jj) and copy results into register 'r' (see below).
ddcbjj00-ddcbjj07       rlc r,(ix+jj)
ddcbjj08-ddcbjj0f       rrc r,(ix+jj)
ddcbjj10-ddcbjj17       rl r,(ix+jj)
ddcbjj18-ddcbjj1f       rr r,(ix+jj)
ddcbjj20-ddcbjj27       sla r,(ix+jj)
ddcbjj28-ddcbjj2f       sra r,(ix+jj)
ddcbjj30-ddcbjj37       sll r,(ix+jj)
ddcbjj38-ddcbjj3f       srl r,(ix+jj)

ddcbjj80-ddcbjj87       res r,0,(ix+jj)
ddcbjj88-ddcbjj8f       res r,1,(ix+jj)
ddcbjj90-ddcbjj97       res r,2,(ix+jj)
ddcbjj98-ddcbjj9f       res r,3,(ix+jj)
ddcbjja0-ddcbjja7       res r,4,(ix+jj)
ddcbjja8-ddcbjjaf       res r,5,(ix+jj)
ddcbjjb0-ddcbjjb7       res r,6,(ix+jj)
ddcbjjb8-ddcbjjbf       res r,7,(ix+jj)

ddcbjjc0-ddcbjjc7       set r,0,(ix+jj)
ddcbjjc8-ddcbjjcf       set r,1,(ix+jj)
ddcbjjd0-ddcbjjd7       set r,2,(ix+jj)
ddcbjjd8-ddcbjjdf       set r,3,(ix+jj)
ddcbjje0-ddcbjje7       set r,4,(ix+jj)
ddcbjje8-ddcbjjef       set r,5,(ix+jj)
ddcbjjf0-ddcbjjf7       set r,6,(ix+jj)
ddcbjjf8-ddcbjjff       set r,7,(ix+jj)

In the last 3 tables, the corresponding instructions for
(IY+jj) may be obtained by using FD in place of DD.

The value for 'r' is determined as follows:
        Last digit of opcode:           register 'r':
              0 or 8                         B
              1 or 9                         C
              2 or A                         D
              3 or B                         E
              4 or C                         H
              5 or D                         L
              6 or E                    (no effect)
              7 or F                         A

*
ed70    in --,(c)
* gets input from port stored in (c), but does not store it.
* another reference claims this is: in (hl),(c) but I see no
* evidence for that, other than symmetry.
*
ed71    out (c),--
* seems to send a 00 to port stored in (c).
* the same reference as as above calls this: out (hl),(c).

A full article on this material is available upon request.
This information from NORTHERN BYTES, volume 5 number 8.

	--------

In addition to the information in the above article, I should mention
for completeness' sake all the other undefined opcodes and their
(generally redundant) effects.  I shall list the ordinary Z-80
instructions which they mimic.

ed63nnnn					ld (nnnn),hl
ed6bnnnn					ld hl,(nnnn)
ed4c, ed54, ed5c, ed64, ed6c, ed74, ed7c	neg
      ed55, ed5d, ed65, ed6d, ed75, ed7d	retn

The following are no-ops:

ed80-9f, eda4-a7, edac-af, edb4-b7, edbc-bf, ed00-3f, edc0-ff,
ed4e, ed66, ed6e, ed76, ed77, ed7e, ed7f

Additional information from NANOS' Reference Card for the Z-80 microprocessor.

David Librik
librik/pega/nova (on PLATO/NovaNET)