📄 z80.txt
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DD CB dd B3 / RES 6,(IX+dd)->EDD CB dd B4 / RES 6,(IX+dd)->HDD CB dd B5 / RES 6,(IX+dd)->LDD CB dd B6 * RES 6,(IX+dd)DD CB dd B7 / RES 6,(IX+dd)->ADD CB dd B8 / RES 7,(IX+dd)->BDD CB dd B9 / RES 7,(IX+dd)->CDD CB dd BA / RES 7,(IX+dd)->DDD CB dd BB / RES 7,(IX+dd)->EDD CB dd BC / RES 7,(IX+dd)->HDD CB dd BD / RES 7,(IX+dd)->LDD CB dd BE * RES 7,(IX+dd)DD CB dd BF / RES 7,(IX+dd)->ADD CB dd C0 / SET 0,(IX+dd)->BDD CB dd C1 / SET 0,(IX+dd)->CDD CB dd C2 / SET 0,(IX+dd)->DDD CB dd C3 / SET 0,(IX+dd)->EDD CB dd C4 / SET 0,(IX+dd)->HDD CB dd C5 / SET 0,(IX+dd)->LDD CB dd C6 * SET 0,(IX+dd)DD CB dd C7 / SET 0,(IX+dd)->ADD CB dd C8 / SET 1,(IX+dd)->BDD CB dd C9 / SET 1,(IX+dd)->CDD CB dd CA / SET 1,(IX+dd)->DDD CB dd CB / SET 1,(IX+dd)->EDD CB dd CC / SET 1,(IX+dd)->HDD CB dd CD / SET 1,(IX+dd)->LDD CB dd CE * SET 1,(IX+dd)DD CB dd CF / SET 1,(IX+dd)->ADD CB dd D0 / SET 2,(IX+dd)->BDD CB dd D1 / SET 2,(IX+dd)->CDD CB dd D2 / SET 2,(IX+dd)->DDD CB dd D3 / SET 2,(IX+dd)->EDD CB dd D4 / SET 2,(IX+dd)->HDD CB dd D5 / SET 2,(IX+dd)->LDD CB dd D6 * SET 2,(IX+dd)DD CB dd D7 / SET 2,(IX+dd)->ADD CB dd D8 / SET 3,(IX+dd)->BDD CB dd D9 / SET 3,(IX+dd)->CDD CB dd DA / SET 3,(IX+dd)->DDD CB dd DB / SET 3,(IX+dd)->EDD CB dd DC / SET 3,(IX+dd)->HDD CB dd DD / SET 3,(IX+dd)->LDD CB dd DE * SET 3,(IX+dd)DD CB dd DF / SET 3,(IX+dd)->ADD CB dd E0 / SET 4,(IX+dd)->BDD CB dd E1 / SET 4,(IX+dd)->CDD CB dd E2 / SET 4,(IX+dd)->DDD CB dd E3 / SET 4,(IX+dd)->EDD CB dd E4 / SET 4,(IX+dd)->HDD CB dd E5 / SET 4,(IX+dd)->LDD CB dd E6 * SET 4,(IX+dd)DD CB dd E7 / SET 4,(IX+dd)->ADD CB dd E8 / SET 5,(IX+dd)->BDD CB dd E9 / SET 5,(IX+dd)->CDD CB dd EA / SET 5,(IX+dd)->DDD CB dd EB / SET 5,(IX+dd)->EDD CB dd EC / SET 5,(IX+dd)->HDD CB dd ED / SET 5,(IX+dd)->LDD CB dd EE * SET 5,(IX+dd)DD CB dd EF / SET 5,(IX+dd)->ADD CB dd F0 / SET 6,(IX+dd)->BDD CB dd F1 / SET 6,(IX+dd)->CDD CB dd F2 / SET 6,(IX+dd)->DDD CB dd F3 / SET 6,(IX+dd)->EDD CB dd F4 / SET 6,(IX+dd)->HDD CB dd F5 / SET 6,(IX+dd)->LDD CB dd F6 * SET 6,(IX+dd)DD CB dd F7 / SET 6,(IX+dd)->ADD CB dd F8 / SET 7,(IX+dd)->BDD CB dd F9 / SET 7,(IX+dd)->CDD CB dd FA / SET 7,(IX+dd)->DDD CB dd FB / SET 7,(IX+dd)->EDD CB dd FC / SET 7,(IX+dd)->HDD CB dd FD / SET 7,(IX+dd)->LDD CB dd FE * SET 7,(IX+dd)DD CB dd FF / SET 7,(IX+dd)->ADD E1 * POP IXDD E3 * EX (SP),IXDD E5 * PUSH IXDD E9 * JP (IX)DD F9 * LD SP,IXDE nn SBC A,nnDF RST 18HE0 RET POE1 POP HLE2 nnnn JP PO,nnnnE3 EX (SP),HLE4 nnnn CALL PO,nnnnE5 PUSH HLE6 nn AND nnE7 RST 20HE8 RET PEE9 JP (HL)EA nnnn JP PE,nnnnEB EX DE,HLEC nnnn CALL PE,nnnnAll other ED combinations not listed below: in the range ED40 - ED7F: valid opcodes are mirrored elsewhere: ED and the next byte is ignored, all following bytes treated as instructionsED 00 nn + IN0 B,(nn)ED 01 nn + OUT0 (nn),BED 04 + TST BED 08 nn + IN0 C,(nn)ED 09 nn + OUT0 (nn),CED 0C + TST CED 10 nn + IN0 D,(nn)ED 11 nn + OUT0 (nn),DED 14 + TST DED 18 nn + IN0 E,(nn)ED 19 nn + OUT0 (nn),EED 1C + TST EED 20 nn + IN0 H,(nn)ED 21 nn + OUT0 (nn),HED 24 + TST HED 28 nn + IN0 L,(nn)ED 29 nn + OUT0 (nn),LED 2C + TST LED 30 nn + IN0 (nn) set flags onlyED 34 + TST (HL)ED 38 nn + IN0 A,(nn)ED 39 nn + OUT0 (nn),AED 3C + TST AED 40 * IN B,(C)ED 41 * OUT (C),BED 42 * SBC HL,BCED 43 nnnn * LD (nnnn),BCED 44 * NEGED 45 * RETNED 46 * IM 0ED 47 * LD I,AED 48 * IN C,(C)ED 49 * OUT (C),CED 4A * ADC HL,BCED 4B nnnn * LD BC,(nnnn)ED 4C + MULT BCED 4D * RETIED 4F * LD R,AED 50 * IN D,(C)ED 51 * OUT (C),DED 52 * SBC HL,DEED 53 nnnn * LD (nnnn),DEED 56 * IM 1ED 57 * LD A,IED 58 * IN E,(C)ED 59 * OUT (C),EED 5A * ADC HL,DEED 5B nnnn * LD DE,(nnnn)ED 5C + MULT DEED 5E * IM 2ED 5F * LD A,RED 60 * IN H,(C)ED 61 * OUT (C),HED 62 * SBC HL,HLED 63 nnnn * LD (nnnn),HL opcode 22 does the same fasterED 64 nn + TST nnED 67 * RRDED 68 * IN L,(C)ED 69 * OUT (C),LED 6A * ADC HL,HLED 6B nnnn * LD HL,(nnnn) opcode 2A does the same fasterED 6C + MULT HLED 6F * RLDED 70 / IN (C) set flags only (TSTI) ^--- can be viewed as *, because SGS manual and HD64180 manual list this instruction as valid Z80ED 71 / OUT (C),0ED 72 * SBC HL,SPED 73 nnnn * LD (nnnn),SPED 74 nn + TSTIO nnED 76 + SLPED 78 * IN A,(C)ED 79 * OUT (C),AED 7A * ADC HL,SPED 7B nnnn * LD SP,(nnnn)ED 7C + MULT SPED 83 + OTIMED 8B + OTDMED 93 + OTIMRED 9B + OTDMRED A0 * LDIED A1 * CPIED A2 * INIED A3 * OUTIED A8 * LDDED A9 * CPDED AA * INDED AB * OUTDED B0 * LDIRED B1 * CPIRED B2 * INIRED B3 * OTIRED B8 * LDDRED B9 * CPDRED BA * INDRED BB * OTDREE nn XOR nnEF RST 28HF0 RET PF1 POP AFF2 nnnn JP P,nnnnF3 DIF4 nnnn CALL P,nnnnF5 PUSH AFF6 nn OR nnF7 RST 30HF8 RET MF9 LD SP,HLFA nnnn JP M,nnnnFB EIFC nnnn CALL M,nnnnFD ... * like DD ..., with IY instead of IXFE nn CP nnFF RST 38HFrom: peterm@maths.grace.cri.nz (Peter McGavin)Newsgroups: comp.sys.sinclairSubject: Re: Undocumented Z80 opcodesDate: 05 Jan 1994 20:44:15 GMTOrganization: Applied Maths, Industrial Research Ltd, NZNNTP-Posting-Host: kea.grace.cri.nzIn-reply-to: agulbra@tigern.nvg.unit.no's message of 5 Jan 1994 17:47:59 +0100In article, <2geqvv$nlq@tigern.nvg.unit.no>,agulbra@tigern.nvg.unit.no (Arnt Gulbrandsen) wrote:>I believe that list originally was written by from David Librik><librik@cory.eecs.berkeley.edu>. David (with someone else, I think)>reverse-engineered the Z80 and wrote a list of what he found, a list>which I think I sent to Peter.Actually I got it from Simon Owen (S.N.Owen@newcastle.ac.uk).Here it is: (sorry it's a bit wide)------------------------------------------------------------------------------Key: + Instruction is unchanged by index prefix * Instruction thought of as 'undocumented'Notes: IM * - is either IM 0 or IM 1 (more likely IM 0), hard to decide which IN X,(C) reads into nowhere (not even (HL)) but affects the flags. OUT (C),X performs OUT (C),0 *NOP indicated instruction has no effect on anything [ 2M cycles delay ? ] instructions with an ED prefix cannot have a preceding DD prefix as well. Instructions like LD B,RL (IX+d) perform RL (IX+d) and load B with the result AS WELL AS affecting the contents of (IX+d). 2 for price of 1 !List:+-------------------------------+-------------------+------------------+------------------+-------------------------+| Hex | Dec | Normal | DD Prefix | CB Prefix | ED Prefix | DDCB prefix |+-------------------------------+-------------------+------------------+------------------+-------------------------+|[ 00 | 000 ] | NOP | +NOP | RLC B | *NOP | *LD B,RLC (IX+d) ||[ 01 | 001 ] | LD BC,nn | +LD BC,nn | RLC C | *NOP | *LD C,RLC (IX+d) ||[ 02 | 002 ] | LD (BC),A | +LD (BC),A | RLC D | *NOP | *LD D,RLC (IX+d) ||[ 03 | 003 ] | INC BC | +INC BC | RLC E | *NOP | *LD E,RLC (IX+d) ||[ 04 | 004 ] | INC B | +INC B | RLC H | *NOP | *LD H,RLC (IX+d) ||[ 05 | 005 ] | DEC B | +DEC B | RLC L | *NOP | *LD L,RLC (IX+d) ||[ 06 | 006 ] | LD B,n | +LD B,n | RLC (HL) | *NOP | RLC (IX+d) ||[ 07 | 007 ] | RLCA | +RLCA | RLC A | *NOP | *LD A,RLC (IX+d) ||[ 08 | 008 ] | EX AF,AF' | +EX AF,AF' | RRC B | *NOP | *LD B,RRC (IX+d) ||[ 09 | 009 ] | ADD HL,BC | ADD IX,BC | RRC C | *NOP | *LD C,RRC (IX+d) ||[ 0a | 010 ] | LD A,(BC) | +LD A,(BC) | RRC D | *NOP | *LD D,RRC (IX+d) ||[ 0b | 011 ] | DEC BC | +DEC BC | RRC E | *NOP | *LD E,RRC (IX+d) ||[ 0c | 012 ] | INC C | +INC C | RRC H | *NOP | *LD H,RRC (IX+d) ||[ 0d | 013 ] | DEC C | +DEC C | RRC L | *NOP | *LD L,RRC (IX+d) ||[ 0e | 014 ] | LD C,n | +LD C,n | RRC (HL) | *NOP | RRC (IX+d) ||[ 0f | 015 ] | RRCA | +RRCA | RRC A | *NOP | *LD A,RRC (IX+d) ||[ 10 | 016 ] | DJNZ d | +DJNZ d | RL B | *NOP | *LD B,RL (IX+d) ||[ 11 | 017 ] | LD DE,nn | +LD DE,nn | RL C | *NOP | *LD C,RL (IX+d) ||[ 12 | 018 ] | LD (DE),A | +LD (DE),A | RL D | *NOP | *LD D,RL (IX+d) ||[ 13 | 019 ] | INC DE | +INC DE | RL E | *NOP | *LD E,RL (IX+d) ||[ 14 | 020 ] | INC D | +INC D | RL H | *NOP | *LD H,RL (IX+d) ||[ 15 | 021 ] | DEC D | +DEC D | RL L | *NOP | *LD L,RL (IX+d) ||[ 16 | 022 ] | LD D,n | +LD D,n | RL (HL) | *NOP | RL (IX+d) ||[ 17 | 023 ] | RLA | +RLA | RL A | *NOP | *LD A,RL (IX+d) ||[ 18 | 024 ] | JR d | +JR d | RR B | *NOP | *LD B,RR (IX+d) ||[ 19 | 025 ] | ADD HL,DE | ADD IX,DE | RR C | *NOP | *LD C,RR (IX+d) ||[ 1a | 026 ] | LD A,(DE) | +LD A,(DE) | RR D | *NOP | *LD D,RR (IX+d) ||[ 1b | 027 ] | DEC DE | +DEC DE | RR E | *NOP | *LD E,RR (IX+d) ||[ 1c | 028 ] | INC E | +INC E | RR H | *NOP | *LD H,RR (IX+d) ||[ 1d | 029 ] | DEC E | +DEC E | RR L | *NOP | *LD L,RR (IX+d) ||[ 1e | 030 ] | LD E,n | +LD E,n | RR (HL) | *NOP | RR (IX+d) ||[ 1f | 031 ] | RRA | +RRA | RR A | *NOP | *LD A,RR (IX+d) ||[ 20 | 032 ] | JR NZ,d | +JR NZ,d | SLA B | *NOP | *LD B,SLA (IX+d) ||[ 21 | 033 ] | LD HL,nn | LD IX,nn | SLA C | *NOP | *LD C,SLA (IX+d) ||[ 22 | 034 ] | LD (nn),HL | LD (nn),IX | SLA D | *NOP | *LD D,SLA (IX+d) ||[ 23 | 035 ] | INC HL | INC IX | SLA E | *NOP | *LD E,SLA (IX+d) ||[ 24 | 036 ] | INC H | *INC IXh | SLA H | *NOP | *LD H,SLA (IX+d) ||[ 25 | 037 ] | DEC H | *DEC IXh | SLA L | *NOP | *LD L,SLA (IX+d) ||[ 26 | 038 ] | LD H,n | *LD IXh,n | SLA (HL) | *NOP | SLA (IX+d) ||[ 27 | 039 ] | DAA | +DAA | SLA A | *NOP | *LD A,SLA (IX+d) ||[ 28 | 040 ] | JR Z,d | +JR Z,d | SRA B | *NOP | *LD B,SRA (IX+d) ||[ 29 | 041 ] | ADD HL,HL | ADD IX,IX | SRA C | *NOP | *LD C,SRA (IX+d) ||[ 2a | 042 ] | LD HL,(nn) | LD IX,(nn) | SRA D | *NOP | *LD D,SRA (IX+d) ||[ 2b | 043 ] | DEC HL | DEC IX | SRA E | *NOP | *LD E,SRA (IX+d) ||[ 2c | 044 ] | INC L | *INC IXl | SRA H | *NOP | *LD H,SRA (IX+d) ||[ 2d | 045 ] | DEC L | *DEC IXl | SRA L | *NOP | *LD L,SRA (IX+d) ||[ 2e | 046 ] | LD L,n | *LD IXl,n | SRA (HL) | *NOP | SRA (IX+d) ||[ 2f | 047 ] | CPL | +CPL | SRA A | *NOP | *LD A,SRA (IX+d) ||[ 30 | 048 ] | JR NC,d | +JR NC,d | SLL B | *NOP | *LD B,SLL (IX+d) ||[ 31 | 049 ] | LD SP,nn | +LD SP,nn | SLL C | *NOP | *LD C,SLL (IX+d) ||[ 32 | 050 ] | LD (nn),A | +LD (nn),A | SLL D | *NOP | *LD D,SLL (IX+d) ||[ 33 | 051 ] | INC SP | +INC SP | SLL E | *NOP | *LD E,SLL (IX+d) ||[ 34 | 052 ] | INC (HL) | INC (IX+d) | SLL H | *NOP | *LD H,SLL (IX+d) ||[ 35 | 053 ] | DEC (HL) | DEC (IX+d) | SLL L | *NOP | *LD L,SLL (IX+d) ||[ 36 | 054 ] | LD (HL),n | LD (IX+d),n | SLL (HL) | *NOP | SLL (IX+d) ||[ 37 | 055 ] | SCF | +SCF | SLL A | *NOP | *LD A,SLL (IX+d) ||[ 38 | 056 ] | JR C,d | +JR C,d | SRL B | *NOP | *LD B,SRL (IX+d) ||[ 39 | 057 ] | ADD HL,SP | ADD IX,SP | SRL C | *NOP | *LD C,SRL (IX+d) ||[ 3a | 058 ] | LD A,(nn) | +LD A,(nn) | SRL D | *NOP | *LD D,SRL (IX+d) ||[ 3b | 059 ] | DEC SP | +DEC SP | SRL E | *NOP | *LD E,SRL (IX+d) ||[ 3c | 060 ] | INC A | +INC A | SRL H | *NOP | *LD H,SRL (IX+d) ||[ 3d | 061 ] | DEC A | +DEC A | SRL L | *NOP | *LD L,SRL (IX+d) ||[ 3e | 062 ] | LD A,n | +LD A,n | SRL (HL) | *NOP | SRL (IX+d) ||[ 3f | 063 ] | CCF | +CCF | SRL A | *NOP | *LD A,SRL (IX+d) ||[ 40 | 064 ] | LD B,B | +LD B,B | BIT 0,B | IN B,(C) | *BIT 0,(IX+d) ||[ 41 | 065 ] | LD B,C | +LD B,C | BIT 0,C | OUT (C),B | *BIT 0,(IX+d) ||[ 42 | 066 ] | LD B,D | +LD B,D | BIT 0,D | SBC HL,BC | *BIT 0,(IX+d) ||[ 43 | 067 ] | LD B,E | +LD B,E | BIT 0,E | LD (nn),BC | *BIT 0,(IX+d) ||[ 44 | 068 ] | LD B,H | *LD B,IXh | BIT 0,H | NEG | *BIT 0,(IX+d) ||[ 45 | 069 ] | LD B,L | *LD B,IXl | BIT 0,L | RETN | *BIT 0,(IX+d) ||[ 46 | 070 ] | LD B,(HL) | LD B,(IX+d) | BIT 0,(HL) | IM 0 | BIT 0,(IX+d) ||[ 47 | 071 ] | LD B,A | +LD B,A | BIT 0,A | LD I,A | *BIT 0,(IX+d) ||[ 48 | 072 ] | LD C,B | +LD C,B | BIT 1,B | IN C,(C) | *BIT 1,(IX+d) ||[ 49 | 073 ] | LD C,C | +LD C,C | BIT 1,C | OUT (C),C | *BIT 1,(IX+d) ||[ 4a | 074 ] | LD C,D | +LD C,D | BIT 1,D | ADC HL,BC | *BIT 1,(IX+d) ||[ 4b | 075 ] | LD C,E | +LD C,E | BIT 1,E | LD BC,(nn) | *BIT 1,(IX+d) ||[ 4c | 076 ] | LD C,H | *LD C,IXh | BIT 1,H | *NEG | *BIT 1,(IX+d) ||[ 4d | 077 ] | LD C,L | *LD C,IXl | BIT 1,L | RETI | *BIT 1,(IX+d) ||[ 4e | 078 ] | LD C,(HL) | LD C,(IX+d) | BIT 1,(HL) | *IM * (0?) | BIT 1,(IX+d) ||[ 4f | 079 ] | LD C,A | +LD C,A | BIT 1,A | LD R,A | *BIT 1,(IX+d) ||[ 50 | 080 ] | LD D,B | +LD D,B | BIT 2,B | IN D,(C) | *BIT 2,(IX+d) ||[ 51 | 081 ] | LD D,C | +LD D,C | BIT 2,C | OUT (C),D | *BIT 2,(IX+d) ||[ 52 | 082 ] | LD D,D | +LD D,D | BIT 2,D | SBC HL,DE | *BIT 2,(IX+d) ||[ 53 | 083 ] | LD D,E | +LD D,E | BIT 2,E | LD (nn),DE | *BIT 2,(IX+d) ||[ 54 | 084 ] | LD D,H | *LD D,IXh | BIT 2,H | *NEG | *BIT 2,(IX+d) ||[ 55 | 085 ] | LD D,L | *LD D,IXl | BIT 2,L | *RETN | *BIT 2,(IX+d) ||[ 56 | 086 ] | LD D,(HL) | LD D,(IX+d) | BIT 2,(HL) | IM 1 | BIT 2,(IX+d) ||[ 57 | 087 ] | LD D,A | +LD D,A | BIT 2,A | LD A,I | *BIT 2,(IX+d) ||[ 58 | 088 ] | LD E,B | +LD E,B | BIT 3,B | IN E,(C) | *BIT 3,(IX+d) ||[ 59 | 089 ] | LD E,C | +LD E,C | BIT 3,C | OUT (C),E | *BIT 3,(IX+d) ||[ 5a | 090 ] | LD E,D | +LD E,D | BIT 3,D | ADC HL,DE | *BIT 3,(IX+d) |⌨️ 快捷键说明
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