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📄 8051ipcore_readme.mht

📁 8051实用程序
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<HTML><HEAD><TITLE>8051 IP Core</TITLE>
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          <TD class=3Dtext vAlign=3Dtop width=3D399>
            <H2>8051 IP Core</H2>
            <P>The 8051 IP Core was developed in cooperation with the=20
            Arbeitsgruppe CAD / TU-Wien. This processor core is binary=20
            compatible to the well known 8051 processor from <A=20
            href=3D"http://developer.intel.com/" =
target=3D_blank>Intel</A>. Our 8051=20
            IP core is available as a synthetizeable circuit description =
(VHDL).=20
            </P>
            <P>Our 8051 IP core offers faster program execution compared =
to the=20
            original 8051 devices since we have optimized the =
processor's=20
            architecture. Additonally the 8051 IP core offers some sort =
of=20
            parametrizeability. </P>
            <P>The 8051 IP Core source code is available <B>for free</B> =
under=20
            the <A =
href=3D"http://www.gnu.org/licenses/licenses.html#LGPL"=20
            target=3D_blank>LGPL</A> (Lesser General Public License). =
</P>
            <P>We kindly ask you to send us a brief feedback about your=20
            successfully implementation of our 8051 IP core in your FPGA =
or ASIC=20
            design. <A href=3D"mailto:mc8051@oregano.at">Please send us =
either a=20
            simple email</A> or use the <A title=3D"MC8051 Feedback =
Form"=20
            href=3D"http://www.oregano.at/ip/mc8051/mc8051_feedback.pdf" =

            target=3D_blank>8051 IP core feedback form</A> (PDF-file). =
</P><A=20
            name=3D8051_contents>
            <H3>Contents</H3></A>
            <UL><A =
href=3D"http://www.oregano.at/ip/ip01.htm#8051_description">
              <LI>General Description</A> <A=20
              href=3D"http://www.oregano.at/ip/ip01.htm#8051_features">
              <LI>Features</A> <A=20
              =
href=3D"http://www.oregano.at/ip/ip01.htm#8051_datasheets">
              <LI>Data Sheets</A> <A=20
              href=3D"http://www.oregano.at/ip/ip01.htm#8051_appnotes">
              <LI>Application Notes</A> <A=20
              href=3D"http://www.oregano.at/ip/ip01.htm#8051_license">
              <LI>Licensing</A> <A=20
              href=3D"http://www.oregano.at/ip/ip01.htm#8051_source">
              <LI>Source Files</A> <A=20
              href=3D"http://www.oregano.at/ip/ip01.htm#8051_comments">
              <LI>User Comments</A> <A=20
              href=3D"http://www.oregano.at/ip/ip01.htm#8051_bugreport">
              <LI>Bug Reports</A> <A=20
              href=3D"http://www.oregano.at/ip/ip01.htm#8051_contact">
              <LI>Contact and Support</A> </LI></UL><A =
name=3D8051_description>
            <H3>General Description</H3></A>
            <P>This is a 8051 compatible IP core. The design has been =
optimized=20
            for the requirements of an IP design flow. </P>
            <P><IMG src=3D"http://www.oregano.at/ip/images/update.gif" =
border=3D0>=20
            Release version 1.3 of the 8051 IP core is available with =
September=20
            2002. </P>
            <DIV align=3Dright><A=20
            =
href=3D"http://www.oregano.at/ip/ip01.htm#8051_contents">Back to=20
            contents</A><BR><BR></DIV><A name=3D8051_features>
            <H3>Features</H3></A>
            <UL>
              <LI>fully synchronous circuit design=20
              <LI>single clock=20
              <LI>synthesizeable circuit description=20
              <LI>OP code compatible to original Intel 8051 device=20
              <LI>faster command execution due to new architecture=20
              <LI>all commands are executed in 1-4 clock cycles =
depending on the=20
              number of operands=20
              <LI>separate RAM and ROM data/address busses=20
              <LI>parametrizeable number of timer and UART units=20
              <LI>conventional multiplying algorithm or fast parallel =
multiplier=20
              units=20
              <LI>conventional dividing algorithm or fast parallel =
divider units=20

              <LI>verified to be compatible using extensive simulations =
- but=20
              <B>no</B> guarantee </LI></UL>
            <DIV align=3Dright><A=20
            =
href=3D"http://www.oregano.at/ip/ip01.htm#8051_contents">Back to=20
            contents</A><BR><BR></DIV><A name=3D8051_datasheets>
            <H3>Data Sheets</H3></A>
            <UL>
              <LI><A =
href=3D"http://www.oregano.at/ip/mc8051/mc8051_overview.pdf"=20
              target=3D_blank><IMG=20
              src=3D"http://www.oregano.at/ip/images/pdf_icon.gif" =
border=3D0> Brief=20
              product description</A> (PDF file, 78 kb) <!--
              <li><a href=3D"mc8051/8051_ds.pdf" target=3D"_blank">
                Full datasheet</a> (PDF file, 200 kb) - version 1.0</li>
--></LI></UL>
            <DIV align=3Dright><A=20
            =
href=3D"http://www.oregano.at/ip/ip01.htm#8051_contents">Back to=20
            contents</A><BR><BR></DIV><A name=3D8051_appnotes>
            <H3>Application Notes</H3></A>
            <UL>
              <LI><A =
href=3D"http://www.oregano.at/ip/mc8051/mc8051_ug.pdf"=20
              target=3D_blank><IMG=20
              src=3D"http://www.oregano.at/ip/images/pdf_icon.gif" =
border=3D0>=20
              MC8051 IP Core User Guide</A> (PDF file, 360kb) =
</LI></UL><!--

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