s3.c

基于组件方式开发操作系统的OSKIT源代码

   if (!s3InfoRec.videoRam) {
      if (((config & 0x20) != 0) 	/* if bit 5 is a 1, then 512k RAM */
          && (!S3_964_SERIES(s3ChipId))) {
	 s3InfoRec.videoRam = 512;
      } else {			/* must have more than 512k */
	 if (S3_911_SERIES(s3ChipId)) {
	    s3InfoRec.videoRam = 1024;
	 } else {
	    if (S3_PLATO_PX_SERIES(s3ChipId))
	       s3InfoRec.videoRam = (8-((config & 0xE0) >> 5)) * 512;
	    else switch ((config & 0xE0) >> 5) {	/* look at bits 6 and 7 */
	       case 0:
	         s3InfoRec.videoRam = 4096;
		 break;
	       case 2:
	         s3InfoRec.videoRam = 3072;
		 break;
	       case 3:
	         s3InfoRec.videoRam = 8192;
		 break;
	       case 4:
		 s3InfoRec.videoRam = 2048;
	         break;
	       case 5:
		 s3InfoRec.videoRam = 6144;
	         break;
	       case 6:
	         s3InfoRec.videoRam = 1024;
		 break;
	    }
	 }
      }
      if (xf86Verbose) {
         ErrorF("%s %s: videoram:  %dk\n",
              XCONFIG_PROBED, s3InfoRec.name, s3InfoRec.videoRam);
      }
   } else {
      if (xf86Verbose) {
	 ErrorF("%s %s: videoram:  %dk\n", 
              XCONFIG_GIVEN, s3InfoRec.name, s3InfoRec.videoRam);
      }
   }
   if (s3InfoRec.videoRam > 1024)
      s3Mbanks = -1;
   else
      s3Mbanks = 0;

	/***********************************************\
	| 	Set the visual, depth, weight, etc...   |
	\***********************************************/


   if (xf86bpp < 0) {
      xf86bpp = s3InfoRec.depth;
   }
   if (xf86weight.red == 0 || xf86weight.green == 0 || xf86weight.blue == 0) {
      xf86weight = s3InfoRec.weight;
   }
   switch (xf86bpp) {
   case 8:
      break;
   case 15:
      s3InfoRec.depth = 15;
      xf86bpp = 16;
      s3Weight = RGB16_555;
      xf86weight.red = xf86weight.green = xf86weight.blue = 5;
      s3InfoRec.bitsPerPixel = 16;
      if (s3InfoRec.defaultVisual < 0)
	 s3InfoRec.defaultVisual = TrueColor;
      if (defaultColorVisualClass < 0)
	 defaultColorVisualClass = s3InfoRec.defaultVisual;
      break;
   case 16:
      if (xf86weight.red==5 && xf86weight.green==5 && xf86weight.blue==5) {
	 s3Weight = RGB16_555;
	 s3InfoRec.depth = 15;
      }
      else if (xf86weight.red==5 && xf86weight.green==6 && xf86weight.blue==5) {
	 s3Weight = RGB16_565;
	 s3InfoRec.depth = 16;
      }
      else {
	 ErrorF(
	   "Invalid color weighting %1d%1d%1d (only 555 and 565 are valid)\n",
	   xf86weight.red,xf86weight.green,xf86weight.blue);
	 xf86DisableIOPorts(s3InfoRec.scrnIndex);
	 return(FALSE);
      }
      s3InfoRec.bitsPerPixel = 16;
      if (s3InfoRec.defaultVisual < 0)
	 s3InfoRec.defaultVisual = TrueColor;
      if (defaultColorVisualClass < 0)
	 defaultColorVisualClass = s3InfoRec.defaultVisual;
      break;
   case 24:
#ifdef NOT_YET
      s3InfoRec.depth = 24;
      s3InfoRec.bitsPerPixel = 32; /* Use packed 24 bpp (RGB) but this 
				      should be transparant for clients */
      s3InfoRec.bitsPerPixel = 24; /* not not yet or not here ? HACK24 */ 
      s3Weight = RGB32_888;
      /* s3MaxClock = S3_MAX_32BPP_CLOCK; */
      xf86weight.red =  xf86weight.green = xf86weight.blue = 8;
      if (s3InfoRec.defaultVisual < 0)
	 s3InfoRec.defaultVisual = TrueColor;
      if (defaultColorVisualClass < 0)
	 defaultColorVisualClass = s3InfoRec.defaultVisual;
      break;
#else
      xf86bpp = 32;
      /* FALLTHROUGH */
#endif
   case 32:
      s3InfoRec.depth = 24;
      s3InfoRec.bitsPerPixel = 32; /* Use sparse 24 bpp (RGBX) */
      s3Weight = RGB32_888;
      /* s3MaxClock = S3_MAX_32BPP_CLOCK; */
      xf86weight.red =  xf86weight.green = xf86weight.blue = 8;
      if (s3InfoRec.defaultVisual < 0)
	 s3InfoRec.defaultVisual = TrueColor;
      if (defaultColorVisualClass < 0)
	 defaultColorVisualClass = s3InfoRec.defaultVisual;
      break;
   default:
      ErrorF(
	"Invalid value for bpp.  Valid values are 8, 15, 16, 24 and 32.\n");
      xf86DisableIOPorts(s3InfoRec.scrnIndex);
      return(FALSE);
   }

   if (s3InfoRec.bitsPerPixel > 8 &&
       defaultColorVisualClass >= 0 && defaultColorVisualClass != TrueColor) {
      ErrorF("Invalid default visual type: %d (%s)\n", defaultColorVisualClass,
	     xf86VisualNames[defaultColorVisualClass]);
      xf86DisableIOPorts(s3InfoRec.scrnIndex);
      return(FALSE);
   }

   s3Bpp = xf86bpp / 8;


    	/*******************************\
   	|	 Probe for RAMDAC 	|
	\*******************************/

   /* Make sure CR55 is unlocked for Bt485 probe */

   outb(vgaCRIndex, 0x39);
   outb(vgaCRReg, 0xA5);

   if(s3RamdacType == UNKNOWN_DAC) {
     for (i = 1; s3Ramdacs[i].DacName; i++) {
      if ((s3Ramdacs[i].DacProbe)()) {
	 s3RamdacType = i;
	 break;
       }
     }
   } 

#if 1
   else {
    /* shouldn't we probe it anyway to ensure options are set? */
    if(!(s3Ramdacs[s3RamdacType].DacProbe)()) {
      ErrorF("WARNING: Did not detect a ramdac of type \"%s\" as specified!\n",
		s3Ramdacs[s3RamdacType].DacName);
	/* but we accept the user's assertion */
    }
   }
#endif

   /* If we still don't know the ramdac type, set it to NORMAL_DAC */
   if (s3RamdacType == UNKNOWN_DAC) {
      if (xf86Verbose) 
         ErrorF("%s %s: Unknown ramdac. Setting type to \"normal_dac\".\n",
              XCONFIG_PROBED, s3InfoRec.name);
      s3RamdacType = NORMAL_DAC;
   }

        
	/*******************************************************\
	| Set some SPEA specific options that had to wait until |
	| after we knew what the ramdac was.			|
	\*******************************************************/ 
  
	/* might want to consider moving this to the PreInit() 
		functions (MArk) */

   if ((!OFLG_ISSET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions) &&
       !OFLG_ISSET(OPTION_SPEA_MERCURY, &s3InfoRec.options) &&
       (s3InfoRec.ramdac == NULL)) || S3_TRIO64_SERIES(s3ChipId))
				   { /* ensure that autodetection can be */
                                     /* overwritten 			 */	
     card_id = check_SPEA_bios(s3InfoRec.BIOSbase); 
     if (card_id > 0) {

       switch (s3RamdacType) {
       case BT485_DAC: 
       case ATT20C505_DAC: 
          if (S3_928_ONLY(s3ChipId)) {
             /* SPEA Mercury */
             ErrorF("%s %s: SPEA Mercury detected.\n",
             XCONFIG_PROBED, s3InfoRec.name);
             OFLG_SET(OPTION_SPEA_MERCURY, &s3InfoRec.options);
             OFLG_SET(CLOCK_OPTION_SC11412, &s3InfoRec.clockOptions);
             OFLG_SET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions);
             clockchip_probed = XCONFIG_PROBED; 
          } else if  (S3_964_SERIES(s3ChipId)) { 
             /* SPEA Mercury P64 */ 
             ErrorF("%s %s: SPEA Mercury P64 detected.\n",
             XCONFIG_PROBED, s3InfoRec.name);
             OFLG_SET(OPTION_SPEA_MERCURY, &s3InfoRec.options);
             OFLG_SET(CLOCK_OPTION_ICD2061A, &s3InfoRec.clockOptions);
             OFLG_SET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions);
             clockchip_probed = XCONFIG_PROBED;
          } 
          break;
       case ATT20C498_DAC: 
          if (S3_864_SERIES(s3ChipId)) { 
            /* SPEA MirageP64 Bios 3.xx */
            ErrorF("%s %s: SPEA Mirage P64 detected.\n",
            XCONFIG_PROBED, s3InfoRec.name);
            OFLG_SET(CLOCK_OPTION_ICS2595, &s3InfoRec.clockOptions);
            OFLG_SET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions);
            clockchip_probed = XCONFIG_PROBED;
          }
          break;
       case S3_SDAC_DAC:
          if (S3_864_SERIES(s3ChipId)) 
            /* SPEA Mirage P64 Bios 4.xx */
            ErrorF("%s %s: SPEA Mirage P64 detected.\n",
            XCONFIG_PROBED, s3InfoRec.name);
          break;
       case S3_TRIO64_DAC: 
          if (S3_TRIO64_SERIES(s3ChipId)) 
            /* SPEA Mirage P64 Bios 5.xx */
            ErrorF("%s %s: SPEA Mirage P64 Trio64 detected.\n",
            XCONFIG_PROBED, s3InfoRec.name);
          break;
       case S3_GENDAC_DAC:
          if (S3_801_SERIES(s3ChipId))
            /* SPEA Mirage Bios 5.x */
            ErrorF("%s %s: SPEA Mirage detected.\n",
            XCONFIG_PROBED, s3InfoRec.name);
          break;
      } 
     }
    }   /* end SPEA autodetect */

  	/*********************************************\
	| make sure s3InfoRec.ramdac is set correctly |
	\*********************************************/

   s3InfoRec.ramdac = xf86TokenToString(s3DacTable, s3RamdacType);

   if (xf86Verbose) {
      ErrorF("%s %s: Ramdac type: %s\n",
	     OFLG_ISSET(XCONFIG_RAMDAC, &s3InfoRec.xconfigFlag) ?
	     XCONFIG_GIVEN : XCONFIG_PROBED, s3InfoRec.name, s3InfoRec.ramdac);
   }

	/*******************************************************\
   	|	 Now set the DAC speeds if not already set 	|
	\*******************************************************/

   if (s3InfoRec.dacSpeeds[0] <= 0) {
	s3InfoRec.dacSpeeds[0] = s3Ramdacs[s3RamdacType].DacSpeed;
   }
   if (s3InfoRec.dacSpeedBpp <= 0)
      if (xf86bpp > 24 && s3InfoRec.dacSpeeds[3] > 0)
	 s3InfoRec.dacSpeedBpp = s3InfoRec.dacSpeeds[3];
      else if (xf86bpp >= 24 && s3InfoRec.dacSpeeds[2] > 0)
	 s3InfoRec.dacSpeedBpp = s3InfoRec.dacSpeeds[2];
      else if (xf86bpp > 8 && xf86bpp < 24 && s3InfoRec.dacSpeeds[1] > 0)
	 s3InfoRec.dacSpeedBpp = s3InfoRec.dacSpeeds[1];
      else if (xf86bpp <= 8 && s3InfoRec.dacSpeeds[0] > 0)
	 s3InfoRec.dacSpeedBpp = s3InfoRec.dacSpeeds[0];
   
   if (xf86Verbose) {
      ErrorF("%s %s: Ramdac speed: %d MHz",
	     OFLG_ISSET(XCONFIG_DACSPEED, &s3InfoRec.xconfigFlag) ?
	     XCONFIG_GIVEN : XCONFIG_PROBED, s3InfoRec.name,
	     s3InfoRec.dacSpeeds[0] / 1000);
      if (s3InfoRec.dacSpeedBpp > 0 && s3InfoRec.dacSpeedBpp != s3InfoRec.dacSpeeds[0])
	 ErrorF("  (%d MHz for %d bpp)",s3InfoRec.dacSpeedBpp / 1000, xf86bpp);
      ErrorF("\n");
   }

   /*******************************************************************\
   | Check that the depth requested is supported by the ramdac/chipset |
   \*******************************************************************/


    if (S3_801_SERIES(s3ChipId)) {
      if (s3Bpp > 2) {
         ErrorF("Depths greater than 16bpp are not supported for 801/805 "
		"chips.\n");
	 return(FALSE);
      }
    }
    else if (S3_911_SERIES(s3ChipId)) {
      if (s3Bpp > 1) {
         ErrorF("Depths greater than 8bpp are not supported for 911/924 "
		"chips.\n");
	 return(FALSE);
      }
    }

    if (!S3_868_SERIES(s3ChipId) && !S3_968_SERIES(s3ChipId)) {
      if (s3Bpp == 3) {
         ErrorF("Packed-pixel 24bpp depths are only supported for 868/968 "
		"chips\n");
	 return(FALSE);
      }	 
    }

    /* I guess these should return a status flag. Just 0 or 1 for now (MArk)*/
    if ((s3Ramdacs[s3RamdacType].PreInit)() <= 0) {
	/* error message? Or rely on the PreInit() functions to 
	   provide that? */
	 xf86DisableIOPorts(s3InfoRec.scrnIndex);
	 return(FALSE);
    }

	/***************************************\
	|	Last minute Clock Checks 	|
	\***************************************/

   /* Check that maxClock is not higher than dacSpeeds */
   if (s3InfoRec.maxClock > s3InfoRec.dacSpeeds[0])
      s3InfoRec.maxClock = s3InfoRec.dacSpeeds[0];

   /* Check if this exceeds the clock chip's limit */
   if (clockDoublingPossible)
      maxRawClock *= 2;
   if (maxRawClock > 0 && s3InfoRec.maxClock > maxRawClock)
      s3InfoRec.maxClock = maxRawClock;

   /* check DCLK limit of 100MHz for 866/868 */
   if (S3_866_SERIES(s3ChipId) || S3_868_SERIES(s3ChipId)) {
      if (((s3Bpp==1 && !pixMuxPossible) || s3Bpp==2) 
	  && s3InfoRec.maxClock > 100000)
	 s3InfoRec.maxClock = 100000;
      else if (s3Bpp>2 && s3InfoRec.maxClock > 50000)
	 s3InfoRec.maxClock = 50000;  
   }
   /* check DCLK limit of 95MHz for 864 */
   else if (S3_864_SERIES(s3ChipId)) {
      if (((s3Bpp==1 && !pixMuxPossible) || s3Bpp==2) 
	  && s3InfoRec.maxClock > 95000)
	 s3InfoRec.maxClock = 95000;

      /* for 24bpp the limit should be 95/2 == 47.5MHz
	 but I set the limit to 50MHz to allow VESA 800x600@72Hz */
      else if (s3Bpp>2 && s3InfoRec.maxClock > 50000)
	 s3InfoRec.maxClock = 50000;  
   }

   /* override maxClock settings form ramdac code... */
   if (OFLG_ISSET(XCONFIG_DACSPEED, &s3InfoRec.xconfigFlag))
      if (xf86bpp > 24 && s3InfoRec.dacSpeeds[3] > 0)
	 s3InfoRec.maxClock = s3InfoRec.dacSpeeds[3];
      else if (xf86bpp >= 24 && s3InfoRec.dacSpeeds[2] > 0)
	 s3InfoRec.maxClock = s3InfoRec.dacSpeeds[2];
      else if (xf86bpp > 8 && xf86bpp < 24 && s3InfoRec.dacSpeeds[1] > 0)
	 s3InfoRec.maxClock = s3InfoRec.dacSpeeds[1];
      else if (xf86bpp <= 8 && s3InfoRec.dacSpeeds[0] > 0)
	 s3InfoRec.maxClock = s3InfoRec.dacSpeeds[0];

   if (xf86Verbose) {
      if (! OFLG_ISSET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions)) {
	 for (j = 0; j < s3InfoRec.clocks; j++) {
	    if ((j % 8) == 0) {
	       if (j != 0)
		  ErrorF("\n");
               ErrorF("%s %s: clocks:",
                OFLG_ISSET(XCONFIG_CLOCKS,&s3InfoRec.xconfigFlag) ?
                    XCONFIG_GIVEN : XCONFIG_PROBED , 
                s3InfoRec.name);
	    }
	    ErrorF(" %6.2f", (double)s3InfoRec.clock[j] / 1000.0);
         }
         ErrorF("\n");
      } 
   }


      /******************************************************************\
      | Adjust s3InfoRec.clock[] when not using a programable clock chip |
      \******************************************************************/
	/* Don't know how to clean this up (MArk) */

   if (!OFLG_ISSET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions)) {
      Bool clocksChanged = FALSE;
      Bool numClocksChanged = FALSE;
      int newNumClocks = s3InfoRec.clocks;

      if (S3_864_SERIES(s3ChipId))
	 nonMuxMaxClock = 95000;
      else if (S3_805_I_SERIES(s3ChipId))
	 nonMuxMaxClock = 90000;  /* XXXX just a guess, who has 805i docs? */

      for (j = 0; j < s3InfoRec.clocks; j++) {
	 switch(s3RamdacType) {
	 case NORMAL_DAC:
	    /* only suports 8bpp -- nothing to do */
	    break;
	 case BT485_DAC:
	 case ATT20C505_DAC:
	    /* XXXX What happens here for 16bpp/32bpp ? */
	    break;
	 case TI3020_DAC:
	    switch (s3Bpp) {
	    case 1:
	       break;
	    case 2: