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📄 s3.c

📁 基于组件方式开发操作系统的OSKIT源代码
💻 C
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   if (xf86ProbeFailed) {      if (s3InfoRec.chipset) {	 ErrorF("%s: '%s' is an invalid chipset", s3InfoRec.name,		s3InfoRec.chipset);      }      xf86DisableIOPorts(s3InfoRec.scrnIndex);      return(FALSE);   }    /***************************************************************\    |  Print out the chipset name and driver for the user's benefit |    \***************************************************************/   if (xf86Verbose) {      if (S3_x64_SERIES(s3ChipId)) {	 char *chipname = "unknown";	 if (S3_868_SERIES(s3ChipId)) {	    chipname = "868";	 } else if (S3_866_SERIES(s3ChipId)) {	    chipname = "866";	 } else if (S3_864_SERIES(s3ChipId)) {	    chipname = "864";	 } else if (S3_968_SERIES(s3ChipId)) {	    chipname = "968";	 } else if (S3_964_SERIES(s3ChipId)) {	    chipname = "964";	 } else if (S3_TRIO32_SERIES(s3ChipId)) {	    chipname = "Trio32";	 } else if (S3_TRIO64UVP_SERIES(s3ChipId)) {	    chipname = "Trio64UV+ (preliminary support; please report)";	 } else if (S3_AURORA64VP_SERIES(s3ChipId)) {	    chipname = "Aurora64V+ (preliminary support; please report)";	 } else if (S3_TRIO64V_SERIES(s3ChipId /* , s3ChipRev */)) {	    chipname = "Trio64V+";	 } else if (S3_TRIO64V2_SERIES(s3ChipId)) {	    outb(vgaCRIndex, 0x39);	    outb(vgaCRReg, 0xa5);	    outb(vgaCRIndex, 0x6f);	    if (inb(vgaCRReg) & 1)	       chipname = "Trio64V2/GX";	    else	       chipname = "Trio64V2/DX";	 } else if (S3_TRIO64_SERIES(s3ChipId)) {	    chipname = "Trio64";	 } else if (S3_PLATO_PX_SERIES(s3ChipId)) {	    chipname = "PLATO/PX (preliminary support; please report)";	 }	 ErrorF("%s %s: chipset:   %s rev. %x\n",                XCONFIG_PROBED, s3InfoRec.name, chipname, s3ChipRev);      } else if (S3_801_928_SERIES(s3ChipId)) {	 if (S3_801_SERIES(s3ChipId)) {            if (S3_805_I_SERIES(s3ChipId)) {               ErrorF("%s %s: chipset:   805i",                      XCONFIG_PROBED, s3InfoRec.name);               if ((config & 0x03) == 3)                  ErrorF(" (ISA)");               else                  ErrorF(" (VL)");            }	    else if (!((config & 0x03) == 3))	       ErrorF("%s %s: chipset:   805",                      XCONFIG_PROBED, s3InfoRec.name);	    else	       ErrorF("%s %s: chipset:   801",                       XCONFIG_PROBED, s3InfoRec.name);	    ErrorF(", ");	    if (S3_801_REV_C(s3ChipId))	       ErrorF("rev C or above\n");	    else	       ErrorF("rev A or B\n");	 } else if (S3_928_SERIES(s3ChipId)) {	    char *pci = S3_928_P(s3ChipId) ? "-P" : "";	    if (S3_928_REV_E(s3ChipId))		ErrorF("%s %s: chipset:   928%s, rev E or above\n",                   XCONFIG_PROBED, s3InfoRec.name, pci);	    else	        ErrorF("%s %s: chipset:   928%s, rev D or below\n",                   XCONFIG_PROBED, s3InfoRec.name, pci);	 }      } else if (S3_911_SERIES(s3ChipId)) {	 if (S3_911_ONLY(s3ChipId)) {	    ErrorF("%s %s: chipset:   911 \n",                   XCONFIG_PROBED, s3InfoRec.name);	 } else if (S3_924_ONLY(s3ChipId)) {	    ErrorF("%s %s: chipset:   924\n",                   XCONFIG_PROBED, s3InfoRec.name);	 } else {	    ErrorF("%s %s: S3 chipset type unknown, chip_id = 0x%02x\n",		   XCONFIG_PROBED, s3InfoRec.name, s3ChipId);	 }      }   }   if (xf86Verbose) {      ErrorF("%s %s: chipset driver: %s\n",	     OFLG_ISSET(XCONFIG_CHIPSET, &s3InfoRec.xconfigFlag) ?		XCONFIG_GIVEN : XCONFIG_PROBED,	     s3InfoRec.name, s3InfoRec.chipset);   }	/***************************************\	| Was a ramdac supplied in XF86Config? 	|	\***************************************/   if (s3InfoRec.ramdac) {      s3RamdacType = xf86StringToToken(s3DacTable, s3InfoRec.ramdac);      if (s3RamdacType < 0) {	 ErrorF("%s %s: Unknown RAMDAC type \"%s\"\n", XCONFIG_GIVEN,		s3InfoRec.name, s3InfoRec.ramdac);	 xf86DisableIOPorts(s3InfoRec.scrnIndex);	 return(FALSE);      }   }	/*******************************\	|	 Set valid options 	|	\*******************************/   OFLG_ZERO(&validOptions);   OFLG_SET(OPTION_LEGEND, &validOptions);   OFLG_SET(OPTION_CLKDIV2, &validOptions);   OFLG_SET(OPTION_NOLINEAR_MODE, &validOptions);   if (!S3_x64_SERIES(s3ChipId))      OFLG_SET(OPTION_NO_MEM_ACCESS, &validOptions);   OFLG_SET(OPTION_SW_CURSOR, &validOptions);   OFLG_SET(OPTION_BT485_CURS, &validOptions);   OFLG_SET(OPTION_SHOWCACHE, &validOptions);   OFLG_SET(OPTION_FB_DEBUG, &validOptions);   OFLG_SET(OPTION_NO_FONT_CACHE, &validOptions);   OFLG_SET(OPTION_NO_PIXMAP_CACHE, &validOptions);   OFLG_SET(OPTION_TI3020_CURS, &validOptions);   OFLG_SET(OPTION_NO_TI3020_CURS, &validOptions);   OFLG_SET(OPTION_TI3026_CURS, &validOptions);   OFLG_SET(OPTION_IBMRGB_CURS, &validOptions);   OFLG_SET(OPTION_DAC_8_BIT, &validOptions);   OFLG_SET(OPTION_DAC_6_BIT, &validOptions);   OFLG_SET(OPTION_SYNC_ON_GREEN, &validOptions);   OFLG_SET(OPTION_SPEA_MERCURY, &validOptions);   OFLG_SET(OPTION_NUMBER_NINE, &validOptions);   OFLG_SET(OPTION_STB_PEGASUS, &validOptions);   OFLG_SET(OPTION_MIRO_MAGIC_S4, &validOptions);#ifdef PC98   OFLG_SET(OPTION_PCSKB, &validOptions);   OFLG_SET(OPTION_PCSKB4, &validOptions);   OFLG_SET(OPTION_PCHKB, &validOptions);   OFLG_SET(OPTION_NECWAB, &validOptions);   OFLG_SET(OPTION_PW805I, &validOptions);   OFLG_SET(OPTION_PWLB, &validOptions);   OFLG_SET(OPTION_PW968, &validOptions);   OFLG_SET(OPTION_EPSON_MEM_WIN, &validOptions);   OFLG_SET(OPTION_PW_MUX, &validOptions);   OFLG_SET(OPTION_NOINIT, &validOptions);#endif   /* ELSA_W1000PRO isn't really required any more */   OFLG_SET(OPTION_ELSA_W1000PRO, &validOptions);   OFLG_SET(OPTION_ELSA_W2000PRO, &validOptions);   OFLG_SET(OPTION_DIAMOND, &validOptions);   OFLG_SET(OPTION_GENOA, &validOptions);   OFLG_SET(OPTION_STB, &validOptions);   OFLG_SET(OPTION_HERCULES, &validOptions);   if (S3_928_P(s3ChipId))      OFLG_SET(OPTION_PCI_HACK, &validOptions);   OFLG_SET(OPTION_POWER_SAVER, &validOptions);   OFLG_SET(OPTION_S3_964_BT485_VCLK, &validOptions);   OFLG_SET(OPTION_SLOW_DRAM, &validOptions);   OFLG_SET(OPTION_SLOW_EDODRAM, &validOptions);   OFLG_SET(OPTION_SLOW_VRAM, &validOptions);   OFLG_SET(OPTION_SLOW_DRAM_REFRESH, &validOptions);   OFLG_SET(OPTION_FAST_VRAM, &validOptions);   OFLG_SET(OPTION_EARLY_RAS_PRECHARGE, &validOptions);   OFLG_SET(OPTION_LATE_RAS_PRECHARGE, &validOptions);   OFLG_SET(OPTION_TRIO32_FC_BUG, &validOptions);   OFLG_SET(OPTION_S3_968_DASH_BUG, &validOptions);   OFLG_SET(OPTION_TRIO64VP_BUG1, &validOptions);   OFLG_SET(OPTION_TRIO64VP_BUG2, &validOptions);   OFLG_SET(OPTION_TRIO64VP_BUG3, &validOptions);   OFLG_SET(OPTION_ELSA_W2000PRO_X8, &validOptions);   OFLG_SET(OPTION_MIRO_80SV, &validOptions);   OFLG_SET(OPTION_NO_PCI_DISC, &validOptions);   OFLG_SET(OPTION_NO_SPLIT_XFER, &validOptions);   xf86VerifyOptions(&validOptions, &s3InfoRec);#ifdef __alpha__#ifdef TEST_JENSEN_CODE   if (1)#else   if (!_bus_base()) #endif   { /* Jensen */       isJensen = TRUE;       OFLG_SET(OPTION_NOLINEAR_MODE, &s3InfoRec.options);   }#endif /* __alpha__ */#ifdef PC98   if (OFLG_ISSET(OPTION_PW_MUX, &s3InfoRec.options)) {      OFLG_SET(OPTION_SPEA_MERCURY, &s3InfoRec.options);    }#endif   if (S3_x64_SERIES(s3ChipId)) {      if (OFLG_ISSET(OPTION_NO_MEM_ACCESS, &s3InfoRec.options)) {	 ErrorF("%s %s: Option \"nomemaccess\" is ignored for 86x/96x/TRIOxx\n",		XCONFIG_PROBED, s3InfoRec.name);	 OFLG_CLR(OPTION_NO_MEM_ACCESS, &s3InfoRec.options);      }   }   if (OFLG_ISSET(OPTION_TRIO32_FC_BUG, &s3InfoRec.options))      s3Trio32FCBug = TRUE;   if (OFLG_ISSET(OPTION_S3_968_DASH_BUG, &s3InfoRec.options))      s3_968_DashBug = TRUE;   if (OFLG_ISSET(OPTION_GENOA, &s3InfoRec.options))      s3BiosVendor = GENOA_BIOS;   else if (OFLG_ISSET(OPTION_STB, &s3InfoRec.options))      s3BiosVendor = STB_BIOS;   else if (OFLG_ISSET(OPTION_HERCULES, &s3InfoRec.options))      s3BiosVendor = HERCULES_BIOS;   else if (OFLG_ISSET(OPTION_NUMBER_NINE, &s3InfoRec.options))      s3BiosVendor = NUMBER_NINE_BIOS;	/***************************************\   	|	 LocalBus, EISA or PCI ?	|	\***************************************/   s3Localbus = ((config & 0x03) <= 2) || S3_928_P(s3ChipId);   if (xf86Verbose) {      if (S3_928_P(s3ChipId)) {	 ErrorF("%s %s: card type: PCI\n", XCONFIG_PROBED, s3InfoRec.name);      } else {	 switch (config & 0x03) {	 case 0:	    ErrorF("%s %s: card type: EISA\n", XCONFIG_PROBED, s3InfoRec.name);	    break;	 case 1:            ErrorF("%s %s: card type: 386/486 localbus\n",        	   XCONFIG_PROBED, s3InfoRec.name);	    s3VLB = TRUE;	    break;	 case 3:            ErrorF("%s %s: card type: ISA\n", XCONFIG_PROBED, s3InfoRec.name);	    break;	 case 2:	    ErrorF("%s %s: card type: PCI\n", XCONFIG_PROBED, s3InfoRec.name);	 }      }   }	/*****************************************************\	| Determine card vendor to aid in clockchip detection |	\*****************************************************/	   /* reset S3 graphics engine to avoid memory corruption */   if (S3_TRIO64V_SERIES(s3ChipId)) {     outb(vgaCRIndex, 0x66);     cr66 = inb(vgaCRReg);     outb(vgaCRReg, i |  0x02);     usleep(10000);  /* wait a little bit... */   }   card_id = s3DetectMIRO_20SV_Rev(s3InfoRec.BIOSbase);   if (card_id > 1) {      ErrorF("%s %s: MIRO 20SV Rev.2 or newer detected.\n",             XCONFIG_PROBED, s3InfoRec.name);      if (!OFLG_ISSET(OPTION_S3_964_BT485_VCLK, &s3InfoRec.options))	 ErrorF("\tplease use Option \"s3_964_bt485_vclk\"\n");   }   if (find_bios_string(s3InfoRec.BIOSbase,			"S3 Vision968 IBM RGB DAC", NULL)  != NULL       && find_bios_string(s3InfoRec.BIOSbase, 			   "miro\37780",NULL) != NULL) {      OFLG_SET(OPTION_MIRO_80SV,  &s3InfoRec.options);      if (s3InfoRec.dacSpeeds[0] <= 0)	 s3InfoRec.dacSpeeds[0] = 250000;      if (s3RamdacType == UNKNOWN_DAC) {	 s3RamdacType = IBMRGB528_DAC;	 ErrorF("%s %s: MIRO 80SV detected, using IBM RGB528 ramdac\n",		XCONFIG_PROBED, s3InfoRec.name);      }   }   if (find_bios_string(s3InfoRec.BIOSbase,"Stealth",			"Diamond Computer Systems, Inc.") != NULL ||       find_bios_string(s3InfoRec.BIOSbase,"Stealth",			"Diamond Multimedia Systems, Inc.") != NULL) {      if (s3BiosVendor == UNKNOWN_BIOS) 	 s3BiosVendor = DIAMOND_BIOS;      if (xf86Verbose)	 ErrorF("%s %s: Diamond Stealth BIOS found\n",		XCONFIG_PROBED, s3InfoRec.name);   }   card_id = s3DetectELSA(s3InfoRec.BIOSbase, &card, &serno, &max_pix_clock,			  &max_mem_clock, &hwconf, &elsa_modes);   if (S3_TRIO64V_SERIES(s3ChipId)) {     outb(vgaCRIndex, 0x66);     outb(vgaCRReg, cr66 & ~0x02);  /* clear reset flag */     usleep(10000);  /* wait a little bit... */   }   if (card_id > 0) {      if (s3BiosVendor == UNKNOWN_BIOS) 	 s3BiosVendor = ELSA_BIOS;      if (xf86Verbose) {         ErrorF("%s %s: card: %s, Ser.No. %s\n",	        XCONFIG_PROBED, s3InfoRec.name, card, serno);	 if (elsa_modes && *elsa_modes)	    ErrorF("%s %s: video modes stores in ELSA EEPROM:\n%s",		   XCONFIG_PROBED, s3InfoRec.name, elsa_modes);      }      xfree(card);      xfree(serno);      xfree(elsa_modes);      if (s3InfoRec.dacSpeeds[0] <= 0)	 s3InfoRec.dacSpeeds[0] = max_pix_clock;      do {	 switch (card_id) {	 case ELSA_WINNER_1000AVI:	 case ELSA_WINNER_1000PRO:	    /* This option isn't required at the moment */	    OFLG_SET(OPTION_ELSA_W1000PRO,  &s3InfoRec.options);	    /* fallthrough */	 case ELSA_WINNER_1000:	 case ELSA_WINNER_1000VL:	 case ELSA_WINNER_1000PCI:	 case ELSA_WINNER_1000ISA:	    if ((s3Ramdacs[S3_SDAC_DAC].DacProbe)()) {	       s3RamdacType = S3_SDAC_DAC;	       continue;  /* SDAC detected, don't set ICD2061A clock */	    }            if((s3Ramdacs[ATT20C409_DAC].DacProbe)())	    	s3RamdacType = ATT20C409_DAC;               /* if ATT20C409 is detected, the clockchip is                 * already set apropriately                 */	    /* otherwise it's a STG1700,20C498, or SC15025 and will get 		detected later.  The clockchip ICD2061A will get set at 		the at the end of this loop */	    break;	 case ELSA_WINNER_2000PRO:	    OFLG_SET(OPTION_ELSA_W2000PRO,  &s3InfoRec.options);	    break;	 case ELSA_WINNER_2000PRO_X8:	    OFLG_SET(OPTION_ELSA_W2000PRO_X8,  &s3InfoRec.options);	    continue; /* use IBM RGB528 clock, don't set ICD2061A flags */	 case ELSA_WINNER_2000:	 case ELSA_WINNER_2000VL:	 case ELSA_WINNER_2000PCI:	    break;  /* set ICD2061A clock chip */	 case ELSA_GLORIA_8:	    if (OFLG_ISSET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions)) {	       FatalError("%s %s: for the ELSA Gloria-8 card you should not "		 "specify a clock chip!\n",XCONFIG_GIVEN, s3InfoRec.name);	    }	    OFLG_SET(CLOCK_OPTION_GLORIA8, &s3InfoRec.clockOptions);	    OFLG_SET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions);	    clockchip_probed = XCONFIG_PROBED;	    /* fall through ... */	 case ELSA_WINNER_2000AVI:	 case ELSA_WINNER_2000PRO_X:	 case ELSA_GLORIA_4:	    if (OFLG_ISSET(OPTION_ELSA_W2000PRO,&s3InfoRec.options)) {	       ErrorF("%s %s: for Ti3026/3030 RAMDACs you must not specify " 		"Option \"elsa_w2000pro\"\n",XCONFIG_PROBED, s3InfoRec.name);	       OFLG_CLR(OPTION_ELSA_W2000PRO, &s3InfoRec.options);	    }	    if ((card_id==ELSA_WINNER_2000PRO_X) && (hwconf & 2)) {	       /*	        * this version of the Winner 2000PRO/X has an external ICS9161A	        * clockchip, so set ICD2061A flag	        */               if (xf86Verbose)	          ErrorF("%s %s: Rev. G Winner 2000PRO/X with external " 		    "clockchip detected\n",XCONFIG_PROBED, s3InfoRec.name);	       break;	    } else {	       continue;            }	 case ELSA_WINNER_1000PRO_TRIO32:	 case ELSA_WINNER_1000PRO_TRIO64:	 case ELSA_WINNER_1000PRO_X:	 default: 	    continue; /* unknown card_id, don't set ICD2061A flags */	 }	 /* a known ELSA card_id was returned, set ICD 2061A clock support 	    if there is no ClockChip specified in XF86Config */	 if (!OFLG_ISSET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions)) {	    OFLG_SET(CLOCK_OPTION_ICD2061A, &s3InfoRec.clockOptions);	    OFLG_SET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions);	    clockchip_probed = XCONFIG_PROBED;	 }      } while (0);   }	/***************************************\	|	Detect VideoRam amount 		|	\***************************************/

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