📄 s3ramdacs.c
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/* $XFree86: xc/programs/Xserver/hw/xfree86/accel/s3/s3ramdacs.c,v 3.10.2.5 1997/07/19 04:59:26 dawes Exp $ *//* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Thomas Roell not be used in * advertising or publicity pertaining to distribution of the software * without specific, written prior permission. Thomas Roell makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * THOMAS ROELL AND KEVIN E. MARTIN DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, * IN NO EVENT SHALL THOMAS ROELL OR KEVIN E. MARTIN BE LIABLE FOR ANY * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER * RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF * CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Author: Thomas Roell, roell@informatik.tu-muenchen.de * * Rewritten for the 8514/A by Kevin E. Martin (martin@cs.unc.edu) * * Header: /home/src/xfree86/mit/server/ddx/xf86/accel/s3/RCS/s3.c,v 2.0 * 1993/02/22 05:58:13 jon Exp * * Modified by Amancio Hasty and Jon Tombs * * Rather severely reorganized by MArk Vojkovich (mvojkovi@ucsd.edu) * */#include "misc.h"#ifndef OSKIT#include "cfb.h"#include "pixmapstr.h"#include "fontstruct.h"#endif /* !OSKIT */#include "s3.h"#include "regs3.h"#include "xf86_HWlib.h"#include "xf86_PCI.h"#define XCONFIG_FLAGS_ONLY#include "xf86_Config.h"#include "s3linear.h"#include "s3Bt485.h"#include "Ti302X.h"#include "IBMRGB.h"#include "s3ELSA.h"extern char *clockchip_probed; /* in s3.c */extern Bool pixMuxPossible;extern Bool allowPixMuxInterlace;extern Bool allowPixMuxSwitching;extern int nonMuxMaxClock;extern int nonMuxMaxMemory;extern int pixMuxMinWidth;extern int pixMuxMinClock;extern Bool pixMuxLimitedWidths;extern Bool clockDoublingPossible;extern Bool s3PixelMultiplexing;extern Bool s3DACSyncOnGreen;extern Bool pixMuxNeeded;extern int s3BiosVendor;extern int maxRawClock;extern int numClocks;extern int s3MaxClock;extern unsigned char *find_bios_string(int, char *, char *);extern void (* dacOutTi3026IndReg)(unsigned char,unsigned char,unsigned char);extern unsigned char (* dacInTi3026IndReg)(unsigned char); static Bool NORMAL_Probe(void);static Bool S3_TRIO32_Probe(void);static Bool S3_TRIO64_Probe(void);static Bool S3_TRIO64V2_Probe(void);static Bool TI3026_Probe(void);static Bool TI3030_Probe(void);static Bool TI3020_Probe(void);static Bool TI3025_Probe(void);static Bool BT485_Probe(void);static Bool ATT20C505_Probe(void);static Bool ATT22C498_Probe(void);static Bool ATT498_Probe(void);static Bool ATT20C409_Probe(void);static Bool SC15025_Probe(void);static Bool STG1700_Probe(void);static Bool STG1703_Probe(void);static Bool IBMRGB524_Probe(void);static Bool IBMRGB525_Probe(void);static Bool IBMRGB528_Probe(void);static Bool S3_SDAC_Probe(void);static Bool S3_GENDAC_Probe(void);static Bool ATT20C490_Probe(void);static Bool SS2410_Probe(void);static Bool SC1148x_Probe(void);static Bool Null_Probe(void) {return FALSE;}static int BT485_SERIES_PreInit(void);static int TI3020_3025_PreInit(void);static int ATT409_498_PreInit(void);static int SC15025_PreInit(void);static int STG17xx_PreInit(void);static int S3_SDAC_GENDAC_PreInit(void);static int S3_TRIO_PreInit(void);static int TI3030_3026_PreInit(void);static int IBMRGB52x_PreInit(void);static int MISC_HI_COLOR_PreInit(void);static int NORMAL_PreInit(void);static int Null_PreInit(void) {return 0;}static void Null_Restore(void) {}static void S3_TRIO_Restore(void);static void TI3030_3026_Restore(void);static void TI3020_3025_Restore(void);static void BT485_Restore(void);static void ATT409_498_Restore(void);static void SC15025_Restore(void);static void STG17xx_Restore(void);static void IBMRGB52x_Restore(void);static void S3_SDAC_GENDAC_Restore(void);static void SC1148x_Restore(void);static void SS2410_Restore(void);static void ATT20C490_Restore(void);static void Null_Save(void) {}static void S3_TRIO_Save(void);static void TI3030_3026_Save(void);static void TI3020_3025_Save(void);static void BT485_Save(void);static void ATT409_498_Save(void);static void SC15025_Save(void);static void STG17xx_Save(void);static void IBMRGB52x_Save(void);static void S3_SDAC_GENDAC_Save(void);static void SC1148x_Save(void);static void SS2410_Save(void);static void ATT20C490_Save(void);static int Null_Init(DisplayModePtr mode){return 1;}static int SC1148x_Init(DisplayModePtr);static int ATT20C490_Init(DisplayModePtr);static int ATT409_498_Init(DisplayModePtr);static int STG17xx_Init(DisplayModePtr);static int S3_SDAC_Init(DisplayModePtr);static int S3_GENDAC_Init(DisplayModePtr);static int S3_TRIO_Init(DisplayModePtr);static int BT485_Init(DisplayModePtr);static int TI3020_3025_Init(DisplayModePtr);static int TI3030_3026_Init(DisplayModePtr);static int IBMRGB52x_Init(DisplayModePtr);static int SC15025_Init(DisplayModePtr);static int SS2410_Init(DisplayModePtr);extern pointer vgaNewVideoState;#define new ((vgaHWPtr)vgaNewVideoState)Bool (*s3ClockSelectFunc) (int);static Bool LegendClockSelect(int);static Bool s3ClockSelect(int);static Bool icd2061ClockSelect(int);static Bool s3GendacClockSelect(int);static Bool ti3025ClockSelect(int);static Bool ti3026ClockSelect(int);static Bool IBMRGBClockSelect(int);static void s3ProgramTi3025Clock(#if NeedFunctionPrototypes int clk, unsigned char n, unsigned char m, unsigned char p#endif);static Bool ch8391ClockSelect(int);static Bool att409ClockSelect(int);static Bool STG1703ClockSelect(int);static Bool Gloria8ClockSelect(int);static unsigned char s3DacRegs[0x101];/* NOTE: This order must be the same as the #define order in s3.h !!!!!!!! */s3RamdacInfo s3Ramdacs[] = { /* DacName, DacSpeed, DacProbe(), PreInit(), DacRestore(), DacSave(), DacInit() *//* 0 */ {"normal", 110000, NORMAL_Probe, NORMAL_PreInit,Null_Restore, Null_Save, Null_Init},/* 1 */ {"s3_trio32", 135000, S3_TRIO32_Probe, S3_TRIO_PreInit, S3_TRIO_Restore,S3_TRIO_Save,S3_TRIO_Init},/* 2 */ {"s3_trio64", 135000, S3_TRIO64_Probe, S3_TRIO_PreInit, S3_TRIO_Restore,S3_TRIO_Save,S3_TRIO_Init},/* 3 */ {"ti3026", 135000, TI3026_Probe, TI3030_3026_PreInit, TI3030_3026_Restore,TI3030_3026_Save,TI3030_3026_Init},/* 4 */ {"ti3030", 175000, TI3030_Probe, TI3030_3026_PreInit, TI3030_3026_Restore,TI3030_3026_Save,TI3030_3026_Init},/* 5 */ {"ti3020", 135000, TI3020_Probe, TI3020_3025_PreInit, TI3020_3025_Restore,TI3020_3025_Save,TI3020_3025_Init},/* 6 */ {"ti3025", 135000, TI3025_Probe, TI3020_3025_PreInit, TI3020_3025_Restore,TI3020_3025_Save,TI3020_3025_Init},/* 7 */ {"Bt485", 135000, BT485_Probe, BT485_SERIES_PreInit, BT485_Restore, BT485_Save, BT485_Init},/* 8 */ {"att20c505", 135000, ATT20C505_Probe, BT485_SERIES_PreInit, BT485_Restore, BT485_Save, BT485_Init},/* 9 */ {"att22c498", 135000, ATT22C498_Probe, ATT409_498_PreInit, ATT409_498_Restore,ATT409_498_Save,ATT409_498_Init},/* 10 */ {"att20c498", 135000, ATT498_Probe, ATT409_498_PreInit, ATT409_498_Restore, ATT409_498_Save, ATT409_498_Init},/* 11 */ {"att20c409", 135000, ATT20C409_Probe, ATT409_498_PreInit, ATT409_498_Restore, ATT409_498_Save, ATT409_498_Init},/* 12 */ {"sc15025", 110000, SC15025_Probe, SC15025_PreInit, SC15025_Restore,SC15025_Save,SC15025_Init},/* 13 */ {"stg1700", 135000, STG1700_Probe, STG17xx_PreInit, STG17xx_Restore,STG17xx_Save,STG17xx_Init},/* 14 */ {"stg1703", 135000, STG1703_Probe, STG17xx_PreInit, STG17xx_Restore,STG17xx_Save,STG17xx_Init},/* 15 */ {"ibm_rgb524", 170000, IBMRGB524_Probe, IBMRGB52x_PreInit, IBMRGB52x_Restore,IBMRGB52x_Save,IBMRGB52x_Init},/* 16 */ {"ibm_rgb525", 170000, IBMRGB525_Probe, IBMRGB52x_PreInit, IBMRGB52x_Restore,IBMRGB52x_Save,IBMRGB52x_Init},/* 17 */ {"ibm_rgb528", 170000, IBMRGB528_Probe, IBMRGB52x_PreInit, IBMRGB52x_Restore,IBMRGB52x_Save,IBMRGB52x_Init},/* 18 */ {"s3_sdac", 135000, S3_SDAC_Probe, S3_SDAC_GENDAC_PreInit, S3_SDAC_GENDAC_Restore,S3_SDAC_GENDAC_Save, S3_SDAC_Init},/* 19 */ {"s3_gendac", 110000, S3_GENDAC_Probe, S3_SDAC_GENDAC_PreInit, S3_SDAC_GENDAC_Restore,S3_SDAC_GENDAC_Save, S3_GENDAC_Init},/* 20 */ {"att20c490", 110000, ATT20C490_Probe, MISC_HI_COLOR_PreInit, ATT20C490_Restore,ATT20C490_Save,ATT20C490_Init},/* 21 */ {"ss2410", 110000, SS2410_Probe, MISC_HI_COLOR_PreInit, SS2410_Restore,SS2410_Save,SS2410_Init},/* 22 */ {"sc1148x", 110000, SC1148x_Probe, MISC_HI_COLOR_PreInit, SC1148x_Restore,SC1148x_Save,SC1148x_Init},/* 23 */ {"s3_trio64v2", 170000, S3_TRIO64V2_Probe, S3_TRIO_PreInit, S3_TRIO_Restore,S3_TRIO_Save,S3_TRIO_Init},/* 24 */ {NULL, 0, Null_Probe, Null_PreInit,Null_Restore,Null_Save, Null_Init}}; #if 0static Bool TEMPLATE_PreInit(){ /* Verify that depth is supported by ramdac */ /* Set cursor options */ /* Check if PixMux is supported and set the PixMux related flags and variables */ /* If there is an internal clock, set s3ClockSelectFunc, maxRawClock numClocks and whatever options need to be set. For external clocks, pass the job to OtherClocksSetup() */ /* Make any necessary clock alterations due to multiplexing, clock doubling, etc... s3Probe will do some last minute clock sanity checks when we return */ return 1;}#endifstatic void OtherClocksSetup(void);/*************************************************************\ BT485_DAC\*************************************************************/static Bool BT485_Probe(){ /* * Probe for the bloody thing. Set 0x3C6 to a bogus value, then * try to get the Bt485 status register. If it's there, then we will * get something else back from this port. */ Bool found = FALSE; unsigned char tmp,tmp2,saveCR43; /*quick check*/ if (!S3_928_ONLY(s3ChipId) && !S3_964_SERIES(s3ChipId) && !S3_968_SERIES(s3ChipId)) return FALSE; outb(vgaCRIndex, 0x43); saveCR43 = inb(vgaCRReg); outb(vgaCRReg, saveCR43 & ~0x02); tmp = inb(0x3C6); outb(0x3C6, 0x0F); if (((tmp2 = s3InBtStatReg()) & 0x80)) { /* * Found either a BrookTree Bt485 or AT&T 20C505. */ if ((tmp2 & 0xF0) != 0xD0) { found = TRUE; ErrorF("%s %s: Detected a BrookTree Bt485 RAMDAC\n", XCONFIG_PROBED, s3InfoRec.name); /* If it is a Bt485 and no clockchip is specified in the XF86Config, set clockchips for SPEA Mercury / Mercury P64 */ if (!OFLG_ISSET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions)) if (OFLG_ISSET(OPTION_SPEA_MERCURY, &s3InfoRec.options)) { if (S3_964_SERIES(s3ChipId)) { OFLG_SET(CLOCK_OPTION_ICD2061A, &s3InfoRec.clockOptions); OFLG_SET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions); clockchip_probed = XCONFIG_PROBED; } else if (S3_928_ONLY(s3ChipId)) { OFLG_SET(CLOCK_OPTION_SC11412, &s3InfoRec.clockOptions); OFLG_SET(CLOCK_OPTION_PROGRAMABLE, &s3InfoRec.clockOptions); clockchip_probed = XCONFIG_PROBED; } } } } outb(0x3C6, tmp); outb(vgaCRIndex, 0x43); outb(vgaCRReg, saveCR43); return found;}static int BT485_SERIES_PreInit(){ /* Verify that depth is supported by ramdac */ /* all are supported */ /* Set cursor options */ if (OFLG_ISSET(OPTION_BT485_CURS, &s3InfoRec.options)) { ErrorF("%s %s: Using hardware cursor from Bt485/20C505 RAMDAC\n", XCONFIG_GIVEN, s3InfoRec.name); } /* Check if PixMux is supported and set the PixMux related flags and variables */ if ( OFLG_ISSET(OPTION_STB_PEGASUS, &s3InfoRec.options) || OFLG_ISSET(OPTION_NUMBER_NINE, &s3InfoRec.options) || OFLG_ISSET(OPTION_MIRO_MAGIC_S4, &s3InfoRec.options) || OFLG_ISSET(OPTION_SPEA_MERCURY, &s3InfoRec.options) || S3_964_SERIES(s3ChipId) || S3_968_SERIES(s3ChipId)) { s3Bt485PixMux = TRUE; /* XXXX Are the defaults for the other parameters correct? */ pixMuxPossible = TRUE; allowPixMuxInterlace = FALSE; /* It doesn't work right (yet) */ allowPixMuxSwitching = FALSE; /* XXXX Is this right? */ if (OFLG_ISSET(OPTION_SPEA_MERCURY, &s3InfoRec.options) && S3_928_ONLY(s3ChipId)) { nonMuxMaxClock = 67500; /* Doubling only works in mux mode */ nonMuxMaxMemory = 1024; /* Can't access more without mux */ allowPixMuxSwitching = FALSE; pixMuxLimitedWidths = FALSE; pixMuxMinWidth = 1024; if (s3Bpp == 2) { nonMuxMaxMemory = 0; /* Only 2:1MUX works (yet)! */ pixMuxMinWidth = 800; } else if (s3Bpp==4) { nonMuxMaxMemory = 0; pixMuxMinWidth = 640; } } else if (OFLG_ISSET(OPTION_NUMBER_NINE, &s3InfoRec.options)) { nonMuxMaxClock = 67500; allowPixMuxSwitching = TRUE; pixMuxLimitedWidths = TRUE; pixMuxMinWidth = 800; } else if (OFLG_ISSET(OPTION_STB_PEGASUS, &s3InfoRec.options)) { allowPixMuxSwitching = TRUE; pixMuxLimitedWidths = TRUE; /* For 8bpp mode, allow PIXMUX selection based on Clock and Width. */ if (s3Bpp == 1) { nonMuxMaxClock = 85000; pixMuxMinWidth = 1024; } else { /* For 16bpp and 32bpp modes, require PIXMUX. */ nonMuxMaxClock = 0; pixMuxMinWidth = 0; } } else if (OFLG_ISSET(OPTION_MIRO_MAGIC_S4, &s3InfoRec.options)) { allowPixMuxSwitching = FALSE; pixMuxLimitedWidths = TRUE; /* For 8bpp mode, allow PIXMUX selection based on Clock and Width. */ if (s3Bpp == 1) { nonMuxMaxClock = 85000; pixMuxMinWidth = 1024; } else { /* For 16bpp and 32bpp modes, require PIXMUX. */ nonMuxMaxClock = 0; pixMuxMinWidth = 0;
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