if_ax.c

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		status = CSR_READ_4(sc, AX_ISR);
		if (status)
			CSR_WRITE_4(sc, AX_ISR, status);

		if ((status & AX_INTRS) == 0)
			break;

		if ((status & AX_ISR_TX_OK) || (status & AX_ISR_TX_EARLY))
			ax_txeof(sc);

		if (status & AX_ISR_TX_NOBUF)
			ax_txeoc(sc);

		if (status & AX_ISR_TX_IDLE) {
			ax_txeof(sc);
			if (sc->ax_cdata.ax_tx_head != NULL) {
				AX_SETBIT(sc, AX_NETCFG, AX_NETCFG_TX_ON);
				CSR_WRITE_4(sc, AX_TXSTART, 0xFFFFFFFF);
			}
		}

		if (status & AX_ISR_TX_UNDERRUN) {
			u_int32_t		cfg;
			cfg = CSR_READ_4(sc, AX_NETCFG);
			if ((cfg & AX_NETCFG_TX_THRESH) == AX_TXTHRESH_160BYTES)
				AX_SETBIT(sc, AX_NETCFG, AX_NETCFG_STORENFWD);
			else
				CSR_WRITE_4(sc, AX_NETCFG, cfg + 0x4000);
		}

		if (status & AX_ISR_RX_OK)
			ax_rxeof(sc);

		if ((status & AX_ISR_RX_WATDOGTIMEO)
					|| (status & AX_ISR_RX_NOBUF))
			ax_rxeoc(sc);

		if (status & AX_ISR_BUS_ERR) {
			ax_reset(sc);
			ax_init(sc);
		}
	}

	/* Re-enable interrupts. */
	CSR_WRITE_4(sc, AX_IMR, AX_INTRS);

	if (ifp->if_snd.ifq_head != NULL) {
		ax_start(ifp);
	}

	return;
}

/*
 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
 * pointers to the fragment pointers.
 */
static int ax_encap(sc, c, m_head)
	struct ax_softc		*sc;
	struct ax_chain		*c;
	struct mbuf		*m_head;
{
	int			frag = 0;
	volatile struct ax_desc	*f = NULL;
	int			total_len;
	struct mbuf		*m;

	/*
 	 * Start packing the mbufs in this chain into
	 * the fragment pointers. Stop when we run out
 	 * of fragments or hit the end of the mbuf chain.
	 */
	m = m_head;
	total_len = 0;

	for (m = m_head, frag = 0; m != NULL; m = m->m_next) {
		if (m->m_len != 0) {
			if (frag == AX_MAXFRAGS)
				break;
			total_len += m->m_len;
			f = &c->ax_ptr->ax_frag[frag];
			f->ax_ctl = m->m_len;
			if (frag == 0) {
				f->ax_status = 0;
				f->ax_ctl |= AX_TXCTL_FIRSTFRAG;
			} else
				f->ax_status = AX_TXSTAT_OWN;
			f->ax_next = vtophys(&c->ax_ptr->ax_frag[frag + 1]);
			f->ax_data = vtophys(mtod(m, vm_offset_t));
			frag++;
		}
	}

	/*
	 * Handle special case: we ran out of fragments,
	 * but we have more mbufs left in the chain. Copy the
	 * data into an mbuf cluster. Note that we don't
	 * bother clearing the values in the other fragment
	 * pointers/counters; it wouldn't gain us anything,
	 * and would waste cycles.
	 */
	if (m != NULL) {
		struct mbuf		*m_new = NULL;

		MGETHDR(m_new, M_DONTWAIT, MT_DATA);
		if (m_new == NULL) {
			printf("ax%d: no memory for tx list", sc->ax_unit);
			return(1);
		}
		if (m_head->m_pkthdr.len > MHLEN) {
			MCLGET(m_new, M_DONTWAIT);
			if (!(m_new->m_flags & M_EXT)) {
				m_freem(m_new);
				printf("ax%d: no memory for tx list",
						sc->ax_unit);
				return(1);
			}
		}
		m_copydata(m_head, 0, m_head->m_pkthdr.len,	
					mtod(m_new, caddr_t));
		m_new->m_pkthdr.len = m_new->m_len = m_head->m_pkthdr.len;
		m_freem(m_head);
		m_head = m_new;
		f = &c->ax_ptr->ax_frag[0];
		f->ax_status = 0;
		f->ax_data = vtophys(mtod(m_new, caddr_t));
		f->ax_ctl = total_len = m_new->m_len;
		f->ax_ctl |= AX_TXCTL_FIRSTFRAG;
		frag = 1;
	}

	c->ax_mbuf = m_head;
	c->ax_lastdesc = frag - 1;
	AX_TXCTL(c) |= AX_TXCTL_LASTFRAG|AX_TXCTL_FINT;
	c->ax_ptr->ax_frag[0].ax_ctl |= AX_TXCTL_FINT;
	AX_TXNEXT(c) = vtophys(&c->ax_nextdesc->ax_ptr->ax_frag[0]);
	return(0);
}

/*
 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
 * to the mbuf data regions directly in the transmit lists. We also save a
 * copy of the pointers since the transmit list fragment pointers are
 * physical addresses.
 */

static void ax_start(ifp)
	struct ifnet		*ifp;
{
	struct ax_softc		*sc;
	struct mbuf		*m_head = NULL;
	struct ax_chain		*cur_tx = NULL, *start_tx;

	sc = ifp->if_softc;

	if (sc->ax_autoneg) {
		sc->ax_tx_pend = 1;
		return;
	}

	/*
	 * Check for an available queue slot. If there are none,
	 * punt.
	 */
	if (sc->ax_cdata.ax_tx_free->ax_mbuf != NULL) {
		ifp->if_flags |= IFF_OACTIVE;
		return;
	}

	start_tx = sc->ax_cdata.ax_tx_free;

	while(sc->ax_cdata.ax_tx_free->ax_mbuf == NULL) {
		IF_DEQUEUE(&ifp->if_snd, m_head);
		if (m_head == NULL)
			break;

		/* Pick a descriptor off the free list. */
		cur_tx = sc->ax_cdata.ax_tx_free;
		sc->ax_cdata.ax_tx_free = cur_tx->ax_nextdesc;

		/* Pack the data into the descriptor. */
		ax_encap(sc, cur_tx, m_head);
		if (cur_tx != start_tx)
			AX_TXOWN(cur_tx) = AX_TXSTAT_OWN;

#if NBPFILTER > 0
		/*
		 * If there's a BPF listener, bounce a copy of this frame
		 * to him.
		 */
		if (ifp->if_bpf)
			bpf_mtap(ifp, cur_tx->ax_mbuf);
#endif
		AX_TXOWN(cur_tx) = AX_TXSTAT_OWN;
		CSR_WRITE_4(sc, AX_TXSTART, 0xFFFFFFFF);
	}

	sc->ax_cdata.ax_tx_tail = cur_tx;
	if (sc->ax_cdata.ax_tx_head == NULL)
		sc->ax_cdata.ax_tx_head = start_tx;

	/*
	 * Set a timeout in case the chip goes out to lunch.
	 */
	ifp->if_timer = 5;

	return;
}

static void ax_init(xsc)
	void			*xsc;
{
	struct ax_softc		*sc = xsc;
	struct ifnet		*ifp = &sc->arpcom.ac_if;
	u_int16_t		phy_bmcr = 0;
	int			s;

	if (sc->ax_autoneg)
		return;

	s = splimp();

	if (sc->ax_pinfo != NULL)
		phy_bmcr = ax_phy_readreg(sc, PHY_BMCR);

	/*
	 * Cancel pending I/O and free all RX/TX buffers.
	 */
	ax_stop(sc);
	ax_reset(sc);

	/*
	 * Set cache alignment and burst length.
	 */
	CSR_WRITE_4(sc, AX_BUSCTL, AX_BUSCTL_CONFIG);

	AX_CLRBIT(sc, AX_NETCFG, AX_NETCFG_HEARTBEAT);
	AX_CLRBIT(sc, AX_NETCFG, AX_NETCFG_STORENFWD);

	if (sc->ax_pinfo != NULL) {
		AX_SETBIT(sc, AX_NETCFG, AX_NETCFG_PORTSEL);
		ax_setcfg(sc, ax_phy_readreg(sc, PHY_BMCR));
	} else
		ax_setmode(sc, sc->ifmedia.ifm_media, 0);

	AX_CLRBIT(sc, AX_NETCFG, AX_NETCFG_TX_THRESH);
	AX_CLRBIT(sc, AX_NETCFG, AX_NETCFG_SPEEDSEL);

	if (IFM_SUBTYPE(sc->ifmedia.ifm_media) == IFM_10_T)
		AX_SETBIT(sc, AX_NETCFG, AX_TXTHRESH_160BYTES);
	else
		AX_SETBIT(sc, AX_NETCFG, AX_TXTHRESH_72BYTES);

	/* Init our MAC address */
	CSR_WRITE_4(sc, AX_FILTIDX, AX_FILTIDX_PAR0);
	CSR_WRITE_4(sc, AX_FILTDATA, *(u_int32_t *)(&sc->arpcom.ac_enaddr[0]));
	CSR_WRITE_4(sc, AX_FILTIDX, AX_FILTIDX_PAR1);
	CSR_WRITE_4(sc, AX_FILTDATA, *(u_int32_t *)(&sc->arpcom.ac_enaddr[4]));

	/* Init circular RX list. */
	if (ax_list_rx_init(sc) == ENOBUFS) {
		printf("ax%d: initialization failed: no "
			"memory for rx buffers\n", sc->ax_unit);
		ax_stop(sc);
		(void)splx(s);
		return;
	}

	/*
	 * Init tx descriptors.
	 */
	ax_list_tx_init(sc);

	 /* If we want promiscuous mode, set the allframes bit. */
	if (ifp->if_flags & IFF_PROMISC) {
		AX_SETBIT(sc, AX_NETCFG, AX_NETCFG_RX_PROMISC);
	} else {
		AX_CLRBIT(sc, AX_NETCFG, AX_NETCFG_RX_PROMISC);
	}

	/*
	 * Set the capture broadcast bit to capture broadcast frames.
	 */
	if (ifp->if_flags & IFF_BROADCAST) {
		AX_SETBIT(sc, AX_NETCFG, AX_NETCFG_RX_BROAD);
	} else {
		AX_CLRBIT(sc, AX_NETCFG, AX_NETCFG_RX_BROAD);
	}

	/*
	 * Load the multicast filter.
	 */
	ax_setmulti(sc);

	/*
	 * Load the address of the RX list.
	 */
	CSR_WRITE_4(sc, AX_RXADDR, vtophys(sc->ax_cdata.ax_rx_head->ax_ptr));
	CSR_WRITE_4(sc, AX_TXADDR, vtophys(&sc->ax_ldata->ax_tx_list[0]));

	/*
	 * Enable interrupts.
	 */
	CSR_WRITE_4(sc, AX_IMR, AX_INTRS);
	CSR_WRITE_4(sc, AX_ISR, 0xFFFFFFFF);

	/* Enable receiver and transmitter. */
	AX_SETBIT(sc, AX_NETCFG, AX_NETCFG_TX_ON|AX_NETCFG_RX_ON);
	CSR_WRITE_4(sc, AX_RXSTART, 0xFFFFFFFF);

	/* Restore state of BMCR */
	if (sc->ax_pinfo != NULL)
		ax_phy_writereg(sc, PHY_BMCR, phy_bmcr);

	ifp->if_flags |= IFF_RUNNING;
	ifp->if_flags &= ~IFF_OACTIVE;

	(void)splx(s);

	return;
}

/*
 * Set media options.
 */
static int ax_ifmedia_upd(ifp)
	struct ifnet		*ifp;
{
	struct ax_softc		*sc;
	struct ifmedia		*ifm;

	sc = ifp->if_softc;
	ifm = &sc->ifmedia;

	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
		return(EINVAL);

	if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO)
		ax_autoneg_mii(sc, AX_FLAG_SCHEDDELAY, 1);
	else {
		if (sc->ax_pinfo == NULL)
			ax_setmode(sc, ifm->ifm_media, 1);
		else
			ax_setmode_mii(sc, ifm->ifm_media);
	}

	return(0);
}

/*
 * Report current media status.
 */
static void ax_ifmedia_sts(ifp, ifmr)
	struct ifnet		*ifp;
	struct ifmediareq	*ifmr;
{
	struct ax_softc		*sc;
	u_int16_t		advert = 0, ability = 0;
	u_int32_t		media = 0;

	sc = ifp->if_softc;

	ifmr->ifm_active = IFM_ETHER;

	if (sc->ax_pinfo == NULL) {
		media = CSR_READ_4(sc, AX_NETCFG);
		if (media & AX_NETCFG_PORTSEL)
			ifmr->ifm_active = IFM_ETHER|IFM_100_TX;
		else
			ifmr->ifm_active = IFM_ETHER|IFM_10_T;
		if (media & AX_NETCFG_FULLDUPLEX)
			ifmr->ifm_active |= IFM_FDX;
		else
			ifmr->ifm_active |= IFM_HDX;
		return;
	}

	if (!(ax_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_AUTONEGENBL)) {
		if (ax_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_SPEEDSEL)
			ifmr->ifm_active = IFM_ETHER|IFM_100_TX;
		else
			ifmr->ifm_active = IFM_ETHER|IFM_10_T;
		if (ax_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_DUPLEX)
			ifmr->ifm_active |= IFM_FDX;
		else
			ifmr->ifm_active |= IFM_HDX;
		return;
	}

	ability = ax_phy_readreg(sc, PHY_LPAR);
	advert = ax_phy_readreg(sc, PHY_ANAR);
	if (advert & PHY_ANAR_100BT4 &&
		ability & PHY_ANAR_100BT4) {
		ifmr->ifm_active = IFM_ETHER|IFM_100_T4;
	} else if (advert & PHY_ANAR_100BTXFULL &&
		ability & PHY_ANAR_100BTXFULL) {
		ifmr->ifm_active = IFM_ETHER|IFM_100_TX|IFM_FDX;
	} else if (advert & PHY_ANAR_100BTXHALF &&
		ability & PHY_ANAR_100BTXHALF) {
		ifmr->ifm_active = IFM_ETHER|IFM_100_TX|IFM_HDX;
	} else if (advert & PHY_ANAR_10BTFULL &&
		ability & PHY_ANAR_10BTFULL) {
		ifmr->ifm_active = IFM_ETHER|IFM_10_T|IFM_FDX;
	} else if (advert & PHY_ANAR_10BTHALF &&
		ability & PHY_ANAR_10BTHALF) {
		ifmr->ifm_active = IFM_ETHER|IFM_10_T|IFM_HDX;
	}

	return;
}

static int ax_ioctl(ifp, command, data)
	struct ifnet		*ifp;
	u_long			command;
	caddr_t			data;
{
	struct ax_softc		*sc = ifp->if_softc;
	struct ifreq		*ifr = (struct ifreq *) data;
	int			s, error = 0;

	s = splimp();

	switch(command) {
	case SIOCSIFADDR:
	case SIOCGIFADDR:
	case SIOCSIFMTU:
		error = ether_ioctl(ifp, command, data);
		break;
	case SIOCSIFFLAGS:
		if (ifp->if_flags & IFF_UP) {
			ax_init(sc);
		} else {
			if (ifp->if_flags & IFF_RUNNING)
				ax_stop(sc);
		}
		error = 0;
		break;
	case SIOCADDMULTI:
	case SIOCDELMULTI:
		ax_setmulti(sc);
		error = 0;
		break;
	case SIOCGIFMEDIA:
	case SIOCSIFMEDIA:
		error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command);
		break;
	default:
		error = EINVAL;
		break;
	}

	(void)splx(s);

	return(error);
}

static void ax_watchdog(ifp)
	struct ifnet		*ifp;
{
	struct ax_softc		*sc;

	sc = ifp->if_softc;

	if (sc->ax_autoneg) {
		ax_autoneg_mii(sc, AX_FLAG_DELAYTIMEO, 1);
		return;
	}

	ifp->if_oerrors++;
	printf("ax%d: watchdog timeout\n", sc->ax_unit);

	if (sc->ax_pinfo != NULL) {
		if (!(ax_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
			printf("ax%d: no carrier - transceiver "
				"cable problem?\n", sc->ax_unit);
	}

	ax_stop(sc);
	ax_reset(sc);
	ax_init(sc);

	if (ifp->if_snd.ifq_head != NULL)
		ax_start(ifp);

	return;
}

/*
 * Stop the adapter and free any mbufs allocated to the
 * RX and TX lists.
 */
static void ax_stop(sc)
	struct ax_softc		*sc;
{
	register int		i;
	struct ifnet		*ifp;

	ifp = &sc->arpcom.ac_if;
	ifp->if_timer = 0;

	AX_CLRBIT(sc, AX_NETCFG, (AX_NETCFG_RX_ON|AX_NETCFG_TX_ON));
	CSR_WRITE_4(sc, AX_IMR, 0x00000000);
	CSR_WRITE_4(sc, AX_TXADDR, 0x00000000);
	CSR_WRITE_4(sc, AX_RXADDR, 0x00000000);

	/*
	 * Free data in the RX lists.
	 */
	for (i = 0; i < AX_RX_LIST_CNT; i++) {
		if (sc->ax_cdata.ax_rx_chain[i].ax_mbuf != NULL) {
			m_freem(sc->ax_cdata.ax_rx_chain[i].ax_mbuf);
			sc->ax_cdata.ax_rx_chain[i].ax_mbuf = NULL;
		}
	}
	bzero((char *)&sc->ax_ldata->ax_rx_list,
		sizeof(sc->ax_ldata->ax_rx_list));

	/*
	 * Free the TX list buffers.
	 */
	for (i = 0; i < AX_TX_LIST_CNT; i++) {
		if (sc->ax_cdata.ax_tx_chain[i].ax_mbuf != NULL) {
			m_freem(sc->ax_cdata.ax_tx_chain[i].ax_mbuf);
			sc->ax_cdata.ax_tx_chain[i].ax_mbuf = NULL;
		}
	}

	bzero((char *)&sc->ax_ldata->ax_tx_list,
		sizeof(sc->ax_ldata->ax_tx_list));

	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);

	return;
}

/*
 * Stop all chip I/O so that the kernel's probe routines don't
 * get confused by errant DMAs when rebooting.
 */
static void ax_shutdown(howto, arg)
	int			howto;
	void			*arg;
{
	struct ax_softc		*sc = (struct ax_softc *)arg;

	ax_stop(sc);

	return;
}

static struct pci_device ax_device = {
	"ax",
	ax_probe,
	ax_attach,
	&ax_count,
	NULL
};
DATA_SET(pcidevice_set, ax_device);