if_tlreg.h

基于组件方式开发操作系统的OSKIT源代码

/*
 * Copyright (c) 1997, 1998
 *	Bill Paul <[e-mail]>.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by Bill Paul.
 * 4. Neither the name of the author nor the names of any co-contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 * THE POSSIBILITY OF SUCH DAMAGE.
 *
 *	$Id: if_tlreg.h,v 1.7.2.2 1999/03/31 04:12:29 wpaul Exp $
 */


struct tl_type {
	u_int16_t		tl_vid;
	u_int16_t		tl_did;
	char			*tl_name;
};

/*
 * ThunderLAN TX/RX list format. The TX and RX lists are pretty much
 * identical: the list begins with a 32-bit forward pointer which points
 * at the next list in the chain, followed by 16 bits for the total
 * frame size, and a 16 bit status field. This is followed by a series
 * of 10 32-bit data count/data address pairs that point to the fragments
 * that make up the complete frame.
 */

#define TL_MAXFRAGS		10
#define TL_RX_LIST_CNT		20
#define TL_TX_LIST_CNT		20
#define TL_MIN_FRAMELEN		64

struct tl_frag {
	u_int32_t		tlist_dcnt;
	u_int32_t		tlist_dadr;
};

struct tl_list {
	u_int32_t		tlist_fptr;	/* phys address of next list */
	u_int16_t		tlist_cstat;	/* status word */
	u_int16_t		tlist_frsize;	/* size of data in frame */
	struct tl_frag		tl_frag[TL_MAXFRAGS];
};

/*
 * This is a special case of an RX list. By setting the One_Frag
 * bit in the NETCONFIG register, the driver can force the ThunderLAN
 * chip to use only one fragment when DMAing RX frames.
 */

struct tl_list_onefrag {
	u_int32_t		tlist_fptr;
	u_int16_t		tlist_cstat;
	u_int16_t		tlist_frsize;
	struct tl_frag		tl_frag;
};

struct tl_list_data {
	struct tl_list_onefrag	tl_rx_list[TL_RX_LIST_CNT];
	struct tl_list		tl_tx_list[TL_TX_LIST_CNT];
	unsigned char		tl_pad[TL_MIN_FRAMELEN];
};

struct tl_chain {
	struct tl_list		*tl_ptr;
	struct mbuf		*tl_mbuf;
	struct tl_chain		*tl_next;
};

struct tl_chain_onefrag {
	struct tl_list_onefrag	*tl_ptr;
	struct mbuf		*tl_mbuf;
	struct tl_chain_onefrag	*tl_next;
};

struct tl_chain_data {
	struct tl_chain_onefrag	tl_rx_chain[TL_RX_LIST_CNT];
	struct tl_chain		tl_tx_chain[TL_TX_LIST_CNT];

	struct tl_chain_onefrag	*tl_rx_head;
	struct tl_chain_onefrag	*tl_rx_tail;

	struct tl_chain		*tl_tx_head;
	struct tl_chain		*tl_tx_tail;
	struct tl_chain		*tl_tx_free;
};

struct tl_softc {
	struct arpcom		arpcom;		/* interface info */
	struct ifmedia		ifmedia;	/* media info */
	bus_space_handle_t	tl_bhandle;
	bus_space_tag_t		tl_btag;
	struct tl_type		*tl_dinfo;	/* ThunderLAN adapter info */
	struct tl_type		*tl_pinfo;	/* PHY info struct */
	u_int8_t		tl_ctlr;	/* chip number */
	u_int8_t		tl_unit;	/* interface number */
	u_int8_t		tl_eeaddr;
	u_int8_t		tl_phy_addr;	/* PHY address */
	u_int8_t		tl_tx_pend;	/* TX pending */
	u_int8_t		tl_want_auto;	/* autoneg scheduled */
	u_int8_t		tl_autoneg;	/* autoneg in progress */
	u_int16_t		tl_phy_sts;	/* PHY status */
	u_int16_t		tl_phy_vid;	/* PHY vendor ID */
	u_int16_t		tl_phy_did;	/* PHY device ID */
	caddr_t			tl_ldata_ptr;
	struct tl_list_data	*tl_ldata;	/* TX/RX lists and mbufs */
	struct tl_chain_data	tl_cdata;
	u_int8_t		tl_txeoc;
	u_int8_t		tl_bitrate;
	struct callout_handle	tl_stat_ch;
};

/*
 * Transmit interrupt threshold.
 */
#define TX_THR		0x00000004

#define TL_FLAG_FORCEDELAY	1
#define TL_FLAG_SCHEDDELAY	2
#define TL_FLAG_DELAYTIMEO	3

/*
 * The ThunderLAN supports up to 32 PHYs.
 */
#define TL_PHYADDR_MIN		0x00
#define TL_PHYADDR_MAX		0x1F

#define PHY_UNKNOWN	6

#define TL_PHYS_IDLE	-1

/*
 * General constants that are fun to know.
 *
 * The ThunderLAN controller is made by Texas Instruments. The
 * manual indicates that if the EEPROM checksum fails, the PCI
 * vendor and device ID registers will be loaded with TI-specific
 * values.
 */
#define	TI_VENDORID		0x104C
#define	TI_DEVICEID_THUNDERLAN	0x0500

/*
 * Known PHY Ids. According to the Level 1 documentation (which is
 * very nice, incidentally), here's how they work:
 *
 * The PHY identifier register #1 is composed of bits 3 through 18
 * of the OUI. (First 16-bit word.)
 * The PHY identifier register #2 is composed of bits 19 through 24
 * if the OUI.
 * This is followed by 6 bits containing the manufacturer's model
 * number.
 * Lastly, there are 4 bits for the manufacturer's revision number.
 *
 * Honestly, there are a lot of these that don't make any sense; the
 * only way to be really sure is to look at the data sheets.
 */

/*
 * Texas Instruments PHY identifiers
 *
 * The ThunderLAN manual has a curious and confusing error in it.
 * In chapter 7, which describes PHYs, it says that TI PHYs have
 * the following ID codes, where xx denotes a revision:
 *
 * 0x4000501xx			internal 10baseT PHY
 * 0x4000502xx			TNETE211 100VG-AnyLan PMI
 *
 * The problem here is that these are not valid 32-bit hex numbers:
 * there's one digit too many. My guess is that they mean the internal
 * 10baseT PHY is 0x4000501x and the TNETE211 is 0x4000502x since these
 * are the only numbers that make sense.
 */
#define TI_PHY_VENDORID		0x4000
#define TI_PHY_10BT		0x501F
#define TI_PHY_100VGPMI		0x502F

/*
 * These ID values are for the NS DP83840A 10/100 PHY
 */
#define NS_PHY_VENDORID		0x2000
#define NS_PHY_83840A		0x5C0F

/*
 * Level 1 10/100 PHY
 */
#define LEVEL1_PHY_VENDORID	0x7810
#define LEVEL1_PHY_LXT970	0x000F

/*
 * Intel 82555 10/100 PHY
 */
#define INTEL_PHY_VENDORID	0x0A28
#define INTEL_PHY_82555		0x015F

/*
 * SEEQ 80220 10/100 PHY
 */
#define SEEQ_PHY_VENDORID	0x0016
#define SEEQ_PHY_80220		0xF83F

/*
 * These are the PCI vendor and device IDs for Compaq ethernet
 * adapters based on the ThunderLAN controller.
 */
#define COMPAQ_VENDORID				0x0E11
#define COMPAQ_DEVICEID_NETEL_10_100		0xAE32
#define COMPAQ_DEVICEID_NETEL_UNKNOWN		0xAE33
#define COMPAQ_DEVICEID_NETEL_10		0xAE34
#define COMPAQ_DEVICEID_NETFLEX_3P_INTEGRATED	0xAE35
#define COMPAQ_DEVICEID_NETEL_10_100_DUAL	0xAE40
#define COMPAQ_DEVICEID_NETEL_10_100_PROLIANT	0xAE43
#define COMPAQ_DEVICEID_NETEL_10_100_EMBEDDED	0xB011
#define COMPAQ_DEVICEID_NETEL_10_T2_UTP_COAX	0xB012
#define COMPAQ_DEVICEID_NETEL_10_100_TX_UTP	0xB030
#define COMPAQ_DEVICEID_NETFLEX_3P		0xF130
#define COMPAQ_DEVICEID_NETFLEX_3P_BNC		0xF150

/*
 * These are the PCI vendor and device IDs for Olicom
 * adapters based on the ThunderLAN controller.
 */
#define OLICOM_VENDORID				0x108D
#define OLICOM_DEVICEID_OC2183			0x0013
#define OLICOM_DEVICEID_OC2325			0x0012
#define OLICOM_DEVICEID_OC2326			0x0014

/*
 * PCI low memory base and low I/O base
 */
#define TL_PCI_LOIO		0x10
#define TL_PCI_LOMEM		0x14

/*
 * PCI latency timer (it's actually 0x0D, but we want a value
 * that's longword aligned).
 */
#define TL_PCI_LATENCY_TIMER	0x0C

#define	TL_DIO_ADDR_INC		0x8000	/* Increment addr on each read */
#define TL_DIO_RAM_SEL		0x4000	/* RAM address select */
#define	TL_DIO_ADDR_MASK	0x3FFF	/* address bits mask */

/*
 * Interrupt types
 */
#define TL_INTR_INVALID		0x0
#define TL_INTR_TXEOF		0x1
#define TL_INTR_STATOFLOW	0x2
#define TL_INTR_RXEOF		0x3
#define TL_INTR_DUMMY		0x4
#define TL_INTR_TXEOC		0x5
#define TL_INTR_ADCHK		0x6
#define TL_INTR_RXEOC		0x7

#define TL_INT_MASK		0x001C
#define TL_VEC_MASK		0x1FE0
/*
 * Host command register bits
 */
#define TL_CMD_GO               0x80000000
#define TL_CMD_STOP             0x40000000
#define TL_CMD_ACK              0x20000000
#define TL_CMD_CHSEL7		0x10000000
#define TL_CMD_CHSEL6		0x08000000
#define TL_CMD_CHSEL5		0x04000000
#define TL_CMD_CHSEL4		0x02000000
#define TL_CMD_CHSEL3		0x01000000
#define TL_CMD_CHSEL2           0x00800000
#define TL_CMD_CHSEL1           0x00400000
#define TL_CMD_CHSEL0           0x00200000
#define TL_CMD_EOC              0x00100000
#define TL_CMD_RT               0x00080000
#define TL_CMD_NES              0x00040000
#define TL_CMD_ZERO0            0x00020000
#define TL_CMD_ZERO1            0x00010000
#define TL_CMD_ADRST            0x00008000
#define TL_CMD_LDTMR            0x00004000
#define TL_CMD_LDTHR            0x00002000
#define TL_CMD_REQINT           0x00001000
#define TL_CMD_INTSOFF          0x00000800
#define TL_CMD_INTSON		0x00000400
#define TL_CMD_RSVD0		0x00000200
#define TL_CMD_RSVD1		0x00000100
#define TL_CMD_ACK7		0x00000080
#define TL_CMD_ACK6		0x00000040
#define TL_CMD_ACK5		0x00000020
#define TL_CMD_ACK4		0x00000010
#define TL_CMD_ACK3		0x00000008
#define TL_CMD_ACK2		0x00000004
#define TL_CMD_ACK1		0x00000002
#define TL_CMD_ACK0		0x00000001

#define TL_CMD_CHSEL_MASK	0x01FE0000
#define TL_CMD_ACK_MASK		0xFF

/*
 * EEPROM address where station address resides.
 */
#define TL_EEPROM_EADDR		0x83
#define TL_EEPROM_EADDR2	0x99
#define TL_EEPROM_EADDR3	0xAF
#define TL_EEPROM_EADDR_OC	0xF8	/* Olicom cards use a different
					   address than Compaqs. */
/*
 * ThunderLAN host command register offsets.
 * (Can be accessed either by IO ports or memory map.)
 */
#define TL_HOSTCMD		0x00
#define TL_CH_PARM		0x04
#define TL_DIO_ADDR		0x08
#define TL_HOST_INT		0x0A
#define TL_DIO_DATA		0x0C

/*
 * ThunderLAN internal registers
 */
#define TL_NETCMD		0x00
#define TL_NETSIO		0x01
#define TL_NETSTS		0x02
#define TL_NETMASK		0x03

#define TL_NETCONFIG		0x04
#define TL_MANTEST		0x06

#define TL_VENID_LSB		0x08
#define TL_VENID_MSB		0x09
#define TL_DEVID_LSB		0x0A
#define TL_DEVID_MSB		0x0B

#define TL_REVISION		0x0C
#define TL_SUBCLASS		0x0D
#define TL_MINLAT		0x0E
#define TL_MAXLAT		0x0F

#define TL_AREG0_B5		0x10
#define TL_AREG0_B4		0x11
#define TL_AREG0_B3		0x12
#define TL_AREG0_B2		0x13

#define TL_AREG0_B1		0x14
#define TL_AREG0_B0		0x15
#define TL_AREG1_B5		0x16
#define TL_AREG1_B4		0x17

#define TL_AREG1_B3		0x18
#define TL_AREG1_B2		0x19
#define TL_AREG1_B1		0x1A
#define TL_AREG1_B0		0x1B

#define TL_AREG2_B5		0x1C
#define TL_AREG2_B4		0x1D
#define TL_AREG2_B3		0x1E
#define TL_AREG2_B2		0x1F

#define TL_AREG2_B1		0x20
#define TL_AREG2_B0		0x21
#define TL_AREG3_B5		0x22
#define TL_AREG3_B4		0x23

#define TL_AREG3_B3		0x24
#define TL_AREG3_B2		0x25
#define TL_AREG3_B1		0x26
#define TL_AREG3_B0		0x27

#define TL_HASH1		0x28
#define TL_HASH2		0x2C
#define TL_TXGOODFRAMES		0x30
#define TL_TXUNDERRUN		0x33
#define TL_RXGOODFRAMES		0x34
#define TL_RXOVERRUN		0x37
#define TL_DEFEREDTX		0x38
#define TL_CRCERROR		0x3A
#define TL_CODEERROR		0x3B
#define TL_MULTICOLTX		0x3C
#define TL_SINGLECOLTX		0x3E
#define TL_EXCESSIVECOL		0x40
#define TL_LATECOL		0x41
#define TL_CARRIERLOSS		0x42
#define TL_ACOMMIT		0x43
#define TL_LDREG		0x44
#define TL_BSIZEREG		0x45
#define TL_MAXRX		0x46

/*