if_pn.c

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/* * Copyright (c) 1997, 1998 *	Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright *    notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright *    notice, this list of conditions and the following disclaimer in the *    documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software *    must display the following acknowledgement: *	This product includes software developed by Bill Paul. * 4. Neither the name of the author nor the names of any co-contributors *    may be used to endorse or promote products derived from this software *    without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. * *	$Id: if_pn.c,v 1.6.2.10 1999/04/14 19:44:53 wpaul Exp $ *//* * 82c168/82c169 PNIC fast ethernet PCI NIC driver * * Supports various network adapters based on the Lite-On PNIC * PCI network controller chip including the LinkSys LNE100TX. * * Written by Bill Paul <wpaul@ctr.columbia.edu> * Electrical Engineering Department * Columbia University, New York City *//* * The PNIC chip is a DEC tulip clone. This driver uses much of the * same code from the driver for the Winbond chip (which is also a * tulip clone) except for the MII, EEPROM and filter programming. * * Technically we could merge support for this chip into the 'de' * driver, but it's such a mess that I'm afraid to go near it. * * The PNIC appears to support both an external MII and an internal * transceiver. I think most 100Mbps implementations use a PHY attached * the the MII. The LinkSys board that I have uses a Myson MTD972 * 100BaseTX PHY. */#include "bpfilter.h"#include <sys/param.h>#include <sys/systm.h>#include <sys/sockio.h>#include <sys/mbuf.h>#include <sys/malloc.h>#include <sys/kernel.h>#include <sys/socket.h>#include <net/if.h>#include <net/if_arp.h>#include <net/ethernet.h>#include <net/if_dl.h>#include <net/if_media.h>#if NBPFILTER > 0#include <net/bpf.h>#endif#include <vm/vm.h>              /* for vtophys */#include <vm/pmap.h>            /* for vtophys */#include <machine/clock.h>      /* for DELAY */#include <machine/bus_pio.h>#include <machine/bus_memio.h>#include <machine/bus.h>#include <pci/pcireg.h>#include <pci/pcivar.h>#define PN_USEIOSPACE/* #define PN_BACKGROUND_AUTONEG */#define PN_RX_BUG_WAR#include <pci/if_pnreg.h>#ifndef lintstatic const char rcsid[] =	"$Id: if_pn.c,v 1.6.2.10 1999/04/14 19:44:53 wpaul Exp $";#endif/* * Various supported device vendors/types and their names. */static struct pn_type pn_devs[] = {	{ PN_VENDORID, PN_DEVICEID_PNIC,		"82c168 PNIC 10/100BaseTX" },	{ PN_VENDORID, PN_DEVICEID_PNIC,		"82c169 PNIC 10/100BaseTX" },	{ PN_VENDORID, PN_DEVICEID_PNIC_II,		"82c115 PNIC II 10/100BaseTX" },	{ 0, 0, NULL }};/* * Various supported PHY vendors/types and their names. Note that * this driver will work with pretty much any MII-compliant PHY, * so failure to positively identify the chip is not a fatal error. */static struct pn_type pn_phys[] = {	{ TI_PHY_VENDORID, TI_PHY_10BT, "<TI ThunderLAN 10BT (internal)>" },	{ TI_PHY_VENDORID, TI_PHY_100VGPMI, "<TI TNETE211 100VG Any-LAN>" },	{ NS_PHY_VENDORID, NS_PHY_83840A, "<National Semiconductor DP83840A>"},	{ LEVEL1_PHY_VENDORID, LEVEL1_PHY_LXT970, "<Level 1 LXT970>" }, 	{ INTEL_PHY_VENDORID, INTEL_PHY_82555, "<Intel 82555>" },	{ SEEQ_PHY_VENDORID, SEEQ_PHY_80220, "<SEEQ 80220>" },	{ 0, 0, "<MII-compliant physical interface>" }};static unsigned long pn_count = 0;static const char *pn_probe	__P((pcici_t, pcidi_t));static void pn_attach		__P((pcici_t, int));static int pn_newbuf		__P((struct pn_softc *,						struct pn_chain_onefrag *));static int pn_encap		__P((struct pn_softc *, struct pn_chain *,						struct mbuf *));#ifdef PN_RX_BUG_WARstatic void pn_rx_bug_war	__P((struct pn_softc *,						struct pn_chain_onefrag *));#endifstatic void pn_rxeof		__P((struct pn_softc *));static void pn_rxeoc		__P((struct pn_softc *));static void pn_txeof		__P((struct pn_softc *));static void pn_txeoc		__P((struct pn_softc *));static void pn_intr		__P((void *));static void pn_start		__P((struct ifnet *));static int pn_ioctl		__P((struct ifnet *, u_long, caddr_t));static void pn_init		__P((void *));static void pn_stop		__P((struct pn_softc *));static void pn_watchdog		__P((struct ifnet *));static void pn_shutdown		__P((int, void *));static int pn_ifmedia_upd	__P((struct ifnet *));static void pn_ifmedia_sts	__P((struct ifnet *, struct ifmediareq *));static void pn_eeprom_getword	__P((struct pn_softc *, u_int8_t, u_int16_t *));static void pn_read_eeprom	__P((struct pn_softc *, caddr_t, int,							int, int));static u_int16_t pn_phy_readreg	__P((struct pn_softc *, int));static void pn_phy_writereg	__P((struct pn_softc *, u_int16_t, u_int16_t));static void pn_autoneg_xmit	__P((struct pn_softc *));static void pn_autoneg_mii	__P((struct pn_softc *, int, int));static void pn_setmode_mii	__P((struct pn_softc *, int));static void pn_getmode_mii	__P((struct pn_softc *));static void pn_autoneg		__P((struct pn_softc *, int, int));static void pn_setmode		__P((struct pn_softc *, int));static void pn_setcfg		__P((struct pn_softc *, u_int32_t));static u_int32_t pn_calchash	__P((u_int8_t *));static void pn_setfilt		__P((struct pn_softc *));static void pn_reset		__P((struct pn_softc *));static int pn_list_rx_init	__P((struct pn_softc *));static int pn_list_tx_init	__P((struct pn_softc *));#define PN_SETBIT(sc, reg, x)				\	CSR_WRITE_4(sc, reg,				\		CSR_READ_4(sc, reg) | (x))#define PN_CLRBIT(sc, reg, x)				\	CSR_WRITE_4(sc, reg,				\		CSR_READ_4(sc, reg) & ~(x))/* * Read a word of data stored in the EEPROM at address 'addr.' */static void pn_eeprom_getword(sc, addr, dest)	struct pn_softc		*sc;	u_int8_t		addr;	u_int16_t		*dest;{	register int		i;	u_int32_t		r;	CSR_WRITE_4(sc, PN_SIOCTL, PN_EE_READ|addr);	for (i = 0; i < PN_TIMEOUT; i++) {		DELAY(1);		r = CSR_READ_4(sc, PN_SIO);		if (!(r & PN_SIO_BUSY)) {			*dest = (u_int16_t)(r & 0x0000FFFF);			return;		}	}	return;}/* * Read a sequence of words from the EEPROM. */static void pn_read_eeprom(sc, dest, off, cnt, swap)	struct pn_softc		*sc;	caddr_t			dest;	int			off;	int			cnt;	int			swap;{	int			i;	u_int16_t		word = 0, *ptr;	for (i = 0; i < cnt; i++) {		pn_eeprom_getword(sc, off + i, &word);		ptr = (u_int16_t *)(dest + (i * 2));		if (swap)			*ptr = ntohs(word);		else			*ptr = word;	}	return;}static u_int16_t pn_phy_readreg(sc, reg)	struct pn_softc		*sc;	int			reg;{	int			i;	u_int32_t		rval;	CSR_WRITE_4(sc, PN_MII,		PN_MII_READ | (sc->pn_phy_addr << 23) | (reg << 18));	for (i = 0; i < PN_TIMEOUT; i++) {		DELAY(1);		rval = CSR_READ_4(sc, PN_MII);		if (!(rval & PN_MII_BUSY)) {			if ((u_int16_t)(rval & 0x0000FFFF) == 0xFFFF)				return(0);			else				return((u_int16_t)(rval & 0x0000FFFF));		}	}	return(0);}static void pn_phy_writereg(sc, reg, data)	struct pn_softc		*sc;	u_int16_t		reg;	u_int16_t		data;{	int			i;	CSR_WRITE_4(sc, PN_MII,		PN_MII_WRITE | (sc->pn_phy_addr << 23) | (reg << 18) | data);	for (i = 0; i < PN_TIMEOUT; i++) {		if (!(CSR_READ_4(sc, PN_MII) & PN_MII_BUSY))			break;	}	return;}#define PN_POLY		0xEDB88320#define PN_BITS		9static u_int32_t pn_calchash(addr)	u_int8_t		*addr;{	u_int32_t		idx, bit, data, crc;	/* Compute CRC for the address value. */	crc = 0xFFFFFFFF; /* initial value */	for (idx = 0; idx < 6; idx++) {		for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)			crc = (crc >> 1) ^ (((crc ^ data) & 1) ? PN_POLY : 0);	}	return (crc & ((1 << PN_BITS) - 1));}/* * Initiate an autonegotiation session. */static void pn_autoneg_xmit(sc)	struct pn_softc		*sc;{	u_int16_t		phy_sts;	pn_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET);	DELAY(500);	while(pn_phy_readreg(sc, PHY_BMCR)			& PHY_BMCR_RESET);	phy_sts = pn_phy_readreg(sc, PHY_BMCR);	phy_sts |= PHY_BMCR_AUTONEGENBL|PHY_BMCR_AUTONEGRSTR;	pn_phy_writereg(sc, PHY_BMCR, phy_sts);	return;}/* * Invoke autonegotiation on a PHY. */static void pn_autoneg_mii(sc, flag, verbose)	struct pn_softc		*sc;	int			flag;	int			verbose;{	u_int16_t		phy_sts = 0, media, advert, ability;	struct ifnet		*ifp;	struct ifmedia		*ifm;	ifm = &sc->ifmedia;	ifp = &sc->arpcom.ac_if;	ifm->ifm_media = IFM_ETHER | IFM_AUTO;	/*	 * The 100baseT4 PHY on the 3c905-T4 has the 'autoneg supported'	 * bit cleared in the status register, but has the 'autoneg enabled'	 * bit set in the control register. This is a contradiction, and	 * I'm not sure how to handle it. If you want to force an attempt	 * to autoneg for 100baseT4 PHYs, #define FORCE_AUTONEG_TFOUR	 * and see what happens.	 */#ifndef FORCE_AUTONEG_TFOUR	/*	 * First, see if autoneg is supported. If not, there's	 * no point in continuing.	 */	phy_sts = pn_phy_readreg(sc, PHY_BMSR);	if (!(phy_sts & PHY_BMSR_CANAUTONEG)) {		if (verbose)			printf("pn%d: autonegotiation not supported\n",							sc->pn_unit);		ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX;			return;	}#endif	switch (flag) {	case PN_FLAG_FORCEDELAY:		/*	 	 * XXX Never use this option anywhere but in the probe	 	 * routine: making the kernel stop dead in its tracks 		 * for three whole seconds after we've gone multi-user		 * is really bad manners.	 	 */		pn_autoneg_xmit(sc);		DELAY(5000000);		break;	case PN_FLAG_SCHEDDELAY:		/*		 * Wait for the transmitter to go idle before starting		 * an autoneg session, otherwise pn_start() may clobber	 	 * our timeout, and we don't want to allow transmission		 * during an autoneg session since that can screw it up.	 	 */		if (sc->pn_cdata.pn_tx_head != NULL) {			sc->pn_want_auto = 1;			return;		}		pn_autoneg_xmit(sc);		ifp->if_timer = 5;		sc->pn_autoneg = 1;		sc->pn_want_auto = 0;		return;		break;	case PN_FLAG_DELAYTIMEO:		ifp->if_timer = 0;		sc->pn_autoneg = 0;		break;	default:		printf("pn%d: invalid autoneg flag: %d\n", sc->pn_unit, flag);		return;	}	if (pn_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_AUTONEGCOMP) {		if (verbose)			printf("pn%d: autoneg complete, ", sc->pn_unit);		phy_sts = pn_phy_readreg(sc, PHY_BMSR);	} else {		if (verbose)			printf("pn%d: autoneg not complete, ", sc->pn_unit);	}	media = pn_phy_readreg(sc, PHY_BMCR);	/* Link is good. Report modes and set duplex mode. */	if (pn_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT) {		if (verbose)			printf("link status good ");		advert = pn_phy_readreg(sc, PHY_ANAR);		ability = pn_phy_readreg(sc, PHY_LPAR);		if (advert & PHY_ANAR_100BT4 && ability & PHY_ANAR_100BT4) {			ifm->ifm_media = IFM_ETHER|IFM_100_T4;			media |= PHY_BMCR_SPEEDSEL;			media &= ~PHY_BMCR_DUPLEX;			printf("(100baseT4)\n");		} else if (advert & PHY_ANAR_100BTXFULL &&			ability & PHY_ANAR_100BTXFULL) {			ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_FDX;			media |= PHY_BMCR_SPEEDSEL;			media |= PHY_BMCR_DUPLEX;			printf("(full-duplex, 100Mbps)\n");		} else if (advert & PHY_ANAR_100BTXHALF &&			ability & PHY_ANAR_100BTXHALF) {			ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_HDX;			media |= PHY_BMCR_SPEEDSEL;			media &= ~PHY_BMCR_DUPLEX;			printf("(half-duplex, 100Mbps)\n");		} else if (advert & PHY_ANAR_10BTFULL &&			ability & PHY_ANAR_10BTFULL) {			ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX;			media &= ~PHY_BMCR_SPEEDSEL;			media |= PHY_BMCR_DUPLEX;			printf("(full-duplex, 10Mbps)\n");		} else if (advert & PHY_ANAR_10BTHALF &&			ability & PHY_ANAR_10BTHALF) {			ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX;			media &= ~PHY_BMCR_SPEEDSEL;			media &= ~PHY_BMCR_DUPLEX;			printf("(half-duplex, 10Mbps)\n");		}		media &= ~PHY_BMCR_AUTONEGENBL;		/* Set ASIC's duplex mode to match the PHY. */		pn_setcfg(sc, ifm->ifm_media);		pn_phy_writereg(sc, PHY_BMCR, media);	} else {		if (verbose)			printf("no carrier\n");	}	pn_init(sc);	if (sc->pn_tx_pend) {		sc->pn_autoneg = 0;		sc->pn_tx_pend = 0;		pn_start(ifp);	}	return;}static void pn_getmode_mii(sc)	struct pn_softc		*sc;{	u_int16_t		bmsr;	struct ifnet		*ifp;	ifp = &sc->arpcom.ac_if;	bmsr = pn_phy_readreg(sc, PHY_BMSR);	if (bootverbose)		printf("pn%d: PHY status word: %x\n", sc->pn_unit, bmsr);	/* fallback */	sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX;	if (bmsr & PHY_BMSR_10BTHALF) {		if (bootverbose)			printf("pn%d: 10Mbps half-duplex mode supported\n",								sc->pn_unit);		ifmedia_add(&sc->ifmedia,			IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);		ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);	}	if (bmsr & PHY_BMSR_10BTFULL) {		if (bootverbose)			printf("pn%d: 10Mbps full-duplex mode supported\n",								sc->pn_unit);		ifmedia_add(&sc->ifmedia,			IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);		sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX;	}	if (bmsr & PHY_BMSR_100BTXHALF) {		if (bootverbose)			printf("pn%d: 100Mbps half-duplex mode supported\n",								sc->pn_unit);		ifp->if_baudrate = 100000000;		ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);		ifmedia_add(&sc->ifmedia,			IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);		sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_TX|IFM_HDX;	}	if (bmsr & PHY_BMSR_100BTXFULL) {		if (bootverbose)			printf("pn%d: 100Mbps full-duplex mode supported\n",								sc->pn_unit);		ifp->if_baudrate = 100000000;		ifmedia_add(&sc->ifmedia,			IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);		sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_TX|IFM_FDX;	}	/* Some also support 100BaseT4. */	if (bmsr & PHY_BMSR_100BT4) {		if (bootverbose)			printf("pn%d: 100baseT4 mode supported\n", sc->pn_unit);		ifp->if_baudrate = 100000000;		ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_T4, 0, NULL);		sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_T4;#ifdef FORCE_AUTONEG_TFOUR		if (bootverbose)			printf("pn%d: forcing on autoneg support for BT4\n",							 sc->pn_unit);		ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0 NULL):		sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO;#endif	}	if (bmsr & PHY_BMSR_CANAUTONEG) {		if (bootverbose)			printf("pn%d: autoneg supported\n", sc->pn_unit);		ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);		sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO;	}	return;}static void pn_autoneg(sc, flag, verbose)	struct pn_softc		*sc;	int			flag;	int			verbose;{	u_int32_t		nway = 0, ability;	struct ifnet		*ifp;	struct ifmedia		*ifm;	ifm = &sc->ifmedia;	ifp = &sc->arpcom.ac_if;	ifm->ifm_media = IFM_ETHER | IFM_AUTO;	switch (flag) {	case PN_FLAG_FORCEDELAY:		/*	 	 * XXX Never use this option anywhere but in the probe	 	 * routine: making the kernel stop dead in its tracks 		 * for three whole seconds after we've gone multi-user		 * is really bad manners.	 	 */		CSR_WRITE_4(sc, PN_GEN,		    PN_GEN_MUSTBEONE|PN_GEN_100TX_LOOP);		PN_CLRBIT(sc, PN_NWAY, PN_NWAY_AUTONEGRSTR);

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