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📄 sym53c8xx_defs.h

📁 基于组件方式开发操作系统的OSKIT源代码
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 ,									\ {PCI_DEVICE_ID_NCR_53C860, 0xff, "860",  4,  8, 5,			\ FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}		\ ,									\ {PCI_DEVICE_ID_NCR_53C875, 0x01, "875",  6, 16, 5,			\ FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C875, 0x0f, "875",  6, 16, 5,			\ FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C875, 0x1f, "876",  6, 16, 5,			\ FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C875, 0x2f, "875E",  6, 16, 5,			\ FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C875, 0xff, "876",  6, 16, 5,			\ FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C875J,0xff, "875J", 6, 16, 5,			\ FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C885, 0xff, "885",  6, 16, 5,			\ FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C895, 0xff, "895",  6, 31, 7,			\ FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}\ ,									\ {PCI_DEVICE_ID_NCR_53C896, 0xff, "896",  7, 31, 7,			\ FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|\ FE_RAM8K|FE_64BIT|FE_IO256|FE_NOPM|FE_LEDC}\ ,									\ {PCI_DEVICE_ID_NCR_53C895A, 0xff, "895a",  6, 31, 7,			\ FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|\ FE_RAM8K|FE_64BIT|FE_IO256|FE_NOPM|FE_LEDC}\}/* * List of supported NCR chip ids */#define SCSI_NCR_CHIP_IDS		\{					\	PCI_DEVICE_ID_NCR_53C810,	\	PCI_DEVICE_ID_NCR_53C815,	\	PCI_DEVICE_ID_NCR_53C820,	\	PCI_DEVICE_ID_NCR_53C825,	\	PCI_DEVICE_ID_NCR_53C860,	\	PCI_DEVICE_ID_NCR_53C875,	\	PCI_DEVICE_ID_NCR_53C875J,	\	PCI_DEVICE_ID_NCR_53C885,	\	PCI_DEVICE_ID_NCR_53C895,	\	PCI_DEVICE_ID_NCR_53C896,	\	PCI_DEVICE_ID_NCR_53C895A	\}/***	Driver setup structure.****	This structure is initialized from linux config options.**	It can be overridden at boot-up by the boot command line.*/#define SCSI_NCR_MAX_EXCLUDES 8struct ncr_driver_setup {	u_char	master_parity;	u_char	scsi_parity;	u_char	disconnection;	u_char	special_features;	u_char	ultra_scsi;	u_char	force_sync_nego;	u_char	reverse_probe;	u_char	pci_fix_up;	u_char	use_nvram;	u_char	verbose;	u_char	default_tags;	u_short	default_sync;	u_short	debug;	u_char	burst_max;	u_char	led_pin;	u_char	max_wide;	u_char	settle_delay;	u_char	diff_support;	u_char	irqm;	u_char	bus_check;	u_char	optimize;	u_char	recovery;	u_char	host_id;	u_int	excludes[SCSI_NCR_MAX_EXCLUDES];	char	tag_ctrl[100];};/***	Initial setup.**	Can be overriden at startup by a command line.*/#define SCSI_NCR_DRIVER_SETUP			\{						\	SCSI_NCR_SETUP_MASTER_PARITY,		\	SCSI_NCR_SETUP_SCSI_PARITY,		\	SCSI_NCR_SETUP_DISCONNECTION,		\	SCSI_NCR_SETUP_SPECIAL_FEATURES,	\	SCSI_NCR_SETUP_ULTRA_SCSI,		\	SCSI_NCR_SETUP_FORCE_SYNC_NEGO,		\	0,					\	0,					\	1,					\	1,					\	SCSI_NCR_SETUP_DEFAULT_TAGS,		\	SCSI_NCR_SETUP_DEFAULT_SYNC,		\	0x00,					\	7,					\	SCSI_NCR_SETUP_LED_PIN,			\	1,					\	SCSI_NCR_SETUP_SETTLE_TIME,		\	SCSI_NCR_SETUP_DIFF_SUPPORT,		\	0,					\	1,					\	0,					\	0,					\	255					\}/***	Boot fail safe setup.**	Override initial setup from boot command line:**	ncr53c8xx=safe:y*/#define SCSI_NCR_DRIVER_SAFE_SETUP		\{						\	0,					\	1,					\	0,					\	0,					\	0,					\	0,					\	0,					\	0,					\	1,					\	2,					\	0,					\	255,					\	0x00,					\	255,					\	0,					\	0,					\	10,					\	1,					\	1,					\	1,					\	0,					\	0,					\	255					\}#ifdef SCSI_NCR_NVRAM_SUPPORT/***	Symbios NvRAM data format*/#define SYMBIOS_NVRAM_SIZE 368#define SYMBIOS_NVRAM_ADDRESS 0x100struct Symbios_nvram {/* Header 6 bytes */	u_short type;		/* 0x0000 */	u_short byte_count;	/* excluding header/trailer */	u_short checksum;/* Controller set up 20 bytes */	u_char	v_major;	/* 0x00 */	u_char	v_minor;	/* 0x30 */	u_int32	boot_crc;	u_short	flags;#define SYMBIOS_SCAM_ENABLE	(1)#define SYMBIOS_PARITY_ENABLE	(1<<1)#define SYMBIOS_VERBOSE_MSGS	(1<<2)#define SYMBIOS_CHS_MAPPING	(1<<3)#define SYMBIOS_NO_NVRAM	(1<<3)	/* ??? */	u_short	flags1;#define SYMBIOS_SCAN_HI_LO	(1)	u_short	term_state;#define SYMBIOS_TERM_CANT_PROGRAM	(0)#define SYMBIOS_TERM_ENABLED		(1)#define SYMBIOS_TERM_DISABLED		(2)	u_short	rmvbl_flags;#define SYMBIOS_RMVBL_NO_SUPPORT	(0)#define SYMBIOS_RMVBL_BOOT_DEVICE	(1)#define SYMBIOS_RMVBL_MEDIA_INSTALLED	(2)	u_char	host_id;	u_char	num_hba;	/* 0x04 */	u_char	num_devices;	/* 0x10 */	u_char	max_scam_devices;	/* 0x04 */	u_char	num_valid_scam_devives;	/* 0x00 */	u_char	rsvd;/* Boot order 14 bytes * 4 */	struct Symbios_host{		u_short	type;		/* 4:8xx / 0:nok */		u_short	device_id;	/* PCI device id */		u_short	vendor_id;	/* PCI vendor id */		u_char	bus_nr;		/* PCI bus number */		u_char	device_fn;	/* PCI device/function number << 3*/		u_short	word8;		u_short	flags;#define	SYMBIOS_INIT_SCAN_AT_BOOT	(1)		u_short	io_port;	/* PCI io_port address */	} host[4];/* Targets 8 bytes * 16 */	struct Symbios_target {		u_char	flags;#define SYMBIOS_DISCONNECT_ENABLE	(1)#define SYMBIOS_SCAN_AT_BOOT_TIME	(1<<1)#define SYMBIOS_SCAN_LUNS		(1<<2)#define SYMBIOS_QUEUE_TAGS_ENABLED	(1<<3)		u_char	rsvd;		u_char	bus_width;	/* 0x08/0x10 */		u_char	sync_offset;		u_short	sync_period;	/* 4*period factor */		u_short	timeout;	} target[16];/* Scam table 8 bytes * 4 */	struct Symbios_scam {		u_short	id;		u_short	method;#define SYMBIOS_SCAM_DEFAULT_METHOD	(0)#define SYMBIOS_SCAM_DONT_ASSIGN	(1)#define SYMBIOS_SCAM_SET_SPECIFIC_ID	(2)#define SYMBIOS_SCAM_USE_ORDER_GIVEN	(3)		u_short status;#define SYMBIOS_SCAM_UNKNOWN		(0)#define SYMBIOS_SCAM_DEVICE_NOT_FOUND	(1)#define SYMBIOS_SCAM_ID_NOT_SET		(2)#define SYMBIOS_SCAM_ID_VALID		(3)		u_char	target_id;		u_char	rsvd;	} scam[4];	u_char	spare_devices[15*8];	u_char	trailer[6];		/* 0xfe 0xfe 0x00 0x00 0x00 0x00 */};typedef struct Symbios_nvram	Symbios_nvram;typedef struct Symbios_host	Symbios_host;typedef struct Symbios_target	Symbios_target;typedef struct Symbios_scam	Symbios_scam;/***	Tekram NvRAM data format.*/#define TEKRAM_NVRAM_SIZE 64#define TEKRAM_NVRAM_ADDRESS 0struct Tekram_nvram {	struct Tekram_target {		u_char	flags;#define	TEKRAM_PARITY_CHECK		(1)#define TEKRAM_SYNC_NEGO		(1<<1)#define TEKRAM_DISCONNECT_ENABLE	(1<<2)#define	TEKRAM_START_CMD		(1<<3)#define TEKRAM_TAGGED_COMMANDS		(1<<4)#define TEKRAM_WIDE_NEGO		(1<<5)		u_char	sync_index;		u_short	word2;	} target[16];	u_char	host_id;	u_char	flags;#define TEKRAM_MORE_THAN_2_DRIVES	(1)#define TEKRAM_DRIVES_SUP_1GB		(1<<1)#define	TEKRAM_RESET_ON_POWER_ON	(1<<2)#define TEKRAM_ACTIVE_NEGATION		(1<<3)#define TEKRAM_IMMEDIATE_SEEK		(1<<4)#define	TEKRAM_SCAN_LUNS		(1<<5)#define	TEKRAM_REMOVABLE_FLAGS		(3<<6)	/* 0: disable; 1: boot device; 2:all */	u_char	boot_delay_index;	u_char	max_tags_index;	u_short	flags1;#define TEKRAM_F2_F6_ENABLED		(1)	u_short	spare[29];};typedef struct Tekram_nvram	Tekram_nvram;typedef struct Tekram_target	Tekram_target;#endif /* SCSI_NCR_NVRAM_SUPPORT *//**************** ORIGINAL CONTENT of ncrreg.h from FreeBSD ******************//*-----------------------------------------------------------------****	The ncr 53c810 register structure.****-----------------------------------------------------------------*/struct ncr_reg {/*00*/  u_char    nc_scntl0;    /* full arb., ena parity, par->ATN  *//*01*/  u_char    nc_scntl1;    /* no reset                         */        #define   ISCON   0x10  /* connected to scsi		    */        #define   CRST    0x08  /* force reset                      *//*02*/  u_char    nc_scntl2;    /* no disconnect expected           */	#define   SDU     0x80  /* cmd: disconnect will raise error */	#define   CHM     0x40  /* sta: chained mode                */	#define   WSS     0x08  /* sta: wide scsi send           [W]*/	#define   WSR     0x01  /* sta: wide scsi received       [W]*//*03*/  u_char    nc_scntl3;    /* cnf system clock dependent       */	#define   EWS     0x08  /* cmd: enable wide scsi         [W]*/	#define   ULTRA   0x80  /* cmd: ULTRA enable                *//*04*/  u_char    nc_scid;	/* cnf host adapter scsi address    */	#define   RRE     0x40  /* r/w:e enable response to resel.  */	#define   SRE     0x20  /* r/w:e enable response to select  *//*05*/  u_char    nc_sxfer;	/* ### Sync speed and count         *//*06*/  u_char    nc_sdid;	/* ### Destination-ID               *//*07*/  u_char    nc_gpreg;	/* ??? IO-Pins                      *//*08*/  u_char    nc_sfbr;	/* ### First byte in phase          *//*09*/  u_char    nc_socl;	#define   CREQ	  0x80	/* r/w: SCSI-REQ                    */	#define   CACK	  0x40	/* r/w: SCSI-ACK                    */	#define   CBSY	  0x20	/* r/w: SCSI-BSY                    */	#define   CSEL	  0x10	/* r/w: SCSI-SEL                    */	#define   CATN	  0x08	/* r/w: SCSI-ATN                    */	#define   CMSG	  0x04	/* r/w: SCSI-MSG                    */	#define   CC_D	  0x02	/* r/w: SCSI-C_D                    */	#define   CI_O	  0x01	/* r/w: SCSI-I_O                    *//*0a*/  u_char    nc_ssid;/*0b*/  u_char    nc_sbcl;/*0c*/  u_char    nc_dstat;        #define   DFE     0x80  /* sta: dma fifo empty              */        #define   MDPE    0x40  /* int: master data parity error    */        #define   BF      0x20  /* int: script: bus fault           */        #define   ABRT    0x10  /* int: script: command aborted     */        #define   SSI     0x08  /* int: script: single step         */        #define   SIR     0x04  /* int: script: interrupt instruct. */        #define   IID     0x01  /* int: script: illegal instruct.   *//*0d*/  u_char    nc_sstat0;        #define   ILF     0x80  /* sta: data in SIDL register lsb   */        #define   ORF     0x40  /* sta: data in SODR register lsb   */        #define   OLF     0x20  /* sta: data in SODL register lsb   */        #define   AIP     0x10  /* sta: arbitration in progress     */        #define   LOA     0x08  /* sta: arbitration lost            */        #define   WOA     0x04  /* sta: arbitration won             */        #define   IRST    0x02  /* sta: scsi reset signal           */        #define   SDP     0x01  /* sta: scsi parity signal          *//*0e*/  u_char    nc_sstat1;	#define   FF3210  0xf0	/* sta: bytes in the scsi fifo      *//*0f*/  u_char    nc_sstat2;        #define   ILF1    0x80  /* sta: data in SIDL register msb[W]*/        #define   ORF1    0x40  /* sta: data in SODR register msb[W]*/        #define   OLF1    0x20  /* sta: data in SODL register msb[W]*/        #define   DM      0x04  /* sta: DIFFSENS mismatch (895/6 only) */        #define   LDSC    0x02  /* sta: disconnect & reconnect      *//*10*/  u_int32    nc_dsa;	/* --> Base page                    *//*14*/  u_char    nc_istat;	/* --> Main Command and status      */        #define   CABRT   0x80  /* cmd: abort current operation     */        #define   SRST    0x40  /* mod: reset chip                  */        #define   SIGP    0x20  /* r/w: message from host to ncr    */        #define   SEM     0x10  /* r/w: message between host + ncr  */        #define   CON     0x08  /* sta: connected to scsi           */        #define   INTF    0x04  /* sta: int on the fly (reset by wr)*/        #define   SIP     0x02  /* sta: scsi-interrupt              */        #define   DIP     0x01  /* sta: host/script interrupt       *//*15*/  u_char    nc_istat1;	/* 896 only *//*16*/  u_char    nc_mbox0;	/* 896 only *//*17*/  u_char    nc_mbox1;	/* 896 only *//*18*/	u_char	  nc_ctest0;/*19*/  u_char    nc_ctest1;/*1a*/  u_char    nc_ctest2;	#define   CSIGP   0x40/*1b*/  u_char    nc_ctest3;	#define   FLF     0x08  /* cmd: flush dma fifo              */	#define   CLF	  0x04	/* cmd: clear dma fifo		    */	#define   FM      0x02  /* mod: fetch pin mode              */	#define   WRIE    0x01  /* mod: write and invalidate enable *//*1c*/  u_int32    nc_temp;	/* ### Temporary stack              *//*20*/	u_char	  nc_dfifo;/*21*/  u_char    nc_ctest4;	#define   BDIS    0x80  /* mod: burst disable               */	#define   MPEE    0x08  /* mod: master parity error enable  *//*22*/  u_char    nc_ctest5;	#define   DFS     0x20  /* mod: dma fifo size               *//*23*/  u_char    nc_ctest6;/*24*/  u_int32    nc_dbc;	/* ### Byte count and command       *//*28*/  u_int32    nc_dnad;	/* ### Next command register        *//*2c*/  u_int32    nc_dsp;	/* --> Script Pointer               *//*30*/  u_int32    nc_dsps;	/* --> Script pointer save/opcode#2 *//*34*/  u_char     nc_scratcha;  /* Temporary register a            *//*35*/  u_char     nc_scratcha1;/*36*/  u_char     nc_scratcha2;/*37*/  u_char     nc_scratcha3;/*38*/  u_char    nc_dmode;	#define   BL_2    0x80  /* mod: burst length shift value +2 */	#define   BL_1    0x40  /* mod: burst length shift value +1 */	#define   ERL     0x08  /* mod: enable read line            */	#define   ERMP    0x04  /* mod: enable read multiple        */	#define   BOF     0x02  /* mod: burst op code fetch         *//*39*/  u_char    nc_dien;/*3a*/  u_char    nc_dwt;/*3b*/  u_char    nc_dcntl;	/* --> Script execution control     */	#define   CLSE    0x80  /* mod: cache line size enable      */	#define   PFF     0x40  /* cmd: pre-fetch flush             */	#define   PFEN    0x20  /* mod: pre-fetch enable            */	#define   SSM     0x10  /* mod: single step mode            */	#define   IRQM    0x08  /* mod: irq mode (1 = totem pole !) */	#define   STD     0x04  /* cmd: start dma mode              */	#define   IRQD    0x02  /* mod: irq disable                 */ 	#define	  NOCOM   0x01	/* cmd: protect sfbr while reselect *//*3c*/  u_int32    nc_adder;/*40*/  u_short   nc_sien;	/* -->: interrupt enable            *//*42*/  u_short   nc_sist;	/* <--: interrupt status            */        #define   SBMC    0x1000/* sta: SCSI Bus Mode Change (895/6 only) */        #define   STO     0x0400/* sta: timeout (select)            */        #define   GEN     0x0200/* sta: timeout (general)           */        #define   HTH     0x0100/* sta: timeout (handshake)         */        #define   MA      0x80  /* sta: phase mismatch              */        #define   CMP     0x40  /* sta: arbitration complete        */        #define   SEL     0x20  /* sta: selected by another device  */        #define   RSL     0x10  /* sta: reselected by another device*/        #define   SGE     0x08  /* sta: gross error (over/underflow)*/        #define   UDC     0x04  /* sta: unexpected disconnect       */        #define   RST     0x02  /* sta: scsi bus reset detected     */        #define   PAR     0x01  /* sta: scsi parity error           *//*44*/  u_char    nc_slpar;/*45*/  u_char    nc_swide;/*46*/  u_char    nc_macntl;/*47*/  u_char    nc_gpcntl;/*48*/  u_char    nc_stime0;    /* cmd: timeout for select&handshake*//*49*/  u_char    nc_stime1;    /* cmd: timeout user defined        *//*4a*/  u_short   nc_respid;    /* sta: Reselect-IDs                *//*4c*/  u_char    nc_stest0;

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