📄 ncr53c8xx.c
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/******************************************************************************** Device driver for the PCI-SCSI NCR538XX controller family.**** Copyright (C) 1994 Wolfgang Stanglmeier**** This program is free software; you can redistribute it and/or modify** it under the terms of the GNU General Public License as published by** the Free Software Foundation; either version 2 of the License, or** (at your option) any later version.**** This program is distributed in the hope that it will be useful,** but WITHOUT ANY WARRANTY; without even the implied warranty of** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the** GNU General Public License for more details.**** You should have received a copy of the GNU General Public License** along with this program; if not, write to the Free Software** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.****-----------------------------------------------------------------------------**** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver** and is currently maintained by**** Gerard Roudier <groudier@club-internet.fr>**** Being given that this driver originates from the FreeBSD version, and** in order to keep synergy on both, any suggested enhancements and corrections** received on Linux are automatically a potential candidate for the FreeBSD ** version.**** The original driver has been written for 386bsd and FreeBSD by** Wolfgang Stanglmeier <wolf@cologne.de>** Stefan Esser <se@mi.Uni-Koeln.de>**** And has been ported to NetBSD by** Charles M. Hannum <mycroft@gnu.ai.mit.edu>****-----------------------------------------------------------------------------**** Brief history**** December 10 1995 by Gerard Roudier:** Initial port to Linux.**** June 23 1996 by Gerard Roudier:** Support for 64 bits architectures (Alpha).**** November 30 1996 by Gerard Roudier:** Support for Fast-20 scsi.** Support for large DMA fifo and 128 dwords bursting.**** February 27 1997 by Gerard Roudier:** Support for Fast-40 scsi.** Support for on-Board RAM.**** May 3 1997 by Gerard Roudier:** Full support for scsi scripts instructions pre-fetching.**** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>:** Support for NvRAM detection and reading.**** August 18 1997 by Cort <cort@cs.nmt.edu>:** Support for Power/PC (Big Endian).**** June 20 1998 by Gerard Roudier <groudier@club-internet.fr>:** Support for up to 64 tags per lun.** O(1) everywhere (C and SCRIPTS) for normal cases.** Low PCI traffic for command handling when on-chip RAM is present.** Aggressive SCSI SCRIPTS optimizations.**********************************************************************************//*** July 20 1999, version 3.2a-2**** Supported SCSI-II features:** Synchronous negotiation** Wide negotiation (depends on the NCR Chip)** Enable disconnection** Tagged command queuing** Parity checking** Etc...**** Supported NCR chips:** 53C810 (8 bits, Fast SCSI-2, no rom BIOS) ** 53C815 (8 bits, Fast SCSI-2, on board rom BIOS)** 53C820 (Wide, Fast SCSI-2, no rom BIOS)** 53C825 (Wide, Fast SCSI-2, on board rom BIOS)** 53C860 (8 bits, Fast 20, no rom BIOS)** 53C875 (Wide, Fast 20, on board rom BIOS)** 53C895 (Wide, Fast 40, on board rom BIOS)** 53C895A (Wide, Fast 40, on board rom BIOS)** 53C896 (Wide, Fast 40, on board rom BIOS)**** Other features:** Memory mapped IO (linux-1.3.X and above only)** Module** Shared IRQ (since linux-1.3.72)*//*** Name and version of the driver*/#define SCSI_NCR_DRIVER_NAME "ncr53c8xx - version 3.2a-2"#define SCSI_NCR_DEBUG_FLAGS (0)/*==========================================================**** Include files****==========================================================*/#define LinuxVersionCode(v, p, s) (((v)<<16)+((p)<<8)+(s))#ifdef MODULE#include <linux/module.h>#endif#include <asm/dma.h>#include <asm/io.h>#include <asm/system.h>#if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,93)#include <asm/spinlock.h>#endif#include <linux/delay.h>#include <linux/signal.h>#include <linux/sched.h>#include <linux/errno.h>#include <linux/pci.h>#include <linux/string.h>#include <linux/malloc.h>#include <linux/mm.h>#include <linux/ioport.h>#include <linux/time.h>#include <linux/timer.h>#include <linux/stat.h>#include <linux/version.h>#include <linux/blk.h>#if LINUX_VERSION_CODE >= LinuxVersionCode(2,1,35)#include <linux/init.h>#else#ifndef __initdata#define __initdata#endif#ifndef __initfunc#define __initfunc(__arginit) __arginit#endif#endif#if LINUX_VERSION_CODE <= LinuxVersionCode(2,1,92)#include <linux/bios32.h>#endif#include "scsi.h"#include "hosts.h"#include "constants.h"#include "sd.h"#include <linux/types.h>/*** Define BITS_PER_LONG for earlier linux versions.*/#ifndef BITS_PER_LONG#if (~0UL) == 0xffffffffUL#define BITS_PER_LONG 32#else#define BITS_PER_LONG 64#endif#endif/*** Define the BSD style u_int32 and u_int64 type.** Are in fact u_int32_t and u_int64_t :-)*/typedef u32 u_int32;typedef u64 u_int64;#include "ncr53c8xx.h"/*==========================================================**** A la VMS/CAM-3 queue management.** Implemented from linux list management.****==========================================================*/typedef struct xpt_quehead { struct xpt_quehead *flink; /* Forward pointer */ struct xpt_quehead *blink; /* Backward pointer */} XPT_QUEHEAD;#define xpt_que_init(ptr) do { \ (ptr)->flink = (ptr); (ptr)->blink = (ptr); \} while (0)static inline void __xpt_que_add(struct xpt_quehead * new, struct xpt_quehead * blink, struct xpt_quehead * flink){ flink->blink = new; new->flink = flink; new->blink = blink; blink->flink = new;}static inline void __xpt_que_del(struct xpt_quehead * blink, struct xpt_quehead * flink){ flink->blink = blink; blink->flink = flink;}static inline int xpt_que_empty(struct xpt_quehead *head){ return head->flink == head;}static inline void xpt_que_splice(struct xpt_quehead *list, struct xpt_quehead *head){ struct xpt_quehead *first = list->flink; if (first != list) { struct xpt_quehead *last = list->blink; struct xpt_quehead *at = head->flink; first->blink = head; head->flink = first; last->flink = at; at->blink = last; }}#define xpt_que_entry(ptr, type, member) \ ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))#define xpt_insque(new, pos) __xpt_que_add(new, pos, (pos)->flink)#define xpt_remque(el) __xpt_que_del((el)->blink, (el)->flink)#define xpt_insque_head(new, head) __xpt_que_add(new, head, (head)->flink)static inline struct xpt_quehead *xpt_remque_head(struct xpt_quehead *head){ struct xpt_quehead *elem = head->flink; if (elem != head) __xpt_que_del(head, elem->flink); else elem = 0; return elem;}#define xpt_insque_tail(new, head) __xpt_que_add(new, (head)->blink, head)static inline struct xpt_quehead *xpt_remque_tail(struct xpt_quehead *head){ struct xpt_quehead *elem = head->blink; if (elem != head) __xpt_que_del(elem->blink, head); else elem = 0; return elem;}/*==========================================================**** The CCB done queue uses an array of CCB virtual ** addresses. Empty entries are flagged using the bogus ** virtual address 0xffffffff.**** Since PCI ensures that only aligned DWORDs are accessed ** atomically, 64 bit little-endian architecture requires ** to test the high order DWORD of the entry to determine ** if it is empty or valid.**** BTW, I will make things differently as soon as I will ** have a better idea, but this is simple and should work.****==========================================================*/ #define SCSI_NCR_CCB_DONE_SUPPORT#ifdef SCSI_NCR_CCB_DONE_SUPPORT#define MAX_DONE 24#define CCB_DONE_EMPTY 0xffffffffUL/* All 32 bit architectures */#if BITS_PER_LONG == 32#define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY)/* All > 32 bit (64 bit) architectures regardless endian-ness */#else#define CCB_DONE_VALID(cp) \ ((((u_long) cp) & 0xffffffff00000000ul) && \ (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY)#endif#endif /* SCSI_NCR_CCB_DONE_SUPPORT *//*==========================================================**** On x86 architecture, write buffers management does ** not reorder writes to memory. So, using compiler ** optimization barriers is enough to guarantee some ** ordering when the CPU is writing data accessed by ** the NCR.** On Alpha architecture, explicit memory barriers have ** to be used.** Other architectures are defaulted to mb() macro if ** defined, otherwise use compiler barrier.****==========================================================*/#if defined(__i386__)#define MEMORY_BARRIER() barrier()#elif defined(__alpha__)#define MEMORY_BARRIER() mb()#else# ifdef mb# define MEMORY_BARRIER() mb()# else# define MEMORY_BARRIER() barrier()# endif#endif/*==========================================================**** Configuration and Debugging****==========================================================*//*** SCSI address of this device.** The boot routines should have set it.** If not, use this.*/#ifndef SCSI_NCR_MYADDR#define SCSI_NCR_MYADDR (7)#endif/*** The maximum number of tags per logic unit.** Used only for disk devices that support tags.*/#ifndef SCSI_NCR_MAX_TAGS#define SCSI_NCR_MAX_TAGS (8)#endif/*** TAGS are actually limited to 64 tags/lun.** We need to deal with power of 2, for alignment constraints.*/#if SCSI_NCR_MAX_TAGS > 64#undef SCSI_NCR_MAX_TAGS#define SCSI_NCR_MAX_TAGS (64)#endif#define NO_TAG (255)/*** Choose appropriate type for tag bitmap.*/#if SCSI_NCR_MAX_TAGS > 32typedef u_int64 tagmap_t;#elsetypedef u_int32 tagmap_t;#endif/*** Number of targets supported by the driver.** n permits target numbers 0..n-1.** Default is 16, meaning targets #0..#15.** #7 .. is myself.*/#ifdef SCSI_NCR_MAX_TARGET#define MAX_TARGET (SCSI_NCR_MAX_TARGET)#else#define MAX_TARGET (16)#endif/*** Number of logic units supported by the driver.** n enables logic unit numbers 0..n-1.** The common SCSI devices require only** one lun, so take 1 as the default.*/#ifdef SCSI_NCR_MAX_LUN#define MAX_LUN SCSI_NCR_MAX_LUN#else#define MAX_LUN (1)#endif/*** Asynchronous pre-scaler (ns). Shall be 40*/ #ifndef SCSI_NCR_MIN_ASYNC#define SCSI_NCR_MIN_ASYNC (40)#endif/*** The maximum number of jobs scheduled for starting.** There should be one slot per target, and one slot** for each tag of each target in use.** The calculation below is actually quite silly ...*/#ifdef SCSI_NCR_CAN_QUEUE#define MAX_START (SCSI_NCR_CAN_QUEUE + 4)#else#define MAX_START (MAX_TARGET + 7 * SCSI_NCR_MAX_TAGS)#endif/*** The maximum number of segments a transfer is split into.** We support up to 127 segments for both read and write.** The data scripts are broken into 2 sub-scripts.** 80 (MAX_SCATTERL) segments are moved from a sub-script ** in on-chip RAM. This makes data transfers shorter than ** 80k (assuming 1k fs) as fast as possible.*/#define MAX_SCATTER (SCSI_NCR_MAX_SCATTER)#if (MAX_SCATTER > 80)#define MAX_SCATTERL 80#define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL)#else#define MAX_SCATTERL (MAX_SCATTER-1)#define MAX_SCATTERH 1#endif/*
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