readme.txt

来自「arm7的源代码」· 文本 代码 · 共 41 行

Semihosted version of dhrystone for the ARM926EJ-S - debug tools must be attached.

The scatter description file matches the memory map of the Integrator CM926EJ-S.
This code will run unmodified on ARMulator or an Integrator ARM926EJ-S Core module.

Scatter file is used to locate the stack, heap, D-TCM and Level 1 Translation Table.
At reset, TCM base addresses are set by HDL to 0x0, I-TCM address is not changed.

Note the scatter file assumes a TCM size of 32 KB

InitTCM.s   - entry point for this image
            - locates configures and enables the TCMs
            - calls InitMMU

InitMMU.s   - creates MMU level 1 translation table and enables the MMU (prior to scatter loading)
            - caches and TLBs are invalidated here
            - cache global enables are set to 0x0 before MMU is enabled
            - calls __main

InitCache.s - enables the caches

retarget.c  - provides a re-implementation of __user_initial_stackheap
            - patches main to enable the caches and Integrator core clock
            - default core clock frequency can be changed from here


The example may be built from the supplied makefile - this has been used to generate
the four batch file build options.

Four build options are provided:

buildTCM.bat - enables the TCMs and relocates all code and data into the TCMs
             - This option gives maximum performance and demonstrates the use
             - of TCMs and the placing of objects into TCMs by scatterloading

build.bat    - TCMs not enabled - instruction and data caches are enabled

build_clock.bat and buildTCM_clock.bat duplicate the above builds but also incorporate 
code to set an Integrator Core Module core clock frequency (-DSET_CLCK).