bit_rev.lst

54系列dsp算法程序

TMS320C54x COFF Assembler       Beta Version 1.16     Mon Sep 23 13:58:56 1996
Copyright (c) 1996        Texas Instruments Incorporated 

bit_rev.asm                                                          PAGE    1

       1            *********************************************************************************
       2            *       (C) COPYRIGHT TEXAS INSTRUMENTS, INC. 1996                              *
       3            *********************************************************************************
       4            *                                                                               *
       5            * MODULE NAME:  bit_rev.asm                                                     *
       6            *                                                                               *
       7            * AUTHORS:      Simon Lau and Nathan Baltz                                      *
       8            *                                                                               *
       9            * DESCRIPTION:  PHASE ONE   Bit-Reversal of Input Data                          *
      10            *               This function is called from the main module of the 'C54x Real  *
      11            *               FFT code.  It reorders the original 2N-point real input         *
      12            *               sequence by using bit-reversed addressing.  This new sequence   *
      13            *               is stored into the upper 2N words of the data processing buffer *
      14            *               where FFT will be performed in-place during Phase Two.          *
      15            *                                                                               *
      16            * REGISTER USAGE:   AR0 index for bit-reversed addressing                       *
      17            *                   AR2 pointer to processed data, in bit-reversed order        *
      18            *                   AR3 pointer to original input data, in natural order        *
      19            *                   AR7 start address of data processing buffer                 *
      20            *                   BRC                                                         *
      21            *                                                                               *
      22            * DATE:         7-16-1996                                                       *
      23            *                                                                               *
      24            *********************************************************************************
      25            
      26                    .mmregs
      27                    .include    "fft_size.inc"
      28                    .def        bit_rev
      29                    .ref        real_fft_input, fft_data
      30            
      31                    .asg    AR2,REORDERED_DATA
      32                    .asg    AR3,ORIGINAL_INPUT
      33                    .asg    AR7,DATA_PROC_BUF
      34            
      35            
      36 000000               .text
      37            
      38 000000       bit_rev:
      39 000000 F7B6          SSBX    FRCT                            ; fractional mode is on
      40 000001 7713          STM     #real_fft_input,ORIGINAL_INPUT  ; AR3 -> 1st original input
         000002 0000!
      41 000003 7717          STM     #fft_data,DATA_PROC_BUF         ; AR7 -> data processing buffer 
         000004 0000!
      42 000005 E772          MVMM    DATA_PROC_BUF,REORDERED_DATA    ; AR2 -> 1st bit-reversed data
      43 000006 771A          STM     #K_FFT_SIZE-1,BRC                 
         000007 0007 
      44 000008 F272          RPTBD   bit_rev_end-1
         000009 000E'
      45 00000a 7710          STM     #K_FFT_SIZE,AR0                 ; AR0 = 1/2 size of circ buffer
         00000b 0008 
      46                  
      47 00000c E598          MVDD    *ORIGINAL_INPUT+,*REORDERED_DATA+
      48 00000d E558          MVDD    *ORIGINAL_INPUT-,*REORDERED_DATA+
      49 00000e 6DBB          MAR     *ORIGINAL_INPUT+0B           
      50            
TMS320C54x COFF Assembler       Beta Version 1.16     Mon Sep 23 13:58:56 1996
Copyright (c) 1996        Texas Instruments Incorporated 

bit_rev.asm                                                          PAGE    2

      51 00000f       bit_rev_end:
      52 00000f FC00          RET                                     ; return to Real FFT main module
      53            
      54                    .end

 No Errors, No Warnings