📄 e1000_hw.h
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/******************************************************************************* Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. The full GNU General Public License is included in this distribution in the file called LICENSE. Contact Information: Linux NICS <linux.nics@intel.com> Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497*******************************************************************************//* e1000_hw.h * Structures, enums, and macros for the MAC */#ifndef _E1000_HW_H_#define _E1000_HW_H_/* Forward declarations of structures used by the shared code */struct e1000_hw;struct e1000_hw_stats;/* Enumerated types specific to the e1000 hardware *//* Media Access Controlers */typedef enum { e1000_undefined = 0, e1000_82542_rev2_0, e1000_82542_rev2_1, e1000_82543, e1000_82544, e1000_82540, e1000_82545, e1000_82545_rev_3, e1000_82546, e1000_82546_rev_3, e1000_82541, e1000_82541_rev_2, e1000_82547, e1000_82547_rev_2, e1000_num_macs} e1000_mac_type;typedef enum { e1000_eeprom_uninitialized = 0, e1000_eeprom_spi, e1000_eeprom_microwire, e1000_num_eeprom_types} e1000_eeprom_type;/* Media Types */typedef enum { e1000_media_type_copper = 0, e1000_media_type_fiber = 1, e1000_media_type_internal_serdes = 2, e1000_num_media_types} e1000_media_type;typedef enum { e1000_10_half = 0, e1000_10_full = 1, e1000_100_half = 2, e1000_100_full = 3} e1000_speed_duplex_type;/* Flow Control Settings */typedef enum { e1000_fc_none = 0, e1000_fc_rx_pause = 1, e1000_fc_tx_pause = 2, e1000_fc_full = 3, e1000_fc_default = 0xFF} e1000_fc_type;/* PCI bus types */typedef enum { e1000_bus_type_unknown = 0, e1000_bus_type_pci, e1000_bus_type_pcix, e1000_bus_type_reserved} e1000_bus_type;/* PCI bus speeds */typedef enum { e1000_bus_speed_unknown = 0, e1000_bus_speed_33, e1000_bus_speed_66, e1000_bus_speed_100, e1000_bus_speed_120, e1000_bus_speed_133, e1000_bus_speed_reserved} e1000_bus_speed;/* PCI bus widths */typedef enum { e1000_bus_width_unknown = 0, e1000_bus_width_32, e1000_bus_width_64, e1000_bus_width_reserved} e1000_bus_width;/* PHY status info structure and supporting enums */typedef enum { e1000_cable_length_50 = 0, e1000_cable_length_50_80, e1000_cable_length_80_110, e1000_cable_length_110_140, e1000_cable_length_140, e1000_cable_length_undefined = 0xFF} e1000_cable_length;typedef enum { e1000_igp_cable_length_10 = 10, e1000_igp_cable_length_20 = 20, e1000_igp_cable_length_30 = 30, e1000_igp_cable_length_40 = 40, e1000_igp_cable_length_50 = 50, e1000_igp_cable_length_60 = 60, e1000_igp_cable_length_70 = 70, e1000_igp_cable_length_80 = 80, e1000_igp_cable_length_90 = 90, e1000_igp_cable_length_100 = 100, e1000_igp_cable_length_110 = 110, e1000_igp_cable_length_120 = 120, e1000_igp_cable_length_130 = 130, e1000_igp_cable_length_140 = 140, e1000_igp_cable_length_150 = 150, e1000_igp_cable_length_160 = 160, e1000_igp_cable_length_170 = 170, e1000_igp_cable_length_180 = 180} e1000_igp_cable_length;typedef enum { e1000_10bt_ext_dist_enable_normal = 0, e1000_10bt_ext_dist_enable_lower, e1000_10bt_ext_dist_enable_undefined = 0xFF} e1000_10bt_ext_dist_enable;typedef enum { e1000_rev_polarity_normal = 0, e1000_rev_polarity_reversed, e1000_rev_polarity_undefined = 0xFF} e1000_rev_polarity;typedef enum { e1000_downshift_normal = 0, e1000_downshift_activated, e1000_downshift_undefined = 0xFF} e1000_downshift;typedef enum { e1000_polarity_reversal_enabled = 0, e1000_polarity_reversal_disabled, e1000_polarity_reversal_undefined = 0xFF} e1000_polarity_reversal;typedef enum { e1000_auto_x_mode_manual_mdi = 0, e1000_auto_x_mode_manual_mdix, e1000_auto_x_mode_auto1, e1000_auto_x_mode_auto2, e1000_auto_x_mode_undefined = 0xFF} e1000_auto_x_mode;typedef enum { e1000_1000t_rx_status_not_ok = 0, e1000_1000t_rx_status_ok, e1000_1000t_rx_status_undefined = 0xFF} e1000_1000t_rx_status;typedef enum { e1000_phy_m88 = 0, e1000_phy_igp, e1000_phy_undefined = 0xFF} e1000_phy_type;typedef enum { e1000_ms_hw_default = 0, e1000_ms_force_master, e1000_ms_force_slave, e1000_ms_auto} e1000_ms_type;typedef enum { e1000_ffe_config_enabled = 0, e1000_ffe_config_active, e1000_ffe_config_blocked} e1000_ffe_config;typedef enum { e1000_dsp_config_disabled = 0, e1000_dsp_config_enabled, e1000_dsp_config_activated, e1000_dsp_config_undefined = 0xFF} e1000_dsp_config;struct e1000_phy_info { e1000_cable_length cable_length; e1000_10bt_ext_dist_enable extended_10bt_distance; e1000_rev_polarity cable_polarity; e1000_downshift downshift; e1000_polarity_reversal polarity_correction; e1000_auto_x_mode mdix_mode; e1000_1000t_rx_status local_rx; e1000_1000t_rx_status remote_rx;};struct e1000_phy_stats { uint32_t idle_errors; uint32_t receive_errors;};struct e1000_eeprom_info { e1000_eeprom_type type; uint16_t word_size; uint16_t opcode_bits; uint16_t address_bits; uint16_t delay_usec; uint16_t page_size;};/* Error Codes */#define E1000_SUCCESS 0#define E1000_ERR_EEPROM 1#define E1000_ERR_PHY 2#define E1000_ERR_CONFIG 3#define E1000_ERR_PARAM 4#define E1000_ERR_MAC_TYPE 5#define E1000_ERR_PHY_TYPE 6#define E1000_ERR_NOLINK 7#define E1000_ERR_TIMEOUT 8#define E1000_READ_REG_IO(a, reg) \ e1000_read_reg_io((a), E1000_##reg)#define E1000_WRITE_REG_IO(a, reg, val) \ e1000_write_reg_io((a), E1000_##reg, val)/* PCI Device IDs */#define E1000_DEV_ID_82542 0x1000#define E1000_DEV_ID_82543GC_FIBER 0x1001#define E1000_DEV_ID_82543GC_COPPER 0x1004#define E1000_DEV_ID_82544EI_COPPER 0x1008#define E1000_DEV_ID_82544EI_FIBER 0x1009#define E1000_DEV_ID_82544GC_COPPER 0x100C#define E1000_DEV_ID_82544GC_LOM 0x100D#define E1000_DEV_ID_82540EM 0x100E#define E1000_DEV_ID_82540EM_LOM 0x1015#define E1000_DEV_ID_82540EP_LOM 0x1016#define E1000_DEV_ID_82540EP 0x1017#define E1000_DEV_ID_82540EP_LP 0x101E#define E1000_DEV_ID_82545EM_COPPER 0x100F#define E1000_DEV_ID_82545EM_FIBER 0x1011#define E1000_DEV_ID_82545GM_COPPER 0x1026#define E1000_DEV_ID_82545GM_FIBER 0x1027#define E1000_DEV_ID_82545GM_SERDES 0x1028#define E1000_DEV_ID_82546EB_COPPER 0x1010#define E1000_DEV_ID_82546EB_FIBER 0x1012#define E1000_DEV_ID_82546EB_QUAD_COPPER 0x101D#define E1000_DEV_ID_82541EI 0x1013#define E1000_DEV_ID_82541EI_MOBILE 0x1018#define E1000_DEV_ID_82541ER 0x1078#define E1000_DEV_ID_82547GI 0x1075#define E1000_DEV_ID_82541GI 0x1076#define E1000_DEV_ID_82541GI_MOBILE 0x1077#define E1000_DEV_ID_82546GB_COPPER 0x1079#define E1000_DEV_ID_82546GB_FIBER 0x107A#define E1000_DEV_ID_82546GB_SERDES 0x107B#define E1000_DEV_ID_82547EI 0x1019#define NODE_ADDRESS_SIZE 6#define ETH_LENGTH_OF_ADDRESS 6/* MAC decode size is 128K - This is the size of BAR0 */#define MAC_DECODE_SIZE (128 * 1024)#define E1000_82542_2_0_REV_ID 2#define E1000_82542_2_1_REV_ID 3#define SPEED_10 10#define SPEED_100 100#define SPEED_1000 1000#define HALF_DUPLEX 1#define FULL_DUPLEX 2/* The sizes (in bytes) of a ethernet packet */#define ENET_HEADER_SIZE 14#define MAXIMUM_ETHERNET_FRAME_SIZE 1518 /* With FCS */#define MINIMUM_ETHERNET_FRAME_SIZE 64 /* With FCS */#define ETHERNET_FCS_SIZE 4#define MAXIMUM_ETHERNET_PACKET_SIZE \ (MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)#define MINIMUM_ETHERNET_PACKET_SIZE \ (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)#define CRC_LENGTH ETHERNET_FCS_SIZE#define MAX_JUMBO_FRAME_SIZE 0x3F00/* 802.1q VLAN Packet Sizes */#define VLAN_TAG_SIZE 4 /* 802.3ac tag (not DMAed) */
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