📄 main_hyperterm.lst
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******************
147 * Init_Vars
*
148 * Initialize the RAM variables.
*
149 ****************************************************
******************
E040 [04] 6EFF59 150 Init_Vars: MOV #$FF,SWITCH
;Default configuration is for FSK.
E043 [04] 6EFF5A 151 MOV #$FF,LAST_SWITCH
152
E046 [03] 45E000 153 LDHX #FLASHVARS
E049 [04] 7E62 154 MOV X+,THRESHOLD
E04B [04] 7E63 155 MOV X+,LFID
E04D [04] 7E64 156 MOV X+,LFID+1
E04F [04] 7E65 157 MOV X+,LFID+2
E051 [04] 7E66 158 MOV X+,LFID+3
E053 [04] 7E67 159 MOV X+,RFID
E055 [04] 7E68 160 MOV X+,RFID+1
E057 [04] 7E69 161 MOV X+,RFID+2
E059 [04] 7E6A 162 MOV X+,RFID+3
E05B [04] 7E6B 163 MOV X+,LRID
E05D [04] 7E6C 164 MOV X+,LRID+1
E05F [04] 7E6D 165 MOV X+,LRID+2
E061 [04] 7E6E 166 MOV X+,LRID+3
E063 [04] 7E6F 167 MOV X+,RRID
E065 [04] 7E70 168 MOV X+,RRID+1
E067 [04] 7E71 169 MOV X+,RRID+2
E069 [04] 7E72 170 MOV X+,RRID+3
171
E06B [03] 3F51 172 CLR LFCNTH
;Clear the timeout counters.
E06D [03] 3F52 173 CLR LFCNTL
E06F [03] 3F55 174 CLR LRCNTH
E071 [03] 3F56 175 CLR LRCNTL
E073 [03] 3F57 176 CLR RRCNTH
E075 [03] 3F58 177 CLR RRCNTL
E077 [03] 3F53 178 CLR RFCNTH
E079 [03] 3F54 179 CLR RFCNTL
E07B [03] 3F5B 180 CLR FAST_MODE
E07D [03] 3F5E 181 CLR TEMP
E07F [03] 3F5F 182 CLR TEMPTIME
E081 [03] 3F60 183 CLR TEMPTIME+1
E083 [03] 3F61 184 CLR TIMESTAMP
E085 [04] 81 185 RTS
186
187
188 ****************************************************
Main_Hyperterm.asm Assembled with CASM08Z 1/28/2003 9:41:14 PM PAGE 5
******************
189 * Init_KBD
*
190 * We don't use keyboard or IRQ interrupts in this
program. *
191 ****************************************************
******************
E086 [04] 121A 192 Init_KBD: BSET 1,KBSCR
;
E088 [04] 121D 193 BSET 1,ISCR
;Mask interrupts
E08A [04] 141A 194 BSET 2,KBSCR
;
E08C [04] 141D 195 BSET 2,ISCR
;Clear any pending interrupt requests
E08E [04] 81 196 RTS
197
198 ****************************************************
******************
199 * Init_ICG
*
200 * Initializes the internal clock generator module
for the *
201 * external oscillator.
*
202 * For now, 4.9152MHz crystal yielding 1.2288MHz bus
frequency. *
203 ****************************************************
******************
E08F [02] A613 204 Init_ICG: LDA #%00010011
;Mask for external clock
E091 [03] B736 205 LOOP_ICG STA ICGCR
;Try to set CS, ECGON and clear ICGON.
E093 [03] B136 206 CMP ICGCR
;Check to see if ICGCR okay.
E095 [03] 26FA 207 BNE LOOP_ICG
;Keep looping until ICG settles.
E097 [04] 81 208 RTS
209
210 ****************************************************
******************
211 * Init_Ports
*
212 * Initializes PTA and PTB.
*
213 * PTA[4] = MISO (Input during config mode, unused
output in RCV mode)*
214 * PTA[3] = SCK (Output during config mode, input in
RCV mode) *
215 * PTA[2] = MOSI (Output during config mode, input
in RCV mode) *
216 * PTA[1] = /RST (Output)
*
217 * PTA[0] = "RCV" LED
*
218 * PTB[3:0] = RF, RR, LR, LF LEDs
*
219 ****************************************************
Main_Hyperterm.asm Assembled with CASM08Z 1/28/2003 9:41:14 PM PAGE 6
******************
E098 [04] 6E0200 220 Init_Ports: MOV #%00000010,PTA
;Keep /RST high
E09B [04] 6E1304 221 MOV #%00010011,DDRA
;Soft SPI, one LED
E09E [03] 3F01 222 CLR PTB
;LEDs off
E0A0 [04] 6E0F05 223 MOV #%00001111,DDRB
;LEDs
E0A3 [04] 81 224 RTS
225
226 ****************************************************
******************
227 * Init_SCI
*
228 * Initializes the serial communications interface.
*
229 ****************************************************
******************
E0A4 [04] 6E4013 230 Init_SCI: MOV #%01000000,SCC1
;Enable SCI
E0A7 [04] 6E0814 231 MOV #%00001000,SCC2
;Enable Tx
E0AA [04] 6E0319 232 MOV #%00000011,SCBR
;With a 4.9152MHz XTAL, 9600 bauds.
E0AD [04] 81 233 RTS
234
235 ****************************************************
******************
236 * Init_TBM
*
237 * Initializes the timebase module. This generates
periodic *
238 * interrupts to control the LED flashing when no
data is received *
239 * from a tire. Vector points to 'TBM_Interrupt.'
*
240 * With 4.9152MHz crystal, interrupts occur every
6.67ms while TBM *
241 * is enabled.
*
242 ****************************************************
******************
E0AE [04] 131C 243 Init_TBM: BCLR 1,TBCR
;Disable TBM
E0B0 [04] 6E0E1C 244 MOV #%00001110,TBCR
;Select TBM divider and enable TBM
E0B3 [04] 81 245 RTS
246
247 ****************************************************
******************
248 * Init_Timer
*
249 * Initialize the timer module. This is used during
the SPI receive *
250 * routine, to assure that we're receiving an entire
data frame. If *
251 * the timer overflows, an interrupt is triggered
Main_Hyperterm.asm Assembled with CASM08Z 1/28/2003 9:41:14 PM PAGE 7
which resets the *
252 * bit and byte counters and goes back to the
beginning. *
253 ****************************************************
******************
E0B4 [03] B620 254 Init_Timer: LDA TSC
E0B6 [04] 6E7020 255 MOV #%01110000,TSC
;Get the timer ready, stop the counter.
E0B9 [04] 6E1323 256 MOV #$13,TMODH
;Set the modulo registers so that the
E0BC [04] 6E3324 257 MOV #$33,TMODL
;timer will overflow in 1ms.
E0BF [04] 81 258 RTS
259
260 ****************************************************
******************
261 * Init
*
262 * Initializes the MCU
*
263 ****************************************************
******************
E0C0 [04] 6E281E 264 Init: MOV #%00101000,CONFIG2
;Enable external oscillator, SCI uses CGMXCLK
E0C3 [04] 6E1B1F 265 MOV #%00011011,CONFIG1
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