📄 sst29xe020.txt
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SoftwareDrivers29EE020 / 29LE020 / 29VE0202 Megabit Page Mode EEPROMDecember 1997ABOUT THE SOFTWAREThis application note provides software driver examples for 29EE020, 2 Megabit Page Mode EEPROM, that can be used in any microprocessor based system. Software driver examples used in this document utilize two programming languages: (a) high -level "C" for broad platform support and (b) optimized 8086 assembly language. In many cases, software driver routines can be inserted "as is" into the main body of code being developed by the system software developers. Extensive comments are included in each rou-tine to describe the function of each routine. The driver in "C" language can be used with many microprocessors and microcontrollers, while the 8086 assembly language provides an optimized solution for 8086 microprocessors.NOTE:The 29EE020 is for 5.0 volt applications, the 29LE020 is for 3.0 volts application, and the 29VE020 is for 2.7 volt applications. Device functionality is identical for application of this software. For convenience, only the 29EE020 will be referenced in the example codes provided.ABOUT THE 29EE020Companion product datasheets for the 29EE020 should be reviewed in conjunction with this application note for a complete understanding of the device.The recommended method for writing the 29EE020 employs the JEDEC approved "enable software pro-tection page write" (SDP) algorithm. Using this method, any write operation (128 bytes) requires the inclusion of a series of three byte-load operations, which precede the data loading operation. The three byte-load sequence enables the SDP option during page write operation. SDP provides optimal protection from inadvertent write cycles, e.g., those triggered by noise during the system power-up or power-down. After the initial data byte-load cycle, the host must continue to load a byte into the page buffer within the byte-load cycle time (TBLC) of 100 祍 for the 29EE020 to stay in the page load cycle. Additional bytes can then be loaded within the same page, in any order. The page load cycle will terminate if no additional byte is loaded into the page buffer within 200 祍 (TBLCO) from the last byte-load cycle, i.e. no subsequent WE# high-to-low transition after the last rising edge of WE#. Both the C and 8086 assembly code in the document contain the following routines, in this order: Name Function Check_SST_29EE020 Check manufacturer and device ID Write_29EE020 Alter data Check_Toggle_Ready End of write detection using Toggle bit Check_Data_Polling End of write detection using Data# polling Enable_Chip_Data_Protection Enable JEDEC standard software data protection"C" LANGUAGE DRIVERS/******************************************************************************************************//* Copyright Silicon Storage Technology, Inc. (SST), 1994-1997 *//* Example "C" language Driver of 29EE020 2 Mbit Page Mode EEPROM *//* Chi Chung Yin, Silicon Storage Technology *//* *//* Revision 2.0, April 8, 1997 *//* *//* This file requires these external "timing" routines: *//* *//* 1.) Delay_1_Milli_Second *//* 2.) Delay_10_Milli_Second *//* 3.) Delay_10_Micro_Second *//******************************************************************************************************/#define FALSE 0#define TRUE (~FALSE)#define ROW_SIZE 128 /* Must be 128 bytes for 29EE020 */#define SST_ID 0xBF /* SST Manufacturer抯 ID code */#define SST_29EE020 0x10 /* SST 29EE020 device code */ /* NOTE-Use "0x12" for 29LE020 and 29VE020 */typedef unsigned char BYTE;/*____________________________________________________________________*//* EXERNAL ROUTINES *//*____________________________________________________________________*/extern void Delay_1_Milli_Second();extern void Delay_10_Milli_Second();extern void Delay_10_Micro_Second();extern void Check_Toggle_Ready(BYTE far *);extern void Check_Data_Polling(BYTE far *, BYTE);******************************************************************************************************//* PROCEDURE: Check_SST_29EE020 *//* *//* This procedure decides whether a physical hardware device has a SST *//* 29EE020 2 Mbit Page Mode EEPROM installed or not. *//* *//* *//* Input: *//* None *//* *//* Output: *//* return -1: indicates not a SST 29EE020 *//* return 0: indicates is a SST 29EE020 *//*****************************************************************************************************/int Check_SST_29EE020(){ BYTE far *Temp; BYTE SST_id1; BYTE SST_id2; int ReturnStatus; /* Issue the Software Product ID code to 29EE020 */ Temp = (BYTE far *)0xC0005555; /* set up address to be C000:5555h */ *Temp = 0xAA; /* write data 0xAA to the address */ Temp = (BYTE far *)0xC0002AAA; /* set up address to be C000:2AAAh */ *Temp = 0x55; /* write data 0x55 to the address */ Temp = (BYTE far *)0xC0005555; /* set up address to be C000:5555h */ *Temp = 0x90; /* write data 0x90 to the address */ Delay_10_Milli_Second(); /* Read the product ID from 29EE020 */ Temp = (BYTE far *)0xC0000000; /* set up address to be C000:0000h */ SST_id1 = *Temp; /* get first ID byte */ Temp = (BYTE far *)0xC0000001; /* set up address to be C000:0001h */ if ((SST_id1 == SST_ID) && (SST_id2 ==SST_29EE020)) ReturnStatus = 0; else ReturnStatus = -1;/ /* Issue the Soffware Product ID Exit code thus returning the 29EE020 */ /* to the read operating mode */ Temp = (BYTE far *)0xC0005555; /* set up address to be C000:5555h */ *Temp = 0xAA; /* write data 0xAA to the address */ Temp = (BYTE far *)0xC0002AAA; /* set up address to be C000:2AAAh */ *Temp = 0x55; /* write data 0x55 to the address */ Temp = (BYTE far *)0xC0005555; /* set up address to be C000:5555h */ *Temp =0xF0; /* write data 0xF0 to the address */ Delay_10_Milli_Second(); return(ReturnStatus);}/******************************************************************************************************//* PROCEDURE: Write_29EE020 *//* *//* This procedure can be used to write a total of 128 bytes at one write cycle to the *//* SST抯 29EE020. *//* *//* Input: *//* SRC SOURCE address containing the data which will be *//* written into the 29EE020. *//* Dst DESTINATION address which will be written with the *//* data passed in from ds:si *//* *//* Output: *//* None *//******************************************************************************************************/void Write_29EE020 (BYTE far *Src, BYTE far *Dst){ BYTE far *Temp; BYTE far *SourceBuf; BYTE far *DestBuf; int Index; SourceBuf = Src; DestBuf = Dst;
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