📄 fet140_tb01.s43
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#include "msp430x14x.h"
;******************************************************************************
; MSP-FET430P140 Demo - Timer_B Toggle P1.0, TBCCR0 Contmode ISR, DCO SMCLK
;
; Description; Toggle P1.0 using using software and the TB_0 ISR. Toggle rate
; is set at 50000 DCO/SMCLK cycles. Default DCO frequency is used for TBCLK.
; Durring the TB_0 ISR P0.1 is toggled and 50000 additional cycles are added
; to TBCCR0. TB_0 ISR is triggered every 50000 cycles. CPU us used only
; durring TB_ISR.
; MCLK = SMCLK = TBCLK = DCO ~ 800k
;
; MSP430F149
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; | P1.0|-->LED
;
; M.Buccini
; Texas Instruments, Inc
; January 2002
;******************************************************************************
;------------------------------------------------------------------------------
ORG 01100h ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize 'F149 stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupTB mov.w #TBSSEL1+TBCLR,&TBCTL ; SMCLK, clear TAR
SetupC0 mov.w #CCIE,&TBCCTL0 ; CCR0 interrupt enabled
mov.w #50000,&TBCCR0 ;
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
bis.w #MC1,&TBCTL ; Start Timer_a in continous mode
eint ; Enable interrupts
;
Mainloop bis.w #CPUOFF,SR ; CPU off
nop ; Required for C-spy
;
;------------------------------------------------------------------------------
TB0_ISR; Toggle P1.0
;------------------------------------------------------------------------------
xor.b #001h,&P1OUT ; Toggle P1.0
add.w #50000,&TBCCR0 ; Add Offset to CCR0
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors Used MSP430x13x/14x
;------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFFAh ; Timer_B0 Vector
DW TB0_ISR ;
END
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