tft.tan.qmsg

来自「stm32数码相框」· QMSG 代码 · 共 16 行 · 第 1/4 页

{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clkin " "Info: Assuming node \"clkin\" is an undefined clock" {  } { { "TFT.bdf" "" { Schematic "F:/570/570_h_speed/TFT.bdf" { { 128 -192 -24 144 "clkin" "" } } } } { "c:/electron/altera/91/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/electron/altera/91/quartus/bin/Assignment Editor.qase" 1 { { 0 "clkin" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0 -1}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0 -1}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "2 " "Warning: Found 2 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|HSYNC " "Info: Detected ripple clock \"lcd:inst\|HSYNC\" as buffer" {  } { { "lcd.v" "" { Text "F:/570/570_h_speed/lcd.v" 5 -1 0 } } { "c:/electron/altera/91/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/electron/altera/91/quartus/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|HSYNC" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 -1} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|CLKOUT " "Info: Detected ripple clock \"lcd:inst\|CLKOUT\" as buffer" {  } { { "lcd.v" "" { Text "F:/570/570_h_speed/lcd.v" 5 -1 0 } } { "c:/electron/altera/91/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/electron/altera/91/quartus/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|CLKOUT" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 -1}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0 -1}