📄 halconf.out.h
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#ifndef HALCONF__H/* ============================================================================ Project Name : jayaCard Module Name : proto/cdl/halconf.h Version : $Id: halconf.out.h,v 1.14 2004/01/12 21:18:01 dgil Exp $ Description: This is the template Configuration Description File for HAL The Original Code is jayaCard code. The Initial Developer of the Original Code is Gilles Dumortier. Portions created by the Initial Developer are Copyright (C) 2002-2004 the Initial Developer. All Rights Reserved. Contributor(s): This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; see http://www.gnu.org/licenses/gpl.html History Rev Description 030203 dgil wrote it from scratch ============================================================================*/#define HALCONF__H/* ========================================================================= * The overall HAL package definition. {{CFG_DATA cdl_package JAYA_PACKAGE_HAL { display "Hardware Abstract Layer (HAL)" type dummy description " This package contains the core functionality of the jayaCard HAL. It relies on functionality provided by various HAL packages and by the jayaCard infrastructure. In turn the HAL provides support for other packages such as the BIOS and the ISO7816 layers (T=0/T=CL). " } cdl_component JAYA_HAL_HARDWARE { display "Hardware" type dummy parent JAYA_PACKAGE_HAL description " This component contains the hardware configuration. " } cdl_component JAYA_HAL_SOFTWARE { display "Software" type dummy parent JAYA_PACKAGE_HAL description " This component contains the software configuration. " } cdl_component JAYA_HAL_EEPROM { display "EEPROM" type dummy parent JAYA_HAL_HARDWARE description " This component contains the EEPROM configuration. " } cdl_component JAYA_HAL_RAM { display "RAM" type dummy parent JAYA_HAL_HARDWARE description " This component contains the RAM configuration. " } cdl_component JAYA_HAL_STACK { display "STACK" type dummy parent JAYA_HAL_HARDWARE description " This component contains the RAM configuration. " } cdl_package JAYA_PACKAGE_HAL_CRYPTO { display "Crypto" type dummy parent JAYA_PACKAGE_HAL description " This package contains the crypto components and configuration. " } cdl_component JAYA_HAL_MANUFACTURING { display "Manufacturing" type dummy parent JAYA_PACKAGE_HAL description " This component contains the Manufacturing configuration and options. " } }}CFG_DATA*/#define JAYA_PACKAGE_HAL#define JAYA_HAL_HARDWARE#define JAYA_HAL_SOFTWARE#define JAYA_HAL_EEPROM#define JAYA_PACKAGE_HAL_CRYPTO#define JAYA_HAL_MANUFACTURING#define JAYA_HAL_RAM#define JAYA_HAL_STACK/* ========================================================================= * The overall HAL Hardware component definition. {{CFG_DATA cdl_option JAYACFG_POWER_LEVEL_INDICATOR { display "Has a power level indicator" parent JAYA_HAL_HARDWARE type boolean default 1 description " The hardware supports a power level indicator or sensor to measure the current consumption. " } cdl_option JAYACFG_CONTACT_INTERFACE { display "Has a contact interface" parent JAYA_HAL_HARDWARE type boolean default 1 description " The hardware supports a contact interface. This support is required by the T=0 communication package. " } cdl_component JAYA_CONTACTLESS_INTERFACE { display "Contactless interface" parent JAYA_HAL_HARDWARE type dummy description " The hardware supports a contactless interface (mandatory). " } cdl_option JAYACFG_CONTACTLESS_INTERFACE_TYPEA { display "Has a Type A interface" parent JAYA_CONTACTLESS_INTERFACE type boolean default 1 description " The hardware supports a contactless interface of 14443 type A. " } cdl_option JAYACFG_CONTACTLESS_INTERFACE_TYPEB { display "Has a Type B interface" parent JAYA_CONTACTLESS_INTERFACE type boolean default 1 description " The hardware supports a contactless interface of 14443 type B. " } cdl_option JAYACFG_CONTACTLESS_INTERFACE_SONY { display "Has a Sony interface" parent JAYA_CONTACTLESS_INTERFACE type boolean default 0 description " The hardware supports a contactless interface of Sony. " } cdl_option JAYACFG_CONTACTLESS_INTERFACE_15693 { display "Has a 15693 interface" parent JAYA_CONTACTLESS_INTERFACE type boolean default 0 description " The hardware supports a 15693 contactless interface. " } cdl_option JAYACFG_CONTACTLESS_BAUDRATE { display "Contactless baudrate" parent JAYA_CONTACTLESS_INTERFACE type boolean default 0 description " The contactless interace supports a baudrate setting (106, 212, 424 or 848 Kbaud/s). Otherwise, only the 106 Kbaud/s is supported. " } }}CFG_DATA*/#define JAYACFG_POWER_LEVEL_INDICATOR#define JAYACFG_CONTACT_INTERFACE#define JAYA_CONTACTLESS_INTERFACE#define JAYACFG_CONTACTLESS_INTERFACE_TYPEA#define JAYACFG_CONTACTLESS_INTERFACE_TYPEB#undef JAYACFG_CONTACTLESS_INTERFACE_SONY#undef JAYACFG_CONTACTLESS_INTERFACE_15693#define JAYACFG_CONTACTLESS_BAUDRATE/* ========================================================================= * The overall HAL Software component definition. {{CFG_DATA cdl_package JAYA_PACKAGE_T0 { display "T=0 software package" parent JAYA_HAL_SOFTWARE type boolean default 1 requires JAYACFG_CONTACT_INTERFACE description " This package contains the low-level and driver functions the T=0 communication protocol. It relies on a hardware contact interface. " } cdl_package JAYA_PACKAGE_CHIP { display "Chip software options" parent JAYA_HAL_SOFTWARE type dummy description " This package contains the software options of the chip. " } cdl_component JAYA_ATTACK_PROTECTION { display "Attack protection" parent JAYA_PACKAGE_CHIP type boolean default 1 active_if JAYA_PACKAGE_HAL_CRYPTO description " Set this option if the chip supports attack protection mechanisms. " } cdl_component JAYA_COPROCESSOR_MANAGER { display "Co-processors Manager" parent JAYA_PACKAGE_CHIP type boolean default 1 active_if JAYA_PACKAGE_HAL_CRYPTO description " This functionality is used by the BIOS and the COS to signal the HAL the usage or not of a specific component. When the usage change, the microcontroller can adjust the chip consumption and if existing the sleep mode of the coprocessor. " } cdl_option JAYACFG_CPU_BOOST { display "Cpu Boost" parent JAYA_HAL_SOFTWARE type boolean default 1 description " Set this option if the clock of the CPU can be boosted right after the contactless anticollision and selection mechanism. " } }}CFG_DATA*/#define JAYA_PACKAGE_T0#define JAYA_PACKAGE_CHIP#define JAYA_ATTACK_PROTECTION#define JAYA_COPROCESSOR_MANAGER#define JAYACFG_CPU_BOOST/* ========================================================================= * The overall HAL EEPROM component definition. {{CFG_DATA cdl_option JAYACFG_EEPROM_INVERSED { display "EEPROM Inversed" parent JAYA_HAL_EEPROM type boolean default 0 description " Set this option if the real content is inversed : 0xFF is the value of an erased cell. Unset this option if the EEPROM content is not inversed : 0x00 is the value of an erased cell. " } cdl_option JAYACFG_CHECK_EEPROM { display "Check EEPROM" parent JAYA_HAL_EEPROM type boolean default 1 description " Set this option to check an eeprom write " } cdl_option JAYACFG_EEPROM_PAGE_LEN { display "Page length" parent JAYA_HAL_EEPROM type count default 64 legal_values 1 to 256 description " Size in bytes of an EEPROM page (write mode) " } cdl_option BASE_EEPROM { display "Base EEPROM" parent JAYA_HAL_EEPROM type count default 0x0000 legal_values 0x0000 to 0x10000 description " Base address of the EEPROM. " } cdl_option END_EEPROM { display "End EEPROM" parent JAYA_HAL_EEPROM type count default 0x3FBF legal_values 0x0000 to 0x10000 description " End address of the EEPROM. " } }}CFG_DATA*/#undef JAYACFG_EEPROM_INVERSED#define JAYACFG_CHECK_EEPROM#define JAYACFG_EEPROM_PAGE_LEN 64#define BASE_EEPROM 0x0000#define END_EEPROM 0x3FBF/* ========================================================================= * The overall HAL Crypto package definition. {{CFG_DATA cdl_component JAYA_DES { display "DES cipher" parent JAYA_PACKAGE_HAL_CRYPTO type boolean default 1 description " Set this option to provide the DES cipher to the BIOS package. Algorithm number within the BIOS will be 0. " } cdl_option JAYACFG_SOFTWARE_DES { display "DES in software" parent JAYA_DES type boolean default 1 description " Set this option to provide the DES cipher in software because your chip doesn't support a DES co-processor. " } cdl_component JAYA_DESX { display "DESX cipher" parent JAYA_PACKAGE_HAL_CRYPTO type boolean default 1 requires JAYA_DES description " Set this option to provide the DESX cipher to the BIOS package. Algorithm number within the BIOS will be 1. " } cdl_option JAYACFG_SOFTWARE_DESX { display "DESX in software" parent JAYA_DESX type boolean default 1 description " Set this option to provide the DESX cipher in software because your chip doesn't support a DESX co-processor. " } cdl_component JAYA_3DES { display "3DES cipher" parent JAYA_PACKAGE_HAL_CRYPTO type boolean default 1 description " Set this option to provide the 3DES cipher to the BIOS package. Algorithm number within the BIOS will be 2 (3DES2) or 3 (3DES3). " } cdl_option JAYACFG_SOFTWARE_3DES { display "3DES in software" parent JAYA_3DES type boolean default 1 description " Set this option to provide the 3DES cipher in software because your chip doesn't support a 3DES co-processor. " } cdl_component JAYA_AES { display "AES cipher" parent JAYA_PACKAGE_HAL_CRYPTO type boolean default 1 description " Set this option to provide the AES cipher to the BIOS package. Algorithm number within the BIOS will be 4. " } cdl_option JAYACFG_SOFTWARE_AES { display "AES in software" parent JAYA_AES type boolean default 1 description " Set this option to provide the AES cipher in software because your chip doesn't support a AES co-processor. " } cdl_component JAYA_SHA1 { display "SHA-1 hash" parent JAYA_PACKAGE_HAL_CRYPTO type boolean default 1 description " Set this option to provide the SHA1 to the BIOS package. " } cdl_option JAYACFG_SOFTWARE_SHA1 { display "SHA1 in software" parent JAYA_SHA1 type boolean default 1 description "
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