halconf.out.h

一个免费的SMART CARD OS系统。

	default		1
	description
 	"
	Set this option to provide the SHA1 hash in software because your chip
 	doesn't support a SHA-1 co-processor.
	"
 }

 cdl_component JAYA_MD5 {
	display		"MD5 hash"
    parent  	JAYA_PACKAGE_HAL_CRYPTO
	type		boolean
	default		0
	description
 	"
	Set this option to provide the MD5 to the BIOS package.

	Algorithm number within the BIOS will be 0.
	"
 }

 cdl_option JAYACFG_SOFTWARE_MD5 {
	display		"MD5 in software"
    parent  	JAYA_MD5
	type		boolean
	default		1
	description
 	"
	Set this option to provide the MD5 hash in software because your chip
 	doesn't support a MD5 co-processor.

	Algorithm number within the BIOS will be 1.
	"
 }

 cdl_option JAYACFG_CIPHER_ALGO_DEFAULT {
	display		"Default cipher"
    parent  	JAYA_PACKAGE_HAL_CRYPTO
	type		count
	default		0
    legal_values 0 to 4
	description
 	"
	This is the default cipher algorithm number :
		0	DES
		1	DESX
		2	3DES2
		3	3DES3
		4	AES
 	"
 }

 cdl_option JAYACFG_HASH_ALGO_DEFAULT {
	display		"Default hash"
    parent  	JAYA_PACKAGE_HAL_CRYPTO
	type		count
	default		0
    legal_values 0 to 1
	description
 	"
	This is the default hash algorithm number :
		0	SHA-1
		1	MD5
 	"
 }

 cdl_option JAYACFG_IV_ZERO {
	display		"IV Zero"
    parent  	JAYA_PACKAGE_HAL_CRYPTO
	type		boolean
	default		0
	description
 	"
	If set, the IV is initialized with 0 otherwise it is initalized with
 	random values.
 	"
 }

 cdl_option JAYACFG_CIPHER_PAD_DEFAULT {
	display		"Default Padding"
    parent  	JAYA_PACKAGE_HAL_CRYPTO
	type		count
	default		0
    legal_values 0 to 5
	description
 	"
	This is the default padding algorithm number :
		0	no padding at all
		1	spaces
		2	000...000
		3	00...000N
		4	NN...NNNN (PKCS#5)
		5	80000...0 (EMV)
 	"
 }

 cdl_option JAYACFG_CIPHER_MAC_DEFAULT {
	display		"Default MAC"
    parent  	JAYA_PACKAGE_HAL_CRYPTO
	type		count
	default		0
    legal_values 0 to 5
	description
 	"
	This is the default padding algorithm number :
		0	HMAC-SHA1
		1	HMAC-MD5
		2	ISO9797-1 algorithm 1 DES / padding method 2 (REFDATA_PAD_EMV)
		3	ISO9797-1 algorithm 1 DESX / padding method 2 (REFDATA_PAD_EMV)
		4	ISO9797-1 algorithm 1 3DES2 / padding method 2 (REFDATA_PAD_EMV)
		5	ISO9797-1 algorithm 4 DES / padding method 2 (REFDATA_PAD_EMV) / Triple-DES MAC
 	"
 }

 }}CFG_DATA

*/

#undef JAYA_MD5
#undef JAYACFG_SOFTWARE_MD5

#define JAYA_SHA1
#define JAYACFG_SOFTWARE_SHA1

#define JAYA_3DES
#define JAYACFG_SOFTWARE_3DES

#define JAYA_DES
#define JAYACFG_SOFTWARE_DES

#define JAYA_DESX
#define JAYACFG_SOFTWARE_DESX

#undef JAYA_AES
#undef JAYACFG_SOFTWARE_AES

#define JAYACFG_CIPHER_ALGO_DEFAULT		0x0
#define JAYACFG_HASH_ALGO_DEFAULT		0x0
#define JAYACFG_CIPHER_PAD_DEFAULT		0x5
#define JAYACFG_CIPHER_MAC_DEFAULT		0x00

#define JAYACFG_IV_ZERO

/* =========================================================================
 * The overall HAL Manufacturing package definition.

 {{CFG_DATA

 cdl_component JAYA_OTP {
	display		"OTP Configuration"
    parent  	JAYA_HAL_MANUFACTURING
	type		boolean
	default		1
	description
 	"
	If set, the component provides OTP.
	"
 }

 cdl_component JAYA_WAFER {
	display		"Wafer Configuration"
    parent  	JAYA_HAL_MANUFACTURING
	type		dummy
	description
 	"
	Wafer Configuration.
	"
 }

 cdl_option BASE_OTP {
	display		"Base OTP"
    parent  	JAYA_OTP
	type		count
	default		0xFFE0
    legal_values 0x0000 to 0xFFFF
	description
 	"
	Base address of the OTP.
 	"
 }

 cdl_option END_OTP {
	display		"End OTP"
    parent  	JAYA_OTP
	type		count
	default		0xFFEF
    legal_values 0x0000 to 0xFFFF
	description
 	"
	End address of the OTP.
 	"
 }

 cdl_option BASE_MANUFACTURING_DATA {
	display		"Base Manufacturing Data"
    parent  	JAYA_WAFER
	type		count
	default		0x3F00
    legal_values 0x0000 to 0xFFFF
	description
 	"
	Base address of the Manufacturing Data.
 	"
 }

 cdl_option END_MANUFACTURING_DATA {
	display		"End Manufacturing Data"
    parent  	JAYA_WAFER
	type		count
	default		0x3F3F
    legal_values 0x0000 to 0xFFFF
	description
 	"
	End address of the Manufacturing Data.
 	"
 }

 cdl_option ADDR_CHIP_UUID {
	display		"Chip UUID Address"
    parent  	JAYA_WAFER
	type		count
	default		0xFFC0
    legal_values 0x0000 to 0xFFFF
	description
 	"
	Chip UUID Address.
 	"
 }

 cdl_option ADDR_MSK {
	display		"MSK Address"
    parent  	JAYA_WAFER
	type		count
	default		0x3F10
    legal_values 0x0000 to 0xFFFF
	description
 	"
	MaSter Key  Address.
 	"
 }

 cdl_option ADDR_MSK_ATTEMPT {
	display		"MSK Attempt Address"
    parent  	JAYA_WAFER
	type		count
	default		0x3F22
    legal_values 0x0000 to 0xFFFF
	description
 	"
	MaSter Key Attempt Counter Address.
 	"
 }

 cdl_option ADDR_RANDOM {
	display		"RANDOM Address"
    parent  	JAYA_WAFER
	type		count
	default		0x3F30
    legal_values 0x0000 to 0xFFFF
	description
 	"
	Address of an array of random bytes written during manufacturing.
 	"
 }

 cdl_option SIZE_RANDOM {
	display		"RANDOM Size"
    parent  	JAYA_WAFER
	type		count
	default		32
    legal_values 16 to 32
	description
 	"
	Size in bytes of an array of random bytes written during manufacturing.
 	"
 }

 }}CFG_DATA

*/

#define JAYA_OTP
#define JAYA_WAFER
#define BASE_OTP			0xFFE0
#define END_OTP				0xFFEF
#define BASE_MANUFACTURING_DATA	0x3F00
#define END_MANUFACTURING_DATA	0x3F3F
#define ADDR_CHIP_UUID		0xFFC0
#define ADDR_MSK			0x3F10
#define ADDR_MSK_ATTEMPT	0x3F22
#define ADDR_RANDOM			0x3F30
#define SIZE_RANDOM			16

/* =========================================================================
 * The overall HAL RAM package definition.

 {{CFG_DATA

 cdl_component JAYA_MEMORY {
	display		"Memory Layout"
    parent  	JAYA_HAL_SOFTWARE
	type		dummy
	description
 	"
	Memory Layout.
	"
 }


 cdl_option SIZE_OF_XDATA {
	display		"Size Of XDATA"
    parent  	JAYA_HAL_RAM
	type		count
	default		0x400
    legal_values 0x00 to 0xFFFF
	description
 	"
	Size in bytes of the XDATA area.
 	"
 }

 cdl_option ADDR_OF_DATAGROUP {
	display		"Address Of DATAGROUP"
    parent  	JAYA_MEMORY
	type		count
	default		0x65
    legal_values 0x00 to 0xFF
	description
 	"
	Base Address of the DATAGROUP area.
	CHANGE THIS ACCORDING TO AREA USED BY THE OS FOR DATAGROUP
 	"
 }

 cdl_option SIZE_OF_DATAGROUP {
	display		"Size Of DATAGROUP"
    parent  	JAYA_MEMORY
	type		count
	default		0x20
    legal_values 0x00 to 0xFF
	description
 	"
	Size in bytes of the DATAGROUP area.
	CHANGE THIS ACCORDING TO SIZE USED BY THE OS FOR DATAGROUP.
 	"
 }

 cdl_option ADDR_OF_SAVE_DATAGROUP {
	display		"Address to save the DATAGROUP"
    parent  	JAYA_MEMORY
	type		count
	default		0x200
    legal_values 0x0000 to 0xFFFF
	description
 	"
	Base Address of the area used to save the DATAGROUP.
 	See __hal_save_context() and __hal_restore_context() primitives
	"
 }

 cdl_option ADDR_OF_XDATAGROUP {
	display		"Address Of XDATAGROUP"
    parent  	JAYA_MEMORY
	type		count
	default		0x100
    legal_values 0x0000 to 0xFFFF
	description
 	"
	Base Address of the XDATAGROUP area.
 	"
 }

 cdl_option SIZE_OF_XDATAGROUP {
	display		"Size Of XDATAGROUP"
    parent  	JAYA_MEMORY
	type		count
	default		0x20
    legal_values 0x00 to 0xFF
	description
 	"
	Size in bytes of the XDATAGROUP area.
 	"
 }

 cdl_component JAYACFG_STACK {
	display		"Has STACK"
    parent  	JAYA_HAL_STACK
	type		radio
	default		0
	prohibe		JAYACFG_XSTACK
	description
 	"
	If set, the component provides STACK (8 bits stack in DATA).
	"
 }

 cdl_option ADDR_OF_STACK {
	display		"Address Of STACK"
    parent  	JAYA_MEMORY
	type		count
	default		0x80
    legal_values 0x00 to 0xFF
	active_if  	JAYACFG_STACK
	description
 	"
	Base Address of the STACK area.
 	"
 }

 cdl_option SIZE_OF_STACK {
	display		"Size Of STACK"
    parent  	JAYA_MEMORY
	type		count
	default		0x10
    legal_values 0x00 to 0xFF
	active_if  	JAYACFG_STACK
	description
 	"
	Size in bytes of the STACK area.
 	"
 }

 cdl_component JAYACFG_XSTACK {
	display		"Has XSTACK"
    parent  	JAYA_HAL_STACK
	type		radio
	default		1
	prohibe		JAYACFG_STACK
	description
 	"
	If set, the component provides XSTACK (16 bits stack in XDATA).
	"
 }

 cdl_option ADDR_OF_XSTACK {
	display		"Address Of XSTACK"
    parent  	JAYA_MEMORY
	type		count
	default		0x200
    legal_values 0x00 to 0xFFFF
	active_if  	JAYACFG_XSTACK
	description
 	"
	Base Address of the XSTACK area.
 	"
 }

 cdl_option SIZE_OF_XSTACK {
	display		"Size Of XSTACK"
    parent  	JAYA_MEMORY
	type		count
	default		0x40
    legal_values 0x00 to 0xFFFF
	active_if  	JAYACFG_XSTACK
	description
 	"
	Size in bytes of the XSTACK area.
 	"
 }

 cdl_option ADDR_OF_BDATA {
	display		"Address Of BDATA"
    parent  	JAYA_HAL_RAM
	type		count
	default		0x20
    legal_values 0x00 to 0xFF
	description
 	"
	Base Address of the BDATA area (bit addressable area).
 	"
 }

 cdl_option SIZE_OF_BDATA {
	display		"Size Of BDATA"
    parent  	JAYA_HAL_RAM
	type		count
	default		8
    legal_values 0 to 1024
	description
 	"
	Size in bytes of the BDATA area (bit addressable area).
 	"
 }

 }}CFG_DATA

*/

#define SIZE_OF_XDATA		1024

#define ADDR_OF_DATAGROUP	0x65
#define SIZE_OF_DATAGROUP   0x20

#define ADDR_OF_SAVE_DATAGROUP	0x300

#define ADDR_OF_XDATAGROUP	0x100
#define SIZE_OF_XDATAGROUP  0x20

#undef JAYACFG_STACK
#define ADDR_OF_STACK		0x80
#define SIZE_OF_STACK		0x10

#define JAYACFG_XSTACK
#define ADDR_OF_XSTACK		0x200
#define SIZE_OF_XSTACK		0x40

#define ADDR_OF_BDATA		0x20
#define SIZE_OF_BDATA   	8

/* ========================================================================= */

#endif
/* defined HALCONF__H */