radeon.cpp

ati driver

/******************************************************************************
/
/	File:			Radeon.cpp
/
/	Description:	ATI Radeon Graphics Chip interface.
/
/	Copyright 2001, Carlos Hasan
/
*******************************************************************************/

#include <unistd.h>
#include <dirent.h>
#include <Debug.h>
#include <string.h>
//#include "Driver.h"
#include "Radeon.h"

static const char * const C_RADEON_REGISTER_AREA_NAME = "RadeonRegisters";
static const char * const C_RADEON_MEMORY_AREA_NAME = "RadeonMemory";
static const char * const C_RADEON_ROM_AREA_NAME = "RadeonROM";

// CRadeonRect
CRadeonRect::CRadeonRect()
	:	fLeft(0),
		fTop(0),
		fRight(0),
		fBottom(0)
{
}

CRadeonRect::CRadeonRect(int left, int top, int right, int bottom)
	:	fLeft(left),
		fTop(top),
		fRight(right),
		fBottom(bottom)
{
}

int CRadeonRect::Left() const
{
	return fLeft;
}

int CRadeonRect::Top() const
{
	return fTop;
}

int CRadeonRect::Right() const
{
	return fRight;
}

int CRadeonRect::Bottom() const
{
	return fBottom;
}

int CRadeonRect::Width() const
{
	return fRight - fLeft + 1;
}

int CRadeonRect::Height() const
{
	return fBottom - fTop + 1;
}

void CRadeonRect::SetLeft(int value)
{
	fLeft = value;
}
	
void CRadeonRect::SetTop(int value)
{
	fTop = value;
}

void CRadeonRect::SetRight(int value)
{
	fRight = value;
}

void CRadeonRect::SetBottom(int value)
{
	fBottom = value;
}

void CRadeonRect::SetTo(int left, int top, int right, int bottom)
{
	fLeft = left;
	fTop = top;
	fRight = right;
	fBottom = bottom;
}

void CRadeonRect::MoveTo(int left, int top)
{
	fRight += left - fLeft;
	fBottom += top - fTop;
	fLeft += left - fLeft;
	fTop += top - fTop;
}

void CRadeonRect::ResizeTo(int width, int height)
{
	fRight = fLeft + width - 1;
	fBottom = fTop + height - 1;
}


// CRadeon
CRadeon::CRadeon( const char *dev_name )
	:	fHandle(0),
		fRegister(NULL),
		fROM(NULL),
		fVirtualCard(NULL),
		fSharedInfo(NULL),
		fRegisterArea(0),
		fROMArea(0),
		fVirtualCardArea(0),
		fSharedInfoArea(0)
{
	PRINT(("CRadeon::CRadeon()\n"));
	
	if ((fHandle = open(dev_name, O_RDWR | O_CLOEXEC)) < 0) {
		PRINT(("CRadeon::CRadeon() - Can't open kernel driver\n"));
		return;
	}

	radeon_get_private_data gpd;
	
	if (GetDeviceInformation(gpd) < B_OK) {
		PRINT(("CRadeon::CRadeon() - Can't get device information\n"));
		return;
	}

	CloneArea( 
		"Radeon virtual card", gpd.virtual_card_area, 
		&fVirtualCardArea, (void **)&fVirtualCard );
	CloneArea( 
		"Radeon shared info", gpd.shared_info_area, 
		&fSharedInfoArea, (void **)&fSharedInfo );
		
	if( fSharedInfo != NULL )  {
		CloneArea(
			"Radeon regs", fSharedInfo->regs_area, 
			&fRegisterArea, (void **)&fRegister );
		CloneArea(
			"Radeon ROM", fSharedInfo->ROM_area, 
			&fROMArea, (void **)&fROM );
	}
	
	if (fVirtualCard == NULL || fSharedInfo == NULL || 
		fROM == NULL || fRegister == NULL) 
	{
		PRINT(("CRadeon::CRadeon() - Can't map memory apertures\n"));
		return;
	} 
	
	PRINT(("CRadeon::CRadeon() - ATI Radeon found\n"));
}

CRadeon::~CRadeon()
{
	PRINT(("CRadeon::~CRadeon()\n"));

	if( fVirtualCard != NULL )
		delete_area( fVirtualCardArea );
		
	if( fSharedInfo != NULL )
		delete_area( fSharedInfoArea );
		
	if (fRegister != NULL)
		delete_area( fRegisterArea );
		
	if (fROM != NULL)
		delete_area( fROMArea );

	if (fHandle >= 0)		
		close(fHandle);
}

status_t CRadeon::InitCheck() const
{
	return 
		(fHandle >= 0 && 
		fRegister != NULL && fROM != NULL &&
		fVirtualCard != NULL && fSharedInfo != NULL) ? B_OK : B_ERROR;
}

uint32 CRadeon::VirtualMemoryBase() const
{
	return fSharedInfo->memory[mt_local].virtual_addr_start;
}

int CRadeon::Register(radeon_register index) const
{
	return fRegister[index >> 2];
}

void CRadeon::SetRegister(radeon_register index, int value)
{
	fRegister[index >> 2] = value;
}

int CRadeon::Register(radeon_register index, int mask) const
{
	return fRegister[index >> 2] & mask;
}

void CRadeon::SetRegister(radeon_register index, int mask, int value)
{
#ifdef DEBUG
	if ((value & ~mask) != 0)
		PRINT(("CRadeon::SetRegister(0x%04x, 0x%08x, 0x%08x)\n", index, mask, value));
#endif

	fRegister[index >> 2] = (fRegister[index >> 2] & ~mask) | (value & mask);
}

int CRadeon::VIPRegister(int device, int address)
{
	radeon_vip_read vr;
	status_t res;
	
	vr.magic = RADEON_PRIVATE_DATA_MAGIC;
	vr.channel = device;
	vr.address = address;
	vr.lock = true;
	
	res = ioctl( fHandle, RADEON_VIPREAD, &vr, sizeof( vr ));
	
	if( res == B_OK )
		return vr.data;
	else
		return -1;
}
	
void CRadeon::SetVIPRegister(int device, int address, int value)
{
	radeon_vip_write vw;
	
	vw.magic = RADEON_PRIVATE_DATA_MAGIC;
	vw.channel = device;
	vw.address = address;
	vw.data = value;
	vw.lock = true;
	
	ioctl( fHandle, RADEON_VIPWRITE, &vw, sizeof( vw ));
}

int CRadeon::FindVIPDevice( uint32 device_id )
{
	radeon_find_vip_device fvd;
	status_t res;
	
	fvd.magic = RADEON_PRIVATE_DATA_MAGIC;
	fvd.device_id = device_id;
	
	res = ioctl( fHandle, RADEON_FINDVIPDEVICE, &fvd, sizeof( fvd ));
	
	if( res == B_OK )
		return fvd.channel;
	else
		return -1;
}

void CRadeon::GetPLLParameters(int & refFreq, int & refDiv, int & minFreq, int & maxFreq, int & xclock)
{
	refFreq = fSharedInfo->pll.ref_freq;
	refDiv = fSharedInfo->pll.ref_div;
	minFreq = fSharedInfo->pll.min_pll_freq;
	maxFreq = fSharedInfo->pll.max_pll_freq;
	xclock = fSharedInfo->pll.xclk;
}

void CRadeon::GetMMParameters(radeon_video_tuner & tuner,
							  radeon_video_decoder & video,
							  radeon_video_clock & clock,
							  int & tunerPort,
							  int & compositePort,
							  int & svideoPort)
{
	unsigned char *fVideoBIOS = fROM + fROM[0x48] + (fROM[0x49] << 8);
	unsigned char * fMMTable = fROM + fVideoBIOS[0x38] + (fVideoBIOS[0x39] << 8);

	switch (fMMTable[0] & 0x1f) {
	case 0x00:
		tuner = C_RADEON_NO_TUNER;
		break;
	case 0x01:
		tuner = C_RADEON_FI1236_MK1_NTSC;
		break;
	case 0x02:
		tuner = C_RADEON_FI1236_MK2_NTSC_JAPAN;
		break;
	case 0x03:
		tuner = C_RADEON_FI1216_MK2_PAL_BG;
		break;
	case 0x04:
		tuner = C_RADEON_FI1246_MK2_PAL_I;
		break;
	case 0x05:
		tuner = C_RADEON_FI1216_MF_MK2_PAL_BG_SECAM_L;
		break;
	case 0x06:
		tuner = C_RADEON_FI1236_MK2_NTSC;
		break;
	case 0x07:
		tuner = C_RADEON_FI1256_MK2_SECAM_DK;
		break;
	case 0x08:
		tuner = C_RADEON_FI1236_MK2_NTSC;
		break;
	case 0x09:
		tuner = C_RADEON_FI1216_MK2_PAL_BG;
		break;
	case 0x0a:
		tuner = C_RADEON_FI1246_MK2_PAL_I;
		break;
	case 0x0b:
		tuner = C_RADEON_FI1216_MK2_PAL_BG_SECAM_L;
		break;
	case 0x0c:
		tuner = C_RADEON_FI1236_MK2_NTSC;
		break;
	case 0x0d:
		tuner = C_RADEON_TEMIC_FN5AL_PAL_IBGDK_SECAM_DK;
		break;
	default:
		tuner = C_RADEON_NO_TUNER;
		break;
	}
	
	switch (fMMTable[5] & 0x0f) {
	case 0x00:
		video = C_RADEON_NO_VIDEO;
		break;
	case 0x01:
		video = C_RADEON_BT819;
		break;
	case 0x02:
		video = C_RADEON_BT829;
		break;
	case 0x03:
		video = C_RADEON_BT829A;
		break;
	case 0x04:
		video = C_RADEON_SA7111;
		break;
	case 0x05:
		video = C_RADEON_SA7112;
		break;
	case 0x06:
		video = C_RADEON_RAGE_THEATER;
		break;
	default:
		video = C_RADEON_NO_VIDEO;
		break;
	}
	
	switch (fMMTable[5] & 0xf0) {
	case 0x00:
	case 0x10:
	case 0x20:
	case 0x30:
		clock = C_RADEON_NO_VIDEO_CLOCK;
		break;
	case 0x40:
		clock = C_RADEON_VIDEO_CLOCK_28_63636_MHZ;
		break;
	case 0x50:
		clock = C_RADEON_VIDEO_CLOCK_29_49892_MHZ;
		break;
	case 0x60:
		clock = C_RADEON_VIDEO_CLOCK_27_00000_MHZ;
		break;
	case 0x70:
		clock = C_RADEON_VIDEO_CLOCK_14_31818_MHZ;
		break;
	default:
		clock = C_RADEON_NO_VIDEO_CLOCK;
		break;
	}

	for (int port = 0; port < 4; port++) {	
		switch (fMMTable[7 + port] & 0x03) {
		case 0x00:
			// Unused or Invalid
			break;
		case 0x01:
			// Tuner Input
			tunerPort = 0;
			break;
		case 0x02:
			// Front/Rear Composite Input
			compositePort = (fMMTable[7 + port] & 0x04 ? 2 : 1);
			break;
		case 0x03:
			// Front/Rear SVideo Input
			svideoPort = (fMMTable[7 + port] & 0x04 ? 6 : 5);
			break;
		}
	}
}

status_t CRadeon::AllocateGraphicsMemory( 
	memory_type_e memory_type, int32 size,
	int32 *offset, int32 *handle )
{
	radeon_alloc_mem am;
	status_t res;
	
	am.magic = RADEON_PRIVATE_DATA_MAGIC;
	am.size = size;
	am.memory_type = mt_local;
	am.global = false;
	
	res = ioctl( fHandle, RADEON_ALLOC_MEM, &am );
	
	if( res != B_OK )
		return res;
		
	*handle = am.handle;
	*offset = am.offset;
	return B_OK;
}
		
void CRadeon::FreeGraphicsMemory( 
	memory_type_e memory_type, int32 handle )
{
	radeon_free_mem fm;
	
	fm.magic = RADEON_PRIVATE_DATA_MAGIC;
	fm.memory_type = memory_type;
	fm.global = false;
	fm.handle = handle;

	ioctl( fHandle, RADEON_FREE_MEM, &fm );
}

status_t CRadeon::DMACopy( 
	uint32 src, void *target, size_t size, bool lock_mem, bool contiguous )
{
	radeon_dma_copy dc;
	
	dc.magic = RADEON_PRIVATE_DATA_MAGIC;
	dc.src = src;
	dc.target = target;
	dc.size = size;