radeon_interface.h

ati driver

/*
	Copyright (c) 2002, Thomas Kurschel


	Part of Radeon accelerant
		
	Interface between kernel driver and accelerant
*/


#ifndef _RADEON_INTERFACE_H
#define _RADEON_INTERFACE_H

#include <Accelerant.h>
#include <Drivers.h>
#include <PCI.h>
#include <OS.h>
#include "video_overlay.h"
#include "benaphore.h"


// magic code for ioctls
#define RADEON_PRIVATE_DATA_MAGIC	'TKRA'

#define MAX_RADEON_DEVICE_NAME_LENGTH MAXPATHLEN

// list ioctls
enum {
	RADEON_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,

	RADEON_DEVICE_NAME,
	RADEON_GET_LOG_SIZE,
	RADEON_GET_LOG_DATA,
	RADEON_ALLOC_MEM,
	RADEON_FREE_MEM,
	
	RADEON_WAITFORIDLE,
	RADEON_RESETENGINE,
	RADEON_VIPREAD,
	RADEON_VIPWRITE,
	RADEON_FINDVIPDEVICE,

	RADEON_WAIT_FOR_CAP_IRQ,	
	RADEON_DMACOPY,
};


// number of indirect buffers
// see CP.c for this magic number
#define NUM_INDIRECT_BUFFERS 253
// size of an indirect buffer in dwords; 
// as hardware wants buffers to be 4k aligned and as we store all
// buffers in one chunk, the size per buffer in bytes must be a multiple of 4k
#define INDIRECT_BUFFER_SIZE (4096/4)


// type of memory
typedef enum {
	mt_local,		// local graphics memory
	mt_PCI,			// PCI memory (read: fully cachable)
	mt_AGP,			// AGP memory (read: not cachable; currently not supported)
	mt_nonlocal,	// non-local graphics memory (alias to one of the 
					// previously defined types, see si->nonlocal_type)
	
	mt_last = mt_nonlocal
} memory_type_e;

// list of multi-monitor modes
typedef enum {
	mm_none,	// use one display only
	mm_combine,	// combine displays to larger workspace
	mm_clone,	// clone workspace, all displays show the 
				// same but have independant timing
	mm_mirror	// mirror heads (as used by Laptop) - not implemented yet
} multi_mode_e;


// displays devices;
// this must be a bit field as multiple devices may be connected to one CRTC
typedef enum {
	dd_none = 0,
	dd_tv_crt = 1,	// CRT on TV-DAC, i.e. on DVI port
	dd_crt = 2,		// CRT on CRT-DAC, i.e. VGA port
	dd_lvds = 4,	// laptop flap panel
	dd_dvi = 8,		// DVI on primary port (i.e. standard DVI connector)
	dd_ctv = 16,	// composite TV on TV-DAC
	dd_stv = 32,	// S-Video out on TV-DAC
	
	// the following connectors/devices are not supported
	dd_dvi_ext = 64	// external DVI (only provided by few models)
} display_device_e;


// type of ASIC
typedef enum {
	rt_r100,		// original Radeon
	rt_ve,			// original VE version
	rt_m6,			// original mobile Radeon
	rt_rs100,		// IGP 320M
	rt_rv200,		// Radeon 7500
	rt_m7,			// mobile Radeon 7500
	rt_rs200,		// IGP 330M/340M/350M
	rt_r200,		// Radeon 8500/9100
	rt_rv250,		// Radeon 9000
	rt_m9,			// mobile Radeon 9000
	rt_rv280,		// Radeon 9200
	rt_m9plus,		// mobile Radeon 9200
	
	// from here on, r300 and up must be located as ATI modified the PLL
	// with r300 and the code only tests for >= rt_r300
	rt_r300,		// Radeon 9700
	rt_r300_4p,		// Radeon 9500
	rt_rv350,		// Radeon 9600
	rt_m10,			// mobile Radeon 9600
	rt_rv360,		// Radeon 9600
	rt_r350,		// Radeon 9800
	rt_r360			// Radeon 9800
} radeon_type;


// TV standard
typedef enum {
	ts_off,
	ts_ntsc,
	ts_pal_bdghi,
	ts_pal_m,
	ts_pal_nc,
	ts_scart_pal,
	ts_pal_60,
	ts_max = ts_pal_60
} tv_standard_e;


// type of TV-Chip
typedef enum {
	tc_none,
	tc_external_rt1,	// external Rage Theatre
	tc_internal_rt1,	// internal version 1
	tc_internal_rt2,	// internal version 2
} tv_chip_type;


// info about cursor
typedef struct {
	uint8*	data;		// pointer to framebuffer containing cursor image
	uint16	hot_x;
	uint16	hot_y;
	uint16	x;
	uint16	y;
	uint16	width;
	uint16	height;
	uint32 	mem_handle;	// memory handle
	uint32	fb_offset;	// offset in frame buffer
	bool	is_visible;	// official flag whether cursor is visible
} cursor_info;


// info about flat panel connected to LVDS or DVI port
typedef struct {
	uint panel_pwr_delay;
	uint panel_xres, panel_yres;
	
	uint h_blank, h_over_plus, h_sync_width;
	uint v_blank, v_over_plus, v_sync_width;
	uint dot_clock;				// in kHz (this is BeOS like, ATI uses 10 kHz steps!)

	bool is_fp2;				// true, if second flat panel
//	display_type_e disp_type;
	
	uint64 h_ratio;				// current stretch ratio, needed for overlays
	uint64 v_ratio;				// (mode_res/native_res; 32.32)
} fp_info;


// crtc info
typedef struct {
	//bool		is_crtc2;			// true, if crtc2
	int8		flatpanel_port;		// linked flat panel port (-1 if none)
	bool		cursor_on_screen;	// cursor is visible on this head
	int			crtc_idx;			// index of CRTC
	display_device_e active_displays; // currently driven displays
	display_device_e chosen_displays; // displays to be driven after next mode switch
	sem_id		vblank;				// vertical blank interrupt semaphore
	uint32		rel_x, rel_y;	// relative position in multi-monitor mode
	display_mode mode;				// display mode of this head
} crtc_info;


// info about PLLs on graphics card as retrieved from BIOS
// all values are in 10kHz
typedef struct {
	uint32 max_pll_freq;		// maximum PLL output frequency
	uint32 min_pll_freq;		// minimum PLL output frequency
	uint32 xclk;				// core frequency
	uint32 ref_div;				// default reference divider
	uint32 ref_freq;			// PLL reference frequency
} general_pll_info;


// mapping of pll divider code to actual divider value
typedef struct {
	uint8 divider;				// divider
	uint8 code;					// code as used in register
} pll_divider_map;


// info about a PLL
// all values are in 10 kHz
typedef struct {
	pll_divider_map *post_divs;	// list of possible post dividers
	pll_divider_map *extra_post_divs; // list of possible extra post dividers
	uint32 ref_freq;			// reference frequency
	uint32 vco_min, vco_max;	// VCO frequency range
	uint32 min_ref_div, max_ref_div; // reference divider range
	uint32 pll_in_min, pll_in_max; // PLL input frequency range
	uint32 extra_feedback_div;	// hardwired divider before feedback divider
	uint32 min_feedback_div, max_feedback_div; // feedback divider range
	uint32 best_vco;			// preferred VCO frequency (0 for don't care)
} pll_info;


// one overlay buffer
typedef struct overlay_buffer_node {
	struct overlay_buffer_node *next, *prev;
	uint32 mem_handle;
	uint32 mem_offset;
	uint ati_space;				// colour space according to ATI
	uint test_reg;				// content of test reg
	overlay_buffer buffer;
} overlay_buffer_node;


// info about active overlay
typedef struct {
	overlay_token	ot;
	overlay_buffer  ob;
	overlay_window	ow;
	overlay_view	ov;
	uint16			h_display_start;
	uint16			v_display_start;
	
	overlay_buffer_node *on;	// current buffer
	overlay_buffer_node *prev_on; // previous buffer (for temporal deinterlace, currently unused)
	int				crtc_idx;	// crtc where the overlay is shown on
	uint32			rel_offset;	// offset of overlay source due to clipping
} overlay_info;


// each accelerant gets one "virtual card", i.e. you
// can have independant accelerants for each head
// (this is an ongoing project ;)
typedef struct {
	uint32		id;				// identifier used to know which card the 2D accelerator
								// is prepared for (we use area_id of this structure)
	bool		assigned_crtc[2];	// mask of heads assigned to virtual card
	bool		used_crtc[2];	// mask of heads assigned to virtual card
	
	display_device_e controlled_displays; // displays devices controlled byvc
	display_device_e connected_displays; // bit-field of connected displays
	
	int8		independant_heads;	// number of heads to be programmed independantly
	int8		different_heads;	// number of heads showing different parts of framebuffer
	bool		scroll;			// scrolling in virtual area enabled

	uint32		datatype;		// Radeon code for pixel format