msp430dayii_vr.c

采用MSP430F437芯片制作的“精美纪念表”

//*******************************************************************************
//  FG439 Demo - Voice Recorder and Playback 
//
//  Uses the new DMA and DAC12 modules to perform autonomous speech recording
//  and playback. CPU runs from DCO at the default speed of 1MHz.
//
//         MSP430FG439
//   +--------------------+
//   |                    |
//   |              VREF+ +----/\/\/\---
//   |                    |            |
//   |          P6.0/OA0I0|----||------+
//   |                    |            |
//   |                    |           MIC
//   |                    |            |
//   |                    |            |
//   |                    |           GND
//   |                    |
//   |               ADC0 +-------< input from mic pre-amplifier
//   |               DAC0 +-------> output to speaker
//   |               P1.0 +-------> LED #1
//   |               P2.1 +-------< KEY #1
//   |               P2.2 +-------< KEY #2 
//   |                    |
//   |                    |
//
//
//  Original code base was D169_VR by A. Dannenberg
//  Modified for FG "watch" board by M. Mitchell
//  Texas Instruments Inc.
//  February, 2004
//*******************************************************************************
#include <msp430xG43x.h>
//------------------------------------------------------------------------------
#define Memstart             0x1400         // Memory range to be filled with
#define Memend               0xfe00         // Sampled data
// ATTN: Care must be taken not to conflict with memory used by the program
//       code. Also both addresses need to be integer multipliers of 0x0200
//       due to the flash memory segmenting.

#define SamplePrd            118            // Record&playback sample period
                                            // SampleR = 1.048576Mhz / SamplePrd

void Init_Sys(void);                        // Function prototypes
void Record(void); 
void Playback(void);
void Erase(void);
void Delay(void);
//-----------------------------------------------------------------------------
void main(void)
{
  Init_Sys();                               // Initialize system

  while (1)                                 // Repeat forever
  {
    // wait for key-press event, hold CPU in low-power mode
    P2IFG = 0;                              // Clear all P1.x interrupt flags
    P2IE |= 0x06;                           // Enable int for buttons
    _BIS_SR(LPM3_bits + GIE);               // Enter LPM3 w/ interrupts
    _DINT();                                // Disable interrupts
    P2IE &= ~0x06;                          // Disable interrupts for buttons

    // process key-press event
    if (!(P2IN & 0x02))                     // Record button pressed?
      Record();                             
    else                                    // No, -> must be playback button
      Playback();                           
  }
}
//-----------------------------------------------------------------------------
// Record audio data and store in Flash memory using ADC12 + DMA
//-----------------------------------------------------------------------------
void Record(void)
{
  // setup modules
  ADC12IFG = 0x00;                          // 
  ADC12CTL1 = SHS_3 + CONSEQ_2;             // S&H TB.OUT1, rep. single chan
  ADC12MCTL0 = INCH_12 + SREF_1;            // Input A12, ref = AVCC
  ADC12CTL0 = ADC12ON + REFON + REF2_5V + ENC;// 2.5Vref
  
  DAC12_1CTL = DAC12AMP_7 + DAC12IR;        // DAC1 outputs mid voltage for OA
  DAC12_1DAT = 0x7ff;                       //

  OA0CTL0 = OAADC0 + OAP_3 + OAPM_3;        // DAC1 as + input, P6.0 as - input
  OA0CTL1 = OAFC_6 + OAFBR_7;               // PGA gain of 15

  TBCCR0 = SamplePrd;                       // Initialize TBCCR0 w/ sample prd
  TBCCR1 = SamplePrd - 20;                  // Trigger for ADC12 SC
  TBCCTL1 = OUTMOD_7;                       // Reset OUT1 on EQU1, set on EQU0

  DMA0SA = ADC12MEM0_;                      // Src address = ADC12 module
  DMA0DA = Memstart;                        // Dst address = Flash memory
  DMA0SZ = (Memend - Memstart) >> 1;        // Size in words
  DMACTL0 = DMA0TSEL_6;                     // ADC12IFGx triggers DMA0
  DMA0CTL = DMADSTINCR_3 + DMAIE + DMAEN;   // Config
  
  Delay();                                  // Delay for reference settling

  // unlock and erase Flash memory
  FCTL3 = FWKEY;                            // Unlock Flash memory for write
  Erase();                                  // Call Flash erase subroutine
  FCTL1 = FWKEY + WRT;                      // Enable Flash write for recording
           
  // start recording and enter LPM
  P1OUT |= 0x01;                            // LED#1 on
  TBCTL = TBSSEL_2+ MC_1 + TBCLR ;          // SMCLK, clear TBR, up mode
  _BIS_SR(LPM0_bits + GIE);                 // Enter LPM0 w/ interrups
  _DINT();                                  // Disable interrupts
  
  // deactivate Flash memory write access
  FCTL1 = FWKEY;                            // Disable Flash write
  FCTL3 = FWKEY + LOCK;                     // Lock Flash memory     
           
  // power-down MSP430 modules
  ADC12CTL1 &= ~CONSEQ_2;                   // Stop conversion immidiately
  ADC12CTL0 &= ~ENC;                        // Disable ADC12 conversion
  ADC12CTL0 = 0;                            // Switch off ADC12 & ref voltage
  TBCTL = 0;                                // Disable Timer_B
  
  P1OUT = 0;                                // LED off

}
//-----------------------------------------------------------------------------           
// Playback audio data stored in Flash memory using the DMA and DAC12
//-----------------------------------------------------------------------------
void Playback(void)
{
  // power-up external hardware
  P1OUT = 0x02;                             // LED#2 on, enable audio outp
  P6OUT |= 0x04;                            // Disable charge pump snooze mode

  // setup modules
  ADC12CTL0 = REF2_5V + REFON;              // ADC12 ref needed for DAC12
  DAC12_0CTL = DAC12LSEL_3 + DAC12IR + DAC12AMP_7 + DAC12ENC + DAC12OPS; // config

  TBR = SamplePrd + 2;                      // Force delay of 64k for Vref  
  TBCCR0 = SamplePrd;                       // Initialize TBCCR0 w/ sample prd
  TBCCR2 = SamplePrd >> 1;                  // EQU2 will trigger DMA
  TBCCTL2 = OUTMOD_7;                       // Reset OUT2 on EQU2, set on EQU0

  DMA0SA = Memstart;                        // Src address = Flash memory
  DMA0DA = DAC12_0DAT_;                     // Dst address = DAC12 module
  DMA0SZ = (Memend - Memstart) >> 1;        // DMA block size
  DMACTL0 = DMA0TSEL_2;                     // Timer_B.CCIFG2 triggers DMA0
  DMA0CTL = DMASRCINCR_3 + DMAIE + DMAEN;   // Config
  
  Delay();                                  // Delay for reference settling

  // start playback and enter LPM
  TBCTL = TBSSEL_2 + MC0;                   // SMCLK, up mode
  _BIS_SR(LPM0_bits + GIE);                 // Enter LPM0 w/ interrups
  _DINT();                                  // Disable interrupts
                                          
  // power-down MSP430 modules
  TBCTL = 0;                                // Disable Timer_B
  ADC12CTL0 = 0;                            // Switch off ADC12 ref voltage
  DAC12_0CTL &= ~DAC12ENC;                  // Disable DAC12 conversion
  DAC12_0CTL = 0;                           // Switch off DAC12
           
  // power-down external hardware
  P1OUT = 0x10;                             // LED#2 off, disable audio outp
  P6OUT &= ~0x04;                           // Enable charge pump snooze mode
}
//-----------------------------------------------------------------------------
// setup system and peripherals
//-----------------------------------------------------------------------------
void Init_Sys(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog

  P1DIR = 0x01;                             // P1.0 as output
  P1OUT = 0;
  P2IES = 0x06;                             // H->L edge detect for buttons

  
  FCTL2 = FWKEY + FSSEL_2 + FN1;            // Clk src = SMCLK / 3 (~333KHz)
}
//-----------------------------------------------------------------------------
// erase Flash memory for new recording
//-----------------------------------------------------------------------------
void Erase(void)
{
  unsigned int *pMemory = (unsigned int *)Memstart;
                                            // Start of record memory array
  do
  {
    if ((unsigned int)pMemory & 0x1000)     // Use bit 12 to toggle LED#1
      P1OUT |= 0x01;
    else
      P1OUT &= ~0x01;    
    
    FCTL1 = FWKEY + ERASE;
    *pMemory = 0x00;                        // Dummy write to activate
                                            // Segment erase
    pMemory += 0x0100;                      // Point to next segment
  } while (pMemory < (unsigned int *)Memend);
}  

//-----------------------------------------------------------------------------
// Guaranteed minimum delay of 18ms for reference settling
//-----------------------------------------------------------------------------
void Delay(void)
{
  volatile int i;
  for (i=6000; i; i--);
}

//-----------------------------------------------------------------------------
// PORT2 interrupt handler
//-----------------------------------------------------------------------------
#pragma vector = PORT2_VECTOR
__interrupt void PORT2ISR(void)
{
  P2IFG = 0;                                // Clear all P2.x interrupt flags
  _BIC_SR_IRQ(LPM3_bits);                   // Exit LPM3 on reti
}
//-----------------------------------------------------------------------------
// DAC12, DMA interrupt handler
//-----------------------------------------------------------------------------
#pragma vector = DAC12_DMA_VECTOR
__interrupt void DACDMAISR(void)
{
  DMA0CTL &= ~DMAIFG;                       // Clear DMA0 interrupt flag
  _BIC_SR_IRQ(LPM0_bits);                   // Exit LPM0 on reti
}