📄 changelog
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Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com) * mn10300.h: Add "machine" field for instructions. (MN103, AM30): Define machine types.Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.1998-06-18 Ulrich Drepper <drepper@cygnus.com> * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (i386_optab): Add general form of aad and aam. Add ud2a and ud2b. (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just those that happen to be implemented on pentiums.Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Change occurences of Data16 to Size16, Data32 to Size32, IgnoreDataSize to IgnoreSize. Flag address and data size prefixes with Size16|IgnoreSize or Size32|IgnoreSize.Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE. (REPE): Rename to REPE_PREFIX_OPCODE. (i386_regtab_end): Remove. (i386_prefixtab, i386_prefixtab_end): Remove. (i386_optab): Use NULL as sentinel rather than "" to suit rewrite of md_begin. (MAX_OPCODE_SIZE): Define. (i386_optab_end): Remove. (sl_Suf): Define. (sl_FP): Use sl_Suf. * i386.h (i386_optab): Allow 16 bit displacement for `mov mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32, data32, dword, and adword prefixes. (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index regs.Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (i386_regtab): Remove BaseIndex modifier from esp. * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with register operands, because this is a common idiom. Flag them with a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp, fdivrp because gcc erroneously generates them. Also flag with a warning. * i386.h: Add suffix modifiers to most insns, and tighter operand checks in some cases. Fix a number of UnixWare compatibility issues with float insns. Merge some floating point opcodes, using new FloatMF modifier. (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for consistency. * i386.h: Change occurence of ShortformW to W|ShortForm. Add IgnoreDataSize where appropriate.Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: (one_byte_segment_defaults): Remove. (two_byte_segment_defaults): Remove. (i386_regtab): Add BaseIndex to 32 bit regs reg_type.Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup. (cgen_hw_lookup_by_num): Declare.Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com> * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com> * cgen.h (cgen_asm_init_parse): Delete. (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete. (cgen_asm_record_register,cgen_asm_finish_insn): Delete.Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses. (cgen_asm_finish_insn): Update prototype. (cgen_insn): New members num, data. (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size, dis_hash, dis_hash_table_size moved to ... (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA. All uses updated. New members asm_hash_p, dis_hash_p. (CGEN_MINSN_EXPANSION): New struct. (cgen_expand_macro_insn): Declare. (cgen_macro_insn_count): Declare. (get_insn_operands): Update prototype. (lookup_get_insn_operands): Declare.Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (i386_optab): Change iclrKludge and imulKludge to regKludge. Add operands types for string instructions.Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com> * i386.h (X): Renamed from `Z_' to preserve formatting of opcode table.Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com> * i386.h (Z_): Renamed from `_' to avoid clash with common alias for `gettext'.Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Remove NoModrm flag from all insns: it's never checked. Add IsString flag to string instructions. (IS_STRING): Don't define. (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define. (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define. (SS_PREFIX_OPCODE): Define.Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com> * i386.h: Revert March 24 patch; no more LinearAddress.Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h (i386_optab): Remove fwait (9b) from all floating point instructions, and instead add FWait opcode modifier. Add short form of fldenv and fstenv. (FWAIT_OPCODE): Define. * i386.h (i386_optab): Change second operand constraint of `mov sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to allow legal instructions such as `movl %gs,%esi'Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com> * h8300.h: Various changes to fully bracket initializers.Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org> * i386.h: Set LinearAddress for lidt and lgdt.Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_BOOL_ATTR): New macro.Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com> * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now. (cgen_insn): Record syntax and format entries here, rather than separately.Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com> * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (cgen_insert_fn): Change type of result to const char *. (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments. (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com> * cgen.h (lookup_insn): New argument alias_p.Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>Fix rac to accept only a0: * d10v.h (OPERAND_ACC): Split into: (OPERAND_ACC0, OPERAND_ACC1) . (OPERAND_GPR): Define.Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_FIELDS): Define here. (CGEN_HW_ENTRY): New member `type'. (hw_list): Delete decl. (enum cgen_mode): Declare. (CGEN_OPERAND): New member `hw'. (enum cgen_operand_instance_type): Declare. (CGEN_OPERAND_INSTANCE): New type. (CGEN_INSN): New member `operands'. (CGEN_OPCODE_DATA): Make hw_list const. (get_insn_operands,lookup_insn): Add prototypes for.Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS. (CGEN_HW_ENTRY): Move `next' entry to end of struct. (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS. (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com> * cgen.h: Correct typo in comment end marker.Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU> * tic30.h: New file.Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com> * cgen.h: Add prototypes for cgen_save_fixups(), cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype of cgen_asm_finish_insn() to return a char *.Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com> * cgen.h: Formatting changes to improve readability.Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com> * cgen.h (*): Clean up pass over `struct foo' usage. (CGEN_ATTR): Make unsigned char. (CGEN_ATTR_TYPE): Update. (CGEN_ATTR_{ENTRY,TABLE}): New types. (cgen_base): Move member `attrs' to cgen_insn. (CGEN_KEYWORD): New member `null_entry'. (CGEN_{SYNTAX,FORMAT}): New types. (cgen_insn): Format and syntax separated from each other.Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com> * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make flags_{used,set} long. (d30v_operand): Make flags field long.Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> * m68k.h: Fix comment describing operand types.Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com> * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move everything else after down.Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk> * d10v.h (OPERAND_FLAG): Split into: (OPERAND_FFLAG, OPERAND_CFLAG) .Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com> * mips.h (struct mips_opcode): Changed comments to reflect new field usage.Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com> * mips.h: Added to comments a quick-ref list of all assigned operand type characters. (OP_{MASK,SH}_PERFREG): New macros.Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com> * sparc.h: Add '_' and '/' for v9a asr's. Patch from David Miller <davem@vger.rutgers.edu>Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com) * h8300.h: Bit ops with absolute addresses not in the 8 bit area are not available in the base model (H8/300).Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com> * m68k.h: Remove documentation of ` operand specifier.Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com> * m68k.h: Document q and v operand specifiers.Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com> * v850.h (struct v850_opcode): Add processors field. (PROCESSOR_V850, PROCESSOR_ALL): New bit constants. (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants. (PROCESSOR_V850EA): New bit constants.Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com> Merge changes from Martin Hunt: * d30v.h: Allow up to 64 control registers. Add SHORT_A5S format. * d30v.h (LONG_Db): New form for delayed branches. * d30v.h: (LONG_Db): New form for repeati. * d30v.h (SHORT_D2B): New form. * d30v.h (SHORT_A2): New form. * d30v.h (OPERAND_2REG): Add new operand to indicate 2 registers are used. Needed for VLIW optimization.Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com> * cgen.h: Move assembler interface section up so cgen_parse_operand_result is defined for cgen_parse_address. (cgen_parse_address): Update prototype.Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com> * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h (two_byte_segment_defaults): Correct base register 5 in modes 1 and 2 to be ss rather than ds. From Gabriel Paubert <paubert@iram.es>. * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert <paubert@iram.es>. * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert <paubert@iram.es>. * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again). (JUMP_ON_ECX_ZERO): Remove commented out macro.Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com> * v850.h (V850_NOT_R0): New flag.Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com> * v850.h (struct v850_opcode): Remove flags field.Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com> * v850.h (struct v850_opcode): Add flags field. (struct v850_operand): Extend meaning of 'bits' and 'shift' fields. (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags. (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com> * arc.h: New file.Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com> * sparc.h (sparc_opcodes): Declare as const.Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com) * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn uses single or double precision floating point resources. (INSN_NO_ISA, INSN_ISA1): Define. (cpu specific INSN macros): Tweak into bitmasks outside the range of INSN_ISA field.Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu> * i386.h: Fix pand opcode.Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com> * mips.h: Widen INSN_ISA and move it to a more convenient bit position. Add INSN_3900.Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com> * mips.h (struct mips_opcode): added new field membership.Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu> * i386.h (movd): only Reg32 is allowed. * i386.h: add fcomp and ud2. From Wayne Scott <wscott@ichips.intel.com>.Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Add MMX instructions.Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu> * i386.h: Remove W modifier from conditional move instructions.Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com> * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp with no arguments to match that generated by the UnixWare assembler.Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com> * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg. (cgen_parse_operand_fn): Declare. (cgen_init_parse_operand): Declare. (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
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